Abstract: A power supply has a multi-level DC-DC converter and a battery pack with two or more cells provided in series. The switching DC-DC converter provides a regulated voltage at an output. The converter has an energy storage element. The switching regulator is designed to selectively operate in two or more different modes. It switches between a first mode where one cell is connected (between battery and inductor of the converter), and the converter functions like a single cell buck converter and a second mode where two cells are connected in series and the converter functions like a two series cell buck converter. In general, any number of cells and modes can be provided, with successive cells being connected in series in each mode.

Abstract: This disclosure relates to an analog-to-digital converter, ADC.

Abstract: The embodiments disclosed herein describe a set of fault detection circuits for LED circuits in an LED channel. A first fault detection circuit is configured to detect a short fault across one or more LEDs. A second fault detection circuit is configured to detect an open fault across an LED. A third fault detection circuit is configured to detect a short across an LED channel transistor. A fourth fault detection circuit is configured to detect an LED channel sense resistor open fault. A fifth fault detection circuit is configured to detect if the LED channel is being intentionally unused. These fault detect circuits can be implemented in a fault detection integrated circuit coupled to the LED channel.

Abstract: A power combiner for an outphasing amplifier system comprises an output terminal, a first input terminal, a first inductor, and a first capacitor, wherein the first input terminal is connected to ground via the first inductor and the first input terminal is connected to the output terminal via the first capacitor. The power combiner further comprises a second input terminal, a second capacitor, and a second inductor, wherein the second input terminal is connected to ground via the second capacitor and the second input terminal is connected to the output terminal via the second inductor. The first capacitor can have a same capacitance as the second capacitor and the first inductor has a same inductance as the second inductor.

Abstract: An actuation system is proposed for an optical system, comprising a voice coil motor for actuating the optical system, the voice coil motor comprising a magnet and an electric coil, a position measuring unit for measuring the position of the electric coil and providing a position feedback signal, and a control unit for closed loop control of the position of the optical system based on a target position and the position feedback signal, used for generating a drive signal for the electric coil. According to the disclosure, a ferromagnetic element is arranged in proximity to the electric coil so that the inductance of the electric coil depends on its position. Further, the position-measuring unit measures the inductance of the electric coil and determines the position of the electric coil based on the determined inductance.

Abstract: A linear charger circuit and method for providing an output current at an output node is presented. The circuit contains a pass device connected between an input node and the output node, first and second replica devices connected in parallel to the pass device, with their control terminals coupled to a control terminal of the pass device. The first replica device is coupled to a first circuit path for determining whether current output by the linear charger circuit shall be terminated. The second replica device is coupled to a second circuit path for providing feedback for controlling the pass device, a control circuit coupled to the second circuit path for controlling the pass device based on a quantity indicative of a current flowing through the second circuit path, and a switching circuit coupled to the second circuit path.

Abstract: A bias current generator is disclosed that include an operational amplifier that is self-biased during an inactive period with a bias current to bias a gate of an output transistor. Since the inactive period bias is close to an active period bias applied to the gate of the output transistor during active operation of the bias current generator, the speed of transition from the inactive period to the active period is enhanced by the self-biasing of the operational amplifier.

Abstract: A two-stage power converter is disclosed in which a second stage may command a first stage to adjust an output voltage from the first stage to compensate for PVT variations in the second stage. Alternatively, the second stage may adjust a clocking frequency to compensate for the PVT variations.

Abstract: Driver circuits with S-shaped gate drive voltage curves for ramp-up and ramp-down of power field effect transistors are presented. In ramp-up, the S-shaped curve rapidly ramps the gate voltage of the power FET to its threshold. This ramp-up is self-terminating. The gate voltage of the power FET is slewed through saturation with a time constant. After a predetermined time, the gate of the power FET is driven to approach the supply voltage level. In ramp-down, the S-shaped curve rapidly ramps the gate voltage of the power FET down to its threshold voltage. This ramp-down is self-terminating. The gate voltage of the power FET is slewed through saturation. The gate-source voltage of the power FET is rapidly ramped down to zero. Such S-shaped curves for the gate drive signal allow the control of the transition times of the gate drive signal to acceptable levels of voltage/current spikes and electromagnetic interference.

Abstract: A digital active diode circuit for letting current pass in one direction and substantially blocking current in the opposite direction is presented. The circuit contains switching means comprising an array of switches, a first comparison unit coupled to the digital active diode circuit input and output. The first comparison unit updates its output if the difference between their inputs is higher than a first threshold voltage, and a second comparison unit being coupled to the digital active diode circuit output and input. The second comparison unit updates its output if the difference between its inputs is lower than a second threshold voltage. The switching means switches on or off at least one switch based on the comparisons performed by the first comparison unit and the second comparison unit and wherein the first threshold voltage is different from the second threshold voltage.

Abstract: A divider circuit and method for generating one or more digital signals is presented. The circuit has a first output section for generating a first digital signal. There is a first output section with an output node to output the first digital signal, and a plurality of switches with one or more control switches. The plurality of switches selectively couple the output node to a first voltage and/or to selectively couple the output node to a second voltage, thereby generating the first digital signal. The or each control switch is prevents at least one of (i) the output node being coupled to the first and second voltages simultaneously and (ii) the output node being decoupled from both the first and second voltages simultaneously.

Abstract: A method to fabricate a reconstructed panel based fan-out wafer level package is described. A reconstructed wafer panel is provided comprising a plurality of individual dies encapsulated in a first molding compound. Interconnected metal redistribution layers (RDL) separated by PSV layers are formed on top surfaces of the plurality of individual dies. Thereafter, the reconstructed wafer panel is cut into a plurality of rectangular strips. Thereafter, backend processing is performed on each of the plurality of rectangular strips.

Abstract: A DC-DC switching converter is described, with a high magnetic coupling ratio between coils connected directly to a supply and ground, and with pass-device switches connected directly to an output. The pass-device switches are driven in such a way that the coils are magnetized alternately. The DC-DC switching converter may use multiple output switches, to supply multiple outputs. The DC-DC switching converter may use different turns-ratio on the coils, to adjust the duty-cycle of the switching converter operates, for a given supply voltage to output voltage ratio.

Abstract: A synchronous rectifier controller for controlling the on and off periods of a synchronous rectifier switch transistor in a switching power converter. In particular, the synchronous rectifier controller is configured to adaptively enable and disable a deglitch filter for filtering a turn-on signal for the synchronous rectifier switch transistor. In this fashion, the synchronous rectifier switch transistor may be switched on more rapidly during periods when the deglitch filter is disabled for greater efficiency yet the switching power converter is protected by the deglitch filter when it is not disabled.

Abstract: A low dropout (LDO) device with improved linear mode comprising an error amplifier, a programmable attenuation factor circuit coupled to said error amplifier, a feedback network whose input is electrically connected to said programmable attenuation factor circuit and whose output is electrically coupled to the negative input of said error amplifier, a high side (HS) pre-drive circuit whose input is a high impedance (HiZ) mode signal, a low side (LS) pre-drive circuit whose input is a low pull-down input mode signal, a high side (HS) output stage element electrically coupled to said high side (HS) pre-drive circuit, a low side (LS) output stage element electrically coupled to said low side (LS) pre-drive circuit, and a high side sense (HSENSE) output stage element whose gate is electrically coupled to said high side (HS) pre-drive circuit, and whose gate and source are electrically connected to the output of said error amplifier.

Abstract: An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.

Abstract: A direct AC LED lighting device is provided with a controller that switches off a bleeder circuit following an initial rising edge for a post diode bridge voltage. The controller measures a first delay between a zero crossing for the post diode bridge voltage and the initial rising edge to estimate a triggering voltage for a leading edge dimmer switch. The controller determines a second delay following the initial rising edge responsive to the estimate of the triggering voltage. The controller may thus switch on the bleeder circuit at an expiration of the second delay so that bleeder circuit is only on for a duration sufficient to develop a voltage difference across the leading edge dimmer switch to equal the triggering voltage just as the post diode bridge voltage satisfies an LED threshold voltage.

Abstract: A buck-boost switching converter which receives an input voltage and provides an output voltage is presented. The converter contains a first set of switches having a first power switch and a first ground switch, a second set of switches having a second power switch and a second ground switch. A controller is arranged to send control signals to the first and second set of switches. The controller is arranged such that in a buck mode, the first set of switches operates to provide buck regulation while the second power switch is held in a closed state. In a boost mode, the second set of switches operates to provide boost regulation while the first power switch is held in a closed state, and the controller is arranged to selectively operate the buck-boost switching converter in the buck mode or the boost mode based on a length of a time period.

Abstract: A wafer level chip scale package is described. The wafer level chip scale package comprises a plurality of redistribution layer (RDL) traces connected to a silicon wafer through openings through a first polymer layer to metal pads on a top surface of the silicon wafer. A plurality of underbump metal (UBM) layers each contact one of the plurality of RDL traces through openings in a second polymer layer over the first polymer layer. A plurality of solder bumps lie on each UBM layer. A metal plating layer lies under the first polymer layer and does not contact any of the plurality of RDL traces. At least one separator lies between at least two of the plurality of RDL traces. The separator is a metal fencing between the two neighboring RDL traces or an air gap between the two neighboring RDL traces.

Abstract: A switching power converter is provided that cycles a power switch during a group pulse mode of operation to produce a train of pulses within a group period responsive to a control voltage being within a group mode control voltage range. Depending upon the control voltage, the number of pulses in each train of pulses is varied to provide a linear power delivery to the load.