Abstract: A Low Dropout Regulator (LDO) with Less Quiescent Current in the Dropout Region is described, including an error amplifier configured to compare a reference voltage to an LDO output voltage across a resistive divider, a current mirror configured to mirror a first output of the error amplifier to a first and second output of the current mirror, and a comparator configured to compare the LDO output voltage to a second output of the error amplifier, which has been compared to the second output of the current mirror, and configured to output a control voltage to the error amplifier, where a low quiescent current is maintained when an LDO input voltage is near or less than the LDO output voltage.

Abstract: A system for turning off a synchronous rectifier (SR) based on a primary switch (PS) turn-on detection in a flyback converter having a primary-side and a secondary-side is disclosed. The system comprises the PS on the primary-side, the SR on the secondary-side, a spike detector, and a SR controller. The SR is configured to produce a drain-to-source voltage (VDS). The spike detector is in signal communication with an output capacitor (Cout) on the secondary-side and the spike detector is configured to detect a voltage spike of an output voltage (VOut) across the Cout that is indicative of the PS being turned-on. The SR controller is in signal communication with the SR and the spike detector and the SR controller is configured to turn-off the SR based on the spike detector detecting the voltage spike of the VOut.

Abstract: A flyback converter communication channel is provided that comprises a pair of capacitors. A transmitter on a first side of a transformer for the flyback converter transmits a transmitter signal over a first one of the capacitors. The transmitter also transmits a complement of the transmitter signal over a second one of the capacitors. A receiver on a second side of the transformer controls a switch transistor responsive to a high-pass-filtered difference of the received signals from the pair of capacitors.

Abstract: Hybrid power converters are presented. The power converters can receive an input voltage at an input node and generate an output voltage at an output node. The power converters can have an inductor coupled between an inductor node and the output node. The power converters can have a first flying capacitor coupled between a first capacitor node and a second capacitor node. The power converters can have a second flying capacitor coupled between a third capacitor node and the inductor node. A first switching element may be coupled between the input node and the first capacitor node, and a fifth switching element may be coupled between the first capacitor node and the third capacitor node. Additionally, a sixth switching element may be coupled between the second capacitor node and the inductor node.

Abstract: The present document relates to a power converter configured to convert an input voltage at an input of the power converter into an output voltage at an output of the power converter. The power converter may comprise a power stage, a voltage controlled voltage source VCVS, a first feedback path and a second feedback path. The power stage may be coupled to the output of the power converter. The VCVS may be configured to generate, at an output of the VCVS, an error voltage by comparing a reference voltage with a feedback voltage indicative of the output voltage. The first feedback path may extend from the output of the power converter, via the VCVS, via the power stage, to the output of the power converter. The second feedback path may extend from the output of the VCVS to the output of the power converter.

Abstract: A method for analyzing an analog circuit controlled by a plurality of digital inputs is presented. The circuit is represented with a data structure with nodes connected via edges, which represent a circuit component. The data structure can be traversed across all connected nodes; and said digital inputs can be toggled between two or more input states. The method steps include identifying a set of boundary nodes in the data structure which are at a digital-analog boundary of the data structure; for each digital input, identifying associated boundary nodes which are coupled with the digital input; grouping digital inputs into input sets, where each of the different input sets are associated with mutually exclusive sets of associated boundary nodes, and analyzing the circuit by successively analyzing one or more of the input sets for all possible combinations of inputs states within that set.

Abstract: A symmetrical layout technique for an electrostatic discharge ESD device and a corresponding power supply network is presented. The ESD device protects an electronic circuit against an overvoltage or overcurrent and contains a first contact area to establish an electrical contact with a first supply rail, a second contact area to establish an electrical contact with a second supply rail, and a third contact area to establish an electrical contact with a third supply rail. The first and third supply rails provide a first supply voltage, and the second supply rail provides a second supply voltage. Within the ESD device, an axis of symmetry passes through the second contact area, and the first contact area and the third contact area are arranged on opposite sides with regard to the axis of symmetry. The symmetrical layout technique allows flipping the orientation of the ESD device with regard to the supply rails.

Abstract: The present document relates to a power converter configured to generate an output voltage at an output of the power converter. The power converter may comprise a power stage, a modulator circuit, ramp generator circuit, a first feedback circuit, and a second feedback circuit. The power stage may be coupled to the output of the power converter. The modulator circuit may comprise a first input and a second input, and an output of the modulator circuit may be coupled to the power stage. The ramp generator circuit may be configured to generate a ramp signal, and an output of the ramp generator circuit may be coupled to the first input of the modulator circuit. The first feedback loop may be coupled between the output of the power converter and the second input of the modulator circuit.

Abstract: A pulse counting apparatus operating at a low power and an operation method thereof are provided. The pulse counting apparatus includes a pulse counter configured to count a number of pulses inputted from outside of the pulse counting apparatus and generate an interrupt signal; a timer unit configured to generate a wake-up signal according to a preset time; a real time clock (RTC) configured to serve as a clock of the pulse counter and the timer unit; and a processor configured to switch from a sleep mode to an active mode when the interrupt signal or the wake-up signal is generated.

Abstract: A multi-level power converter and a method using first, second, third and fourth switching elements, an inductor, and a flying capacitor are presented. A first terminal of the inductor may be connected to a switching terminal connecting the second and third switching elements. A first terminal of the flying capacitor may be connected to a terminal connecting the first and second elements. A second terminal of the flying capacitor may be connected to a terminal connecting the third and fourth switching elements. The multi-level power converter may have a first feedback circuit to generate control signals for setting the switching elements in a plurality of switching states for regulating an output voltage or an output current. The converter may have a second feedback circuit to generate control signals to allow the flying capacitor to be charged or discharged using an inductor current flowing through the inductor.

Abstract: An auxiliary winding for a flyback converter includes a floating terminal coupled to ground through a diode. A primary-side controller has a power supply voltage terminal coupled to a remaining terminal of the auxiliary winding and has a voltage sense terminal coupled to the floating terminal.

Abstract: A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.

Abstract: A standby power system for a flyback converter is disclosed. The flyback converter includes a primary-side, a secondary-side, an output terminal at the secondary-side, and a secondary-side controller, where the output terminal is configured to electrically connect to a load. The standby power system comprises a comparator at the secondary-side, an opto-coupler in signal communication with the primary-side, the secondary-side, and the comparator, and a cable detach detector (or load detector). The cable detach detector is configured to determine whether a device is electrically connected to the flyback converter through a charging cable and to set the flyback converter into a standby mode if the deice is disconnected from the charging cable.

Abstract: An isolated switching power converter having a primary-side and secondary-side in signal communication with an input and an output is disclosed. The isolated switching power converter comprises a transformer, primary-side switch, secondary-side switch, primary-side controller, and secondary-side controller. The transformer includes a primary-winding and a secondary-winding in signal communication with the input and output. The primary-side switch is in signal communication with the primary-winding and the secondary-side switch is in signal communication with the secondary-winding. The primary-side controller is on the primary-side and the secondary-side controller is on the secondary-side.

Abstract: A solid-state circuit is presented which may comprise a pass device, a control circuit, and a leakage current compensation circuit. The pass device may have a first terminal, a second terminal and a drive terminal, wherein the first terminal of the pass device is coupled with an input terminal of the solid-state circuit, and wherein the second terminal of the pass device is coupled with an output terminal of the solid-state circuit. The control circuit may be coupled with the drive terminal of the pass device and may be configured to drive the pass device with a driving voltage. The leakage current compensation circuit may be configured to receive a leakage current of the pass device and may be configured to forward said leakage current as a bias current to said control circuit.

Abstract: The present document relates to a power converter comprising an inductor, a first stage, and a second stage. The first stage may be coupled between an input of the power converter and the inductor, and the first stage may comprise a first flying capacitor. The second stage may be coupled between the inductor and an output of the power converter, and the second stage may comprise a second flying capacitor. A second terminal of the first flying capacitor may be connected to a first terminal of the inductor, and a first terminal of the second flying capacitor may be connected to a second terminal of the inductor.

Abstract: A charging circuit and a method with an inductor, an input to receive an input voltage, an output, and a switching means is presented. The switching means performs cycles where each cycle includes, switching the circuit such that the inductor enters into an energy charging state in which the inductor stores energy provided by the input voltage. When energy stored in the inductor reaches an energy threshold, the switching circuit operates such that the inductor enters into an energy discharging state in which the inductor provides energy to the output. The energy threshold is based on a predefined maximum energy storage current value and the time between cycles is based on a duration of the energy discharging state.

Abstract: A multi-pin wafer level chip scale package is achieved. One or more solder pillars and one or more solder blocks are formed on a silicon wafer wherein the one or more solder pillars and the one or more solder blocks all have a top surface in a same horizontal plane. A pillar metal layer underlies the one or more solder pillars and electrically contacts the one or more solder pillars with the silicon wafer through an opening in a polymer layer over a passivation layer. A block metal layer underlies the one or more solder blocks and electrically contacts the one or more solder pillars with the silicon wafer through a plurality of via openings through the polymer layer over the passivation layer wherein the block metal layer is thicker than the pillar metal layer.

Abstract: A power converter includes two flying capacitors coupled to a network of switches, two inductors and a driver. The network of switches has a first switch to couple the first flying capacitor to a first port, a first ground switch to couple the first flying capacitor to ground, a second switch to couple the second flying capacitor to the first port, a second ground switch to couple the second flying capacitor to ground. The driver drives the network of switches with a sequence of states comprising a first state. In the first state the first port is coupled to a second port via a first path and a second path. The first path includes the first switch, the first flying capacitor and the first inductor. The second path includes the second switch, the second flying capacitor and the second inductor; the ground port is decoupled from the second port.

Abstract: An arbiter for use with a plurality of request signals is presented. The arbiter includes a sequence identifier to identify an order between the plurality of request signals. The arbiter provides a plurality of output signals in which each output signal is associated with a request signal. When the request signals are provided in a sequential order the output signals are provided in the identified sequential order. When the request signals are provided substantially at the same time the output signals are provided in an arbitrary sequential order. A corresponding signal arbitration method and an electronic circuit comprising the arbiter are also presented.