Abstract: A semiconductor device includes a memory array having a plurality of associative memory cells arranged in a matrix form for storing entries. The memory array is divided into a plurality of memory blocks for sequentially performing a retrieval operation along a column direction, and further includes a plurality of match lines corresponding to the respective memory blocks and provided correspondingly to each memory cell row, a plurality of search lines corresponding to the respective memory blocks and provided correspondingly to each memory cell column, and a plurality of match amplifiers corresponding to the respective memory blocks and provided to the plurality of match lines. The match line provided correspondingly to the preceding memory block is set to become shorter than the match line provided correspondingly to the subsequent memory block.

Abstract: The source region, drain region, buried insulating film, gate insulating film, and gate electrode of the semiconductor device are formed in a main surface of a semiconductor substrate. The buried insulating film is buried in a first trench formed between the source and drain regions. The first trench has a first side surface and a first bottom surface. The first side surface faces the source region in a first direction extending from one of the source and drain regions to the other. The first bottom surface is connected to the first side surface and is along the main surface of the semiconductor substrate. A crystal plane of a first surface of the semiconductor substrate, which is the first side surface of the first trench, is (111) plane. A crystal plane of a second surface of the semiconductor substrate, which is the bottom surface of the first trench, is (100) plane.

Abstract: An electronic component sub-mount includes a body having a top surface, a bottom surface, and a supporting surface. The top and bottom surfaces are located on opposite sides of the body. The supporting surface is located on one side of the body, and an angle that is not equal to 0 degrees is formed between the supporting surface and the bottom surface. A first conductive layer is disposed on the bottom surface and includes multiple first conductive lines. A second conductive layer is disposed on the supporting surface, extending to the top surface, and includes multiple second conductive lines. The second conductive lines on the supporting surface have a first pin layout, and the second conductive lines on the top surface have a second pin layout different from the first pin layout. The second pin layout matches the pin layout of first conductive lines on the bottom surface.

Abstract: Speed enhancement of data reading is achieved while suppressing an influence of an offset voltage of a differential amplifier.

Abstract: Occurrence of short-channel characteristics and parasitic capacitance of a MOSFET on a SOI substrate is prevented. A sidewall having a stacked structure obtained by sequentially stacking a silicon oxide film and a nitride film is formed on a side wall of a gate electrode on the SOI substrate. Subsequently, after an epitaxial layer is formed beside the gate electrode, and then, the nitride film is removed. Then, an impurity is implanted into an upper surface of the semiconductor substrate with using the gate electrode and the epitaxial layer as a mask, so that a halo region is formed in only a region of the upper surface of the semiconductor substrate which is right below a vicinity of both ends of the gate electrode.

Abstract: A motor commutation testing circuit is provided. When a commutation testing circuit determines that the motor commutation testing circuit enters a test mode, a selector circuit selects a commutation signal generating circuit and provides a simulated commutation signal generated by the commutation signal generating circuit to a control circuit. When the testing circuit determines that the motor commutation testing circuit enters a rotation detection mode, the selector circuit selects a motor rotation detecting circuit and provides a commutation signal of a motor that is detected by the motor rotation detecting circuit to the control circuit.

Abstract: An electromagnetic relay includes a sealed housing, a fixed contact, a movable element having a movable contact, a shaft, a movable core, a fixed core, a return spring, an electromagnetic coil and a sleeve. The shaft is slidably inserted in a through-hole formed in the fixed core. The sleeve has a support part supporting the movable core so as to define a position of the movable core relative to the fixed core when no magnetic attraction acts therebetween. At a front end of the sleeve, there is formed a position adjustment part for adjusting a positional relationship between the fixed core and the support part during the direct or indirect fixing of the sleeve to the fixed core.

Abstract: According to one embodiment, a semiconductor device includes a first chip and a second chip arranged on a substrate, the first chip outputs first time stamp data and first trace data in which a time stamp value is associated with a first execution result obtained by executing software, the second chip outputs second trace data in which a difference value with a marker is associated with a second execution result obtained by executing the software, the second execution result obtained by the second chip executing the software is associated with a third time stamp value calculated based on a second time stamp value and the difference value in a debugger.

Abstract: A method of improving performance of an averager is provided. The method includes steps of: (a) multiplying a value of a (n?1)th piece of output data by a value “N” to calculate a temporary value; (b) determining whether or not a difference between an nth piece of input data and the (n?1)th piece of output data is larger than or smaller than a zero value, if yes, compensating the temporary value to obtain a correction value and performing step (c), if no, setting the correction value and performing step (c); (c) dividing the correction value by the value “N” to obtain a first value; (d) subtracting the first value from the correction value and adding up the correction value and the nth piece of input data to obtain a second value; and (e) dividing the second value by the value “N” to calculate an output value of the averager.

Abstract: A light sensing method having a sensing order adjusting mechanism is provided. The method includes steps of: in a previous sensing cycle, sensing a first light signal that is emitted by both of an ambient light source and a light-emitting component and then is reflected by a tested object; in the previous sensing cycle, sensing a second light signal that is emitted by both of the ambient light source and the light-emitting component and then is reflected by the tested object; in the previous sensing cycle, sensing an ambient light signal emitted by only the ambient light source; and in a next sensing cycle, sensing the first light signal, the second light signal and the ambient light signal in an order different from that in the previous sensing cycle.

Abstract: A data processing device includes: an input data determining unit configured to determine whether or not each of binarized input data is a predetermined value; a storage unit configured to store a plurality of coefficients and coefficient address information including information related to coefficient addresses where the plurality of coefficients are stored; a control unit configured to read the coefficient address from the storage unit based on a determination result of the input data determining unit and read the coefficient from the storage unit based on the coefficient address; and an arithmetic unit configured to execute an arithmetic operation related to the coefficient acquired by the control unit.

Abstract: An open-loop inductor current emulating circuit is provided. A current sensor circuit senses a current flowing through a first terminal of a low-side switch to output a current sensed signal. An emulation controller circuit outputs a plurality of charging current signals according to currents of a plurality of rising waveforms of the current sensed signal. The emulation controller circuit outputs a plurality of discharging current signals according to currents of a plurality of falling waveforms of the current sensed signal. A charging and discharging circuit generates a plurality of charging currents according to the charging current signals, and generates a plurality of discharging currents according to the discharging current signals. The charging and discharging circuit alternatively outputs the charging currents and the discharging currents to the capacitor to charge and discharge the capacitor multiple times, thereby achieving a purpose of emulating an inductor current.

Abstract: A switching charger having fast dynamic response for transition of a load is provided. A first terminal of a high-side switch is coupled to an input voltage. A first terminal of a low-side switch is connected to a second terminal of the high-side switch. A first terminal of an inductor is connected to a node between the first terminal of the low-side switch and the second terminal of the high-side switch. A second terminal of the inductor is connected to a first terminal of a capacitor. A constant on-time circuit determines a duty cycle of an on-time signal according to the input voltage and an output voltage of a node between the second terminal of the inductor and the first terminal of the capacitor. A control circuit controls a driver circuit to drive the high-side switch and the low-side switch according to the on-time signal.

Abstract: A technique for enhancing reliability is provided. A semiconductor device includes a main device which operates in a delayed lockstep mode, a sub device which operates in parallel to the main device in a delayed lockstep mode, a delay circuit which delays an output of the main device, a switching circuit which switches the main device to the sub device according to failure information of the main device.

Abstract: A wiring substrate includes: a first insulating layer; a ground plane formed on the first insulating layer; a second insulating layer formed on the first insulating layer such that the ground plane is covered with the second insulating layer; a first signal wiring formed on the second insulating layer; a third insulating layer formed on the second insulating layer such that the first signal wiring is covered with the third insulating layer; and a second signal wiring formed on the third insulating layer and electrically connected with the first signal wiring. The first signal wiring is arranged in a region overlapping with a portion of a heat radiating plate. The second signal wiring is not arranged in the region. The ground plane has an opening portion located at a position overlapping with the first signal wiring. The opening portion is formed so as to extend along the first signal wiring.

Abstract: A wiring substrate includes: a first insulating layer; a first metal pattern formed on the first insulating layer; a second insulating layer formed on the first insulating layer so as to cover the first metal pattern; a second metal pattern formed on the second insulating layer; and an organic insulating film contacted with a portion of the second metal pattern. The first metal pattern has: a first lower surface contacted with the first insulating layer; and a first upper surface contacted with the second insulating layer. The second metal pattern has: a second lower surface contacted with the second insulating layer; and a second upper surface contacted with the organic insulating film. Further, a surface roughness of the second upper surface is larger than a surface roughness of each of the second lower surface, the first upper surface and the first lower surface.

Abstract: A sound output device includes a waveform output unit and a sounding body. The waveform output unit is configured to output a sound waveform that includes a second waveform generated by a frequency modulation to a first waveform having a desired center frequency. The sounding body is configured to generate a sound corresponding to the sound waveform output from the waveform output unit.

Abstract: A message handler is described. The message handler is configured, in response to receiving a data package which is formatted according to a given communications protocol, such as CAN or Ethernet, and which comprises package-directing data and payload data, to generate package having a predetermined data format, for example a layer-2 or layer-3 package, which comprises a header and payload data. The header comprises an address generated in dependence upon the package-directing data and wherein the payload comprises the data package. The package having a predetermined data format may be an IEEE 1722 frame.

Abstract: A semiconductor device has an impurity region covering a bottom of a gate trench and a column region. A bottom of the column region is deeper than a bottom of the gate trench. The impurity region is arranged between the gate trench and the column region. This structure can improve the characteristics of the semiconductor device.

Abstract: A backlight module is provided and includes a side wall, a cushion member, and a light guide plate. The cushion member has a base portion and a side portion extending from the base portion, and the side portion abuts against the side wall, and the light guide plate is mounted on the cushion member. A display device is provided and includes the aforementioned backlight module, using the cushion member to support the light guide plate.