Patents Assigned to Endicott Interconnect Technologies, Inc.
  • Interposer for use with test apparatus
    Publication number: 20060238207
    Abstract: An interposer comprising at least two dielectric layers bonded to each other, sandwiching a plurality of conductors there-between. The conductors each electrically couple a respective pair of opposed electrical contacts formed within and protruding from openings with the dielectric layers. The interposer is ideally suited for use as part of a test apparatus to interconnect highly dense patterns of solder ball contacts of a semiconductor chip to lesser dense arrays of contacts on the apparatus's printed circuit board. The interposer is also capable of being used for other purposes, including as an interconnecting circuitized substrate between a semiconductor chip and a chip carrier substrate or between a chip carrier and a printed circuit board. Various methods of making such an interposer are also provided.
    Type: Application
    Filed: April 21, 2005
    Publication date: October 26, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Frank Egitto, How Lin
  • Method of making stacked chip electronic package having laminate carrier
    Publication number: 20060240594
    Abstract: A method of making a multi-chip electronic package which utilizes an organic, laminate chip carrier and a pair of semiconductor chips positioned on an upper surface of the carrier in a stacked orientation. The organic, laminate chip carrier is comprised of a plurality of conductive planes and dielectric layers and couples one or both of the chips to underlying conductors on the bottom surface thereof. The carrier may include a high-speed portion to assure high-frequency connection between the semiconductor chips and may also include an internal capacitor and/or thermally conductive member for enhanced operational capabilities. The first chip, e.g., an ASIC chip, is solder bonded to the carrier while the second chip, e.g., a memory chip, is secured to the first chip's upper surface and coupled to the carrier using a plurality of wirebond connections.
    Type: Application
    Filed: June 19, 2006
    Publication date: October 26, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Lawrence Fraley, Voya Markovich
  • Apparatus and method for making circuitized substrates having photo-imageable dielectric layers in a continuous manner
    Publication number: 20060240364
    Abstract: Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.
    Type: Application
    Filed: April 21, 2005
    Publication date: October 26, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: John Lauffer, Voya Markovich, James McNamara, Peter Moschak
  • Apparatus and method for making circuitized substrates in a continuous manner
    Publication number: 20060240641
    Abstract: Apparatus and method for making circuitized substrates using a continuous roll format in which layers of conductor and dielectric are fed into the apparatus, bonded, and passed on to other nearby work stations in which various processes such as hole formation, circuitization and, finally, segmentation occur. The resulting substrates can then be individually bonded to other, like substrates to form a larger multi-layered substrate with a plurality of conductive thru-holes, conductive and dielectric layers as part thereof.
    Type: Application
    Filed: April 21, 2005
    Publication date: October 26, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: John Lauffer, Voya Markovich, James Orband, William Wilson
  • Circuitized substrate with shielded signal lines and plated-thru-holes and method of making same, and electrical assembly and information handling system utilizing same
    Publication number: 20060214010
    Abstract: A circuitized substrate in which selected ones of the signal conductors are substantially surrounded by shielding members which shield the conductors during passage of high frequency signals, e.g., to reduce noise. The shielding members may form solid members which lie parallel and/or perpendicular to the signal conductors, and may also be substantially cylindrical in shape to surround a conductive thru-hole which also forms part of the substrate. An electrical assembly and an information handling system are also defined.
    Type: Application
    Filed: April 11, 2006
    Publication date: September 28, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, Frank Egitto, Roy Magnuson, Voya Markovich, David Thomas
  • Electronic card assembly
    Publication number: 20060213973
    Abstract: An electronic card assembly is provided which includes a protective housing having a movable card therein. The card, in one example one having a magnetic stripe, has its information erased when being inserted into the housing and re-written back onto its information portion (magnetic stripe) during card withdrawal, provided appropriate human information (e.g., from a fingerprint) is received by the assembly's reader component.
    Type: Application
    Filed: March 23, 2005
    Publication date: September 28, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, How Lin, Voya Markovich, Ronald Smith
  • Electronic component test apparatus
    Patent number: 7109732
    Abstract: A test apparatus and method in which a compressible housing is used to retain an electronic component having conductors thereon. The compressible housing is lowered onto a suitable base member having upstanding probes which are also compressible and which physically engage respective ones of the conductors at one end thereof and an appropriate conductor (e.g., conductive pads on a printed circuit board) on the other when the test apparatus is fully assembled and testing occurs.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: September 19, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventor: David Alcoe
  • Method of making circuitized substrate with signal wire shielding
    Publication number: 20060200977
    Abstract: A method of making a circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.
    Type: Application
    Filed: May 9, 2006
    Publication date: September 14, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: John Lauffer, Voya Markovich, Corey Seastrand, David Thomas
  • Fluoropolymer dielectric composition for use in circuitized substrates and circuitized substrate including same
    Publication number: 20060180936
    Abstract: A dielectric composition for forming a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like, the composition including at least two fluoropolymers and two inorganic fillers. A circuitized substrate including at least one such dielectric layer and at least one conductive layer thereon is also provided.
    Type: Application
    Filed: March 28, 2006
    Publication date: August 17, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Kosta Papathomas
  • Method of providing printed circuit board with conductive holes and board resulting therefrom
    Publication number: 20060183316
    Abstract: A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole connects two adjacent layers and the other connects two adjacent layers, including one of the conductive layers connected by the other hole. It is also possible to connect all three conductive layers using one or more holes. The resulting holes may be filled, e.g., with metal plating, or conductive or non-conductive paste. In the case of the latter, it is also possible to provide a top covering conductive layer over the paste, e.g., to serve as a pad or the like on the board's external surface.
    Type: Application
    Filed: April 5, 2006
    Publication date: August 17, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: James Larnerd, John Lauffer, Voya Markovich, Kostas Papathomas
  • Circuitized substrate utilizing three smooth-sided conductive layers as part thereof and electrical assemblies and information handling systems utilizing same
    Publication number: 20060180343
    Abstract: A circuitized substrate in which three conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to two dielectric layers. Each of the foil surfaces which physically bond to a respective dielectric layer are smooth (e.g., preferably by chemical processing) and may include a thin, organic layer thereon. One of the conductive layers may function as a ground or voltage (power) plane while the other two may function as signal planes with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided, as is a method of making the substrate.
    Type: Application
    Filed: August 31, 2005
    Publication date: August 17, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, John Lauffer
  • Method of making circuitized substrate
    Patent number: 7091066
    Abstract: A method of making a circuitized substrate in which a commoning bar, used during the plating of the circuitry on the substrate and coupled to a second set of conductors which in turn are coupled to a first set of conductors, is terminated from the second set of conductors.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: August 15, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Timothy Antesberger, James W. Fuller, Jr., John J. Konrad, John Kresge, Stephen Krasniak, Timothy L. Wells
  • Method of making a circuitized substrate having a plurality of solder connection sites thereon
    Patent number: 7087441
    Abstract: A method of making a circuitized substrate in which two solder deposits, either of the same or different metallurgies, are formed on at least two different metal or metal alloy conductors and PTHs. In an alternative embodiment, the same solder compositions may be deposited on conductor and PTHs of different metal or metal alloy composition. In each embodiment, a single commoning layer (e.g., copper) is used, being partially removed following the first deposition. The solder is deposited using an electroplating process (electroless or electrolytic) and the commoning bar in both depositing steps. An information handling system utilizing the circuitized substrate formed in accordance with the invention is also described.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: August 8, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John J. Konrad, Joseph A. Kotylo, Jose A. Rios
  • Pinned electronic package with strengthened conductive pad
    Patent number: 7087846
    Abstract: An electronic package and information handling system utilizing same wherein the package substrate includes an internally conductive layer coupled to an external pad to provide reinforced adhesion of the pad to the substrate to substantially prevent cracking, separation, etc. of the pad when the pad has a pin bonded thereto and the package is coupled to an external substrate (e.g., printed circuit board). The reinforced adhesion also prevents pad separation, etc. during periods of package handling, manufacture, etc.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: August 8, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventor: David Alcoe
  • Method of making circuitized substrate
    Patent number: 7084014
    Abstract: A method of making a circuitized substrate in which the substrate's commoning bar, used during the plating of the circuitry on the substrate, is terminated from the various conductors using a laser. In a preferred embodiment, the laser acts through a dielectric layer (soldermask) which is applied over the circuitry, including the commoning bar and connected parts. The laser may also be used to expose selected ones of the circuit's other parts, including various pads used to accommodate a wirebond (from a chip) and also solder balls for eventual placement of the substrate on a larger circuit board.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: August 1, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Timothy Antesberger, James W. Fuller, Jr., John J. Konrad, John Kresge, Stephen Krasniak, Timothy L. Wells
  • Circuitized substrate
    Patent number: 7078816
    Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate is also provided, as is a circuitized structure including the circuitized substrate in combination with other circuitized substrates having lesser dense thru-hole patterns. An information handling system incorporating the circuitized substrate of the invention as part thereof is also provided.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: July 18, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David L. Thomas
  • Resistor material with metal component for use in circuitized substrates, circuitized substrate utilizing same, method of making said ciruitized substrate, and information handling system utilizing said ciruitized substrate
    Publication number: 20060151202
    Abstract: A material for use as part of an internal resistor within a circuitized substrate includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component. The ceramic component may be a ferroelectric ceramic and/or a high surface area ceramic and/or a transparent oxide and/or a dope manganite. Alternatively, the material will include the polymer resin and nano-powders, with the nano-powders comprising at least one metal coated ceramic and/or at least one oxide coated metal component. A circuitized substrate adapted for using such a material and resistor therein and a method of making such a substrate are also provided. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.
    Type: Application
    Filed: July 5, 2005
    Publication date: July 13, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra Das, John Lauffer, Voya Markovich
  • Capacitor material for use in circuitized substrates, circuitized substrate utilizing same, method of making said circuitized substrate, and information handling system utilizing said circuitized substrate
    Publication number: 20060151863
    Abstract: A material for use as part of an internal capacitor within a circuitized substrate includes a polymer (e.g., a cycloaliphatic epoxy or phenoxy based) resin and a quantity of nano-powders of ferroelectric ceramic material (e.g., barium titanate) having a particle size substantially in the range of from about 0.01 microns to about 0.90 microns and a surface area for selected ones of said particles within the range of from about 2.0 to about 20 square meters per gram. A circuitized substrate adapted for using such a material and capacitor therein and a method of making such a substrate are also provided. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.
    Type: Application
    Filed: January 10, 2005
    Publication date: July 13, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra Das, John Lauffer, Kostas Papathomas, Mark Poliks
  • Capacitor material with metal component for use in circuitized substrates, circuitized substrate utilizing same, method of making said circuitized substrate, and information handling system utilizing said circuitized substrate
    Publication number: 20060154501
    Abstract: A material for use as part of an internal capacitor within a circuitized substrate includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ferroelectric ceramic component, the ferroelectric ceramic component nano-particles having a particle size substantially in the range of between about 0.01 microns and about 0.9 microns and a surface within the range of from about 2.0 to about 20 square meters per gram. A circuitized substrate adapted for using such a material and capacitor therein and a method of making such a substrate are also provided. An electrical, assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.
    Type: Application
    Filed: January 4, 2006
    Publication date: July 13, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra Das, John Lauffer, Voya Markovich, Mark Poliks
  • Method of making an internal capacitive substrate for use in a circuitized substrate and method of making said circuitized substrate
    Publication number: 20060154434
    Abstract: A method of forming a capacitive substrate in which first and second conductors are formed opposite a dielectric, with one of these electrically coupled to a thru-hole connection. Each functions as an electrode for the resulting capacitor. The substrate is then adapted for being incorporated within a larger structure to form a circuitized substrate such as a printed circuit board or a chip carrier. Additional capacitors are also possible.
    Type: Application
    Filed: July 5, 2005
    Publication date: July 13, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra Das, John Lauffer, Voya Markovich, James Matthews