Patents Assigned to Endicott Interconnect Technologies, Inc.
  • Publication number: 20080142258
    Abstract: A high speed interposer which includes a substrate having alternatingly oriented dielectric and conductive layers which form a substrate, openings which extend from one opposing surface of the substrate to a second opposing surface, conductive members positioned within the openings and also extending from surface to surface (and beyond, in some embodiments), and a plurality of shielding members positioned substantially around the conductive members to provide shielding therefore during the passage of high frequency signals through the conductive members.
    Type: Application
    Filed: January 24, 2008
    Publication date: June 19, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: David V, Caletka, Frank D. Egitto
  • Publication number: 20080144768
    Abstract: A method of making an imaging inspection apparatus which involves positioning a plurality of individual imaging devices (e.g., X-ray Computer Tomography scanning devices) on a frame for directing beams onto articles having objects therein to detect the objects based on established criteria. The method also involves providing a cooling structure in such a manner that it will direct cooling fluid onto the imaging devices to cool these during apparatus operation.
    Type: Application
    Filed: February 22, 2008
    Publication date: June 19, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar C. Bhatt, Varaprasad V. Calmidi, James J. McNamara,, Sanjeev Sathe
  • Patent number: 7383629
    Abstract: A circuitized substrate in which two conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to an interim dielectric layer. Each of the two foil surfaces which physically bond to the dielectric are smooth (e.g., preferably by chemical processing) and include a thin, organic layer thereon, while the outer surfaces of both foils are also smooth (e.g., preferably also using a chemical processing step). One of these resulting conductive layers may function as a ground or voltage plane while the other may function as a signal plane with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided, as is a method of making the substrate.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: June 10, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, Voya R. Markovich, Michael Wozniak
  • Patent number: 7384856
    Abstract: A method of forming a capacitive substrate in which first and second conductors are formed opposite a dielectric, with one of these electrically coupled to a thru-hole connection. Each functions as an electrode for the resulting capacitor. The substrate is then adapted for being incorporated within a larger structure to form a circuitized substrate such as a printed circuit board or a chip carrier. Additional capacitors are also possible.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: June 10, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, Voya R. Markovich, James T. Matthews
  • Patent number: 7381587
    Abstract: A method of making a circuitized substrate and an electrical assembly utilizing same in which the substrate is comprised of at least two sub-composites in which the dielectric material of at least one of these sub-composites is heated during bonding (e.g., lamination) to the other sufficiently to cause the dielectric material to flow into and substantially fill openings in a conductive layer for the bonded structure. Conductive thru-holes are formed within the bonded structure to couple selected ones of the structure's conductive layers. Formation of an electrical assembly is possible by positioning one or more electrical components (e.g., semiconductor chips or chip carriers) on the final structure and electrically coupling these to the structure's external circuitry.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: June 3, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert M. Japp, John M. Lauffer, Voya R. Markovich, William E. Wilson
  • Publication number: 20080120835
    Abstract: A method of making a high speed interposer which includes a substrate having alternatingly oriented dielectric and conductive layers which form a substrate, openings which extend from one opposing surface of the substrate to a second opposing surface, conductive members positioned within the openings and also extending from surface to surface (and beyond, in some embodiments), and a plurality of shielding members positioned substantially around the conductive members to provide shielding therefore during the passage of high frequency signals through the conductive members.
    Type: Application
    Filed: January 25, 2008
    Publication date: May 29, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: David V. Caletka, Frank D. Egitto
  • Patent number: 7377033
    Abstract: A method of making circuitized substrate which includes a plurality of contiguous open segments which define facing edge portions within an electrically conductive layer to isolate separate portions of the conductive layer such that the layer can be used for different functions, e.g., as both power and ground elements, within a product (e.g., electrical assembly) which includes the substrate as part thereof. An information handling system, e.g., a mainframe computer, which represents one of the products in which the substrate may be utilized, is also provided.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: May 27, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, James M. Larnerd, Voya R. Markovich
  • Publication number: 20080117583
    Abstract: An information handling system, e.g., a mainframe computer, which includes as part thereof a housing having therein an electrical assembly including a circuitized substrate which in turn includes a plurality of contiguous open segments which define facing edge portions within an electrically conductive layer to isolate separate portions of the conductive layer such that the layer can be used for different functions, e.g., as both power and ground elements, within the system. At least one electrical component is positioned on and electrically coupled to the circuitized substrate of the system's electrical assembly.
    Type: Application
    Filed: January 18, 2008
    Publication date: May 22, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: John Lauffer, James Larnerd, Voya Markovich
  • Patent number: 7376218
    Abstract: An x-ray source assembly capable of producing x-rays suitable for use in medical, explosive detection, and other areas. The assembly includes a housing having a two-part socket member (which holds the assembly's x-ray tube therein) positioned therein. The two-part housing defines an opening through with the tube's x-rays are emitted.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: May 20, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Fletcher L. Chapin, Liza M. Hart, Allan O. Johnson
  • Publication number: 20080110016
    Abstract: A method of making a circuitized substrate assembly in which two or more subassemblies are aligned and bonded together. The bonding, preferably using lamination, results in effective electrical connections being formed between respective pairs of conductors of the subassemblies in such a manner that the metallurgies of the conductors, and those of an interim metallic solder paste, are effectively mixed and the flowable interim dielectric used between the mating subassemblies is forced to flow to engage and surround the conductor coupling, without adversely affecting the electrical connection formed.
    Type: Application
    Filed: November 14, 2006
    Publication date: May 15, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Norman A. Card, Thomas R. Miller, William J. Rudik
  • Publication number: 20080105457
    Abstract: A circuitized substrate which includes a high temperature dielectric material in combination with a low temperature conductive paste, the paste including an organic binder component and at least one metallic component. The flakes of the metallic component are sintered to form a conductive path through the dielectric when the dielectric is used as a layer in the substrate.
    Type: Application
    Filed: January 8, 2008
    Publication date: May 8, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Frank Egitto, Voya Markovich, Luis Matienzo
  • Publication number: 20080098595
    Abstract: A method of making a circuitized substrate in which pairs of vertically oriented though holes are formed such that at least one of the through holes is partially embedded within a lower one, thus assuring a sound connection following subsequent lamination or other steps the substrate including such holes is subjected to during manufacture. An electrical assembly including a substrate with such features is also provided.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 1, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: John S. Kresge, Cheryl L. Palomaki
  • Publication number: 20080087459
    Abstract: A circuitized substrate which utilizes at least one internal (embedded) resistor as part thereof, the resistor comprised of a material including resin and a quantity of powders of nano-particle and/or micro-particle sizes. The resistor serves to decrease the capacitance in the formed circuit while only slightly increasing the high frequency resistance, thereby improving circuit performance through the substantial elimination of some discontinuities known to exist in structures like these. An electrical assembly (substrate and at least one electrical component) is also provided.
    Type: Application
    Filed: June 4, 2007
    Publication date: April 17, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra Das, Michael Rowlands
  • Patent number: 7354197
    Abstract: An imaging inspection apparatus which utilizes a plurality of individual imaging devices (e.g., X-ray Computer Tomography scanning devices) positioned on a frame for directing beams onto articles having objects therein to detect the objects based on established criteria. The apparatus utilizes a cooling structure to provide cooling to the imaging devices.
    Type: Grant
    Filed: June 1, 2005
    Date of Patent: April 8, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar C. Bhatt, Varaprasad V. Calmidi, James J. McNamara, Jr., Sanjeev Sathe
  • Publication number: 20080078570
    Abstract: A circuitized substrate including a composite layer comprising a first dielectric sub-layer comprised of a halogen-free resin and fibers dispersed therein and a second dielectric sub-layer without fibers but also including a halogen-free resin with inorganic particulates therein. A method of making such a substrate is also provided, as is a multilayered assembly including one or more such circuitized substrates, possibly in combination with other substrates. An information handling system designed for having one or more such circuitized substrates is also provided.
    Type: Application
    Filed: October 3, 2006
    Publication date: April 3, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert M. Japp, Voya R. Markovich, Kostas I. Papthomas
  • Patent number: 7348677
    Abstract: A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole connects two adjacent layers and the other connects two adjacent layers, including one of the conductive layers connected by the other hole. It is also possible to connect all three conductive layers using one or more holes. The resulting holes may be filled, e.g., with metal plating, or conductive or non-conductive paste. In the case of the latter, it is also possible to provide a top covering conductive layer over the paste, e.g., to serve as a pad or the like on the board's external surface.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: March 25, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: James M. Larnerd, John M. Lauffer, Voya R. Markovich, Kostas I. Papathomas
  • Patent number: 7343674
    Abstract: A method of making a circuitized substrate assembly wherein the assembly includes individual circuitized substrates bonded together. The substrates each include at least one opening, and a cover is placed over one of the openings and a quantity of conductive paste is positioned thereon prior to bonding the substrates. At least some of the paste is then forced up into an opening in the other substrate as a result of the bonding.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: March 18, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: James W. Fuller, Jr., John M. Lauffer, Voya R. Markovich
  • Patent number: 7342183
    Abstract: A circuitized substrate which includes a high temperature dielectric material in combination with a low temperature conductive paste, the paste including an organic binder component and at least one metallic component. The flakes of the metallic component are sintered to form a conductive path through the dielectric when the dielectric is used as a layer in the substrate.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: March 11, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Frank D. Egitto, Voya R. Markovich, Luis J. Matienzo
  • Publication number: 20080054476
    Abstract: A circuitized substrate with a conductive layer which assures enhanced adhesion of the layer to selected dielectric layers used to form the circuitized substrate. The conductive layer includes at least one surface with the appropriate roughness to enable such adhesion and also good signal passage if the layer is used as a signal layer.
    Type: Application
    Filed: October 26, 2007
    Publication date: March 6, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Frank Egitto, Stephen Krasniak, John Lauffer, Voya Markovich, Luis Matienzo
  • Patent number: 7334323
    Abstract: A method of making a circuitized substrate which includes a high temperature dielectric material in combination with a low temperature conductive paste, the paste including an organic binder component and at least one metallic component. The flakes of the metallic component are sintered to form a conductive path through the dielectric when the dielectric is used as a layer in the substrate.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: February 26, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Frank D. Egitto, Voya R. Markovich, Luis J. Matienzo