Abstract: The present invention relates to methods of forming a film between two surfaces, in which the film includes diamond-like carbon. Also provided herein are uses of such films, such in sliding contacts and in metal coatings.
Type:
Grant
Filed:
May 21, 2019
Date of Patent:
March 9, 2021
Assignee:
National Technology & Engineering Solutions of Sandia, LLC
Inventors:
Nicolas Argibay, Michael T. Dugger, Michael E. Chandross, Tomas Farley Babuska, Brendan L. Nation, John Curry
Abstract: A reclaiming device that separates an absorption liquid from a coexisting material other than an absorbent includes: a gas-liquid separator that accepts the absorption liquid to be reclaimed together with water and separates the absorption liquid into a non-volatile material and a vaporized material; a first discharged liquid line that introduces a first discharged liquid discharged from the gas-liquid separator into the gas-liquid separator at a position below an absorption liquid introduction port; a first heater, disposed on the first discharged liquid line, that heats the first discharged liquid; a second discharged liquid line that introduces a second discharged liquid discharged from the gas-liquid separator into the gas-liquid separator at a position below a first discharged liquid introduction port; and a mixing tank, disposed on the second discharged liquid line, that mixes the second discharged liquid with an alkaline agent.
Type:
Grant
Filed:
November 29, 2016
Date of Patent:
March 9, 2021
Assignee:
Mitsubishi Heavy Industries Engineering, Ltd.
Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a first dielectric layer, a first semiconductor element, a second dielectric layer, and at least one first conducive via. The first dielectric layer has a first top surface, a first bottom surface opposite to the first top surface, and a first side surface extending from the first top surface to the first bottom surface. The first semiconductor element is disposed adjacent to the first top surface of the first dielectric layer. The second dielectric layer has a second top surface, a second bottom surface opposite to the second top surface, and a second side surface extending from the second top surface to the second bottom surface, where the second dielectric layer covers a top surface of the first semiconductor element and the first side surface of the first dielectric layer.
Type:
Application
Filed:
August 29, 2019
Publication date:
March 4, 2021
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A package structure includes a base material, at least one electronic device, at least one encapsulant and a plurality of dummy pillars. The electronic device is electrically connected to the base material. The encapsulant covers the electronic device. The dummy pillars are embedded in the encapsulant. At least two of the dummy pillars have different heights.
Type:
Application
Filed:
August 30, 2019
Publication date:
March 4, 2021
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A stacked structure includes a lower structure and an upper structure. The lower structure includes at least one lower dielectric layer and at least one lower metal layer in contact with the lower dielectric layer. The upper structure includes at least one upper dielectric layer and at least one upper metal layer in contact with the upper dielectric layer. The upper dielectric layer includes a first upper dielectric layer attached to the lower structure. The first upper dielectric layer includes a first portion and a second portion. A difference between a thickness of the first portion and a thickness of the second portion is greater than a gap between a highest point of a top surface of the first upper dielectric layer and lowest point of the top surface of the first upper dielectric layer.
Type:
Application
Filed:
August 30, 2019
Publication date:
March 4, 2021
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A package structure includes a base material, at least one electronic device, at least one dummy pillar and an encapsulant. The electronic device is electrically connected to the base material. The dummy pillar is disposed on the base material. The encapsulant covers the electronic device and a top end of the dummy pillar.
Type:
Application
Filed:
August 30, 2019
Publication date:
March 4, 2021
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: Detection and protection against electric power generator rotor turn-to-turn faults, rotor multi-point-to-ground faults, and rotor permanent magnet faults is provided herein. A fractional harmonic signal is used to determine the rotor fault condition. The fractional harmonic signal may be a fractional harmonic magnitude of the circulating current of one phase. The fractional harmonic may be a fractional harmonic magnitude of a neutral voltage. A tripping subsystem may issue a trip command based upon detection of a rotor turn-to-turn fault condition.
Type:
Application
Filed:
August 26, 2020
Publication date:
March 4, 2021
Applicant:
Schweitzer Engineering Laboratories, Inc.
Inventors:
Matchyaraju Alla, Ritwik Chowdhury, Normann Fischer, Dale S. Finney, Rogerio Scharlach
Abstract: A stacked structure includes a lower structure, an upper structure and a buffer layer. The lower structure includes at least one lower dielectric layer and at least one lower metal layer in contact with the lower dielectric layer. The upper structure includes at least one upper dielectric layer and at least one upper metal layer in contact with the upper dielectric layer. The buffer layer is interposed between the lower structure and the upper structure. A coefficient of thermal expansion (CTE) of the buffer layer is between a coefficient of thermal expansion (CTE) of the lower structure and a coefficient of thermal expansion (CTE) of the upper structure.
Type:
Application
Filed:
August 30, 2019
Publication date:
March 4, 2021
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: Systems and methods may be used to determine fault types and/or directions even during a loss of potential by receiving, at one or more processors, an indication of a pre-fault power flow direction for a power delivery system. The one or more processors then determine a fault direction during a fault for the power delivery system using current vector angles and the pre-fault power flow direction.
Type:
Application
Filed:
August 30, 2019
Publication date:
March 4, 2021
Applicant:
Schweitzer Engineering Laboratories, Inc.
Inventors:
Kanchanrao Gangadhar Dase, Mohammed Shabbir Pithapur
Abstract: A wiring structure includes a first dielectric layer, a second dielectric layer adjacent to the first dielectric layer, and a conductive region. The first dielectric layer defines a first opening, and the second dielectric layer defines a second opening. The conductive region includes a conductive via filling the first opening and the second opening. The conductive region further includes a first conductive trace embedded in the second dielectric layer and electrically connected with the conductive via. The conductive region includes a sidewall traversing through a thickness of the second dielectric layer with a substantial linear profile. A method of manufacturing a wiring structure is also disclosed.
Type:
Application
Filed:
August 27, 2019
Publication date:
March 4, 2021
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: An end effector includes an elongated body that is non-circular in cross section. A guide rail is mounted on a top surface of the elongated body. A hook carriage includes a linear motion guide that moves linearly along the guide rail to position a hook member. A locking mechanism locks the hook carriage at a preselected position along a length of the guide rail.
Type:
Application
Filed:
August 27, 2019
Publication date:
March 4, 2021
Applicant:
Toyota Motor Engineering & Manufacturing North America, Inc.
Abstract: A semiconductor device package includes a first passive component having a first surface and a second passive component having a second surface facing the first surface of the first passive component. The first surface has a recessing portion and the second surface includes a protruding portion within the recessing portion of the first surface of the first passive component. A contour of the protruding portion and a contour of the recessing portion are substantially matched. A method of manufacturing a semiconductor device package is also disclosed.
Type:
Application
Filed:
August 26, 2019
Publication date:
March 4, 2021
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A semiconductor device package includes a main substrate, at least one thin film transistor (TFT) module, at least one first electronic component, at least one encapsulant and a plurality of light emitting devices. The main substrate has a first surface and a second surface opposite to the first surface. The thin film transistor (TFT) module is disposed adjacent to and electrically connected to the first surface of the main substrate. The first electronic component is disposed adjacent to and electrically connected to the first surface of the main substrate. The encapsulant covers the at least one thin film transistor (TFT) module and the at least one first electronic component. The light emitting devices are electrically connected to the at least one thin film transistor (TFT) module.
Type:
Application
Filed:
August 30, 2019
Publication date:
March 4, 2021
Applicant:
Advanced Semiconductor Engineering, Inc.
Inventors:
Ming-Hung CHEN, Yung I. YEH, Chang-Lin YEH, Sheng-Yu CHEN
Abstract: A catalyst for COS hydrolysis includes titanium dioxide and a barium compound supported on the titanium dioxide. The catalyst, when expressing Ba and S in the catalyst in terms of BaO and SO3, respectively, has a molar ratio of SO3 to BaO of at least 1. The catalyst converts COS and H2O in a raw material gas to CO2 and H2S.
Type:
Application
Filed:
November 30, 2018
Publication date:
March 4, 2021
Applicant:
Mitsubishi Heavy Industries Engineering, Ltd.
Inventors:
Katsumi Nochi, Masanao Yonemura, Toshinobu Yasutake, Kaori Yoshida
Abstract: Embodiments herein are directed to an assembly having a plurality of machines, a first programmable logic controller device and a second programmable logic controller device commutatively coupled to the first programmable logic controller device. The second programmable logic controller device includes a human machine interface having a display and displaying a plurality of user inputs. A processing device communicatively coupled to the display and a storage medium. The storage medium includes one or more programming instructions that, when executed, cause the processing device to prompt a user to select a desired program, to input a desired line speed time, and to input a plurality of line control data. The data is converted into a simulated data and transferred to the first programmable logic controller device, which causes at least one machine of the plurality of machinery to move in a predetermined manner based on the simulated data.
Type:
Application
Filed:
August 26, 2019
Publication date:
March 4, 2021
Applicants:
Toyota Motor Engineering & Manufacturing North America, Inc., Toyota Jidosha Kabushiki Kaisha
Abstract: A body can be configured to be selectively morphable. The body can be at least partially hollow. The body can include a surface. A shape memory material member, such as a shape memory alloy wire, can extend along the surface. The shape memory material member can include a first region, a second region, and a central region located between the first region and the second region. The first and second regions of the shape memory material member can be constrained on the surface, such as by stitches. The central region of the shape memory material member can be unconstrained on the surface. When activated, the shape memory material member can contact, causing the body to bend in the central region due being constrained in the first and second regions. Thus, the body can be morphed into an activated configuration.
Type:
Grant
Filed:
April 29, 2019
Date of Patent:
March 2, 2021
Assignee:
Toyota Motor Engineering & Manufacturing North America, Inc.
Inventors:
Ryohei Tsuruta, Taewoo Nam, Eric Smith, Umesh N. Gandhi, Deborah Bumgardner
Abstract: Variable window filtered power system signals for electric power system monitoring and protection operations of an electric power system are provided herein. Upon detection of a power system disturbance, the filter window is decreased after a predetermined resize delay such that pre-disturbance samples are not included in the new window. As additional samples are obtained, the filter window grows to include new samples until the window reaches an initial filter window length. Gain and group delay correction factors accounting for window size and signal frequency are approximated.
Type:
Grant
Filed:
May 28, 2019
Date of Patent:
March 2, 2021
Assignee:
Schweitzer Engineering Laboratories, Inc.
Inventors:
Bogdan Z. Kasztenny, Chadburn Troy Daniels
Abstract: In some embodiments, an antenna may include a plurality of reflectarray tiles and a frame including a plurality of frame elements coupled electrically and mechanically. The frame may be configured to conform to a shape of a surface. Each frame element may be configured to receive one of the plurality of reflectarray tiles. In some aspects, the plurality of reflectarray tiles may be illuminated directly or indirectly by a feed.
Abstract: The present invention relates to a construct including a porous core, a cargo, and a spacer disposed between the core and the cargo. In some examples, the construct further includes an outer layer composed of a lipid, a polymer, or a combination thereof. Methods of making and employing such constructs are also described herein.
Type:
Grant
Filed:
September 25, 2018
Date of Patent:
March 2, 2021
Assignee:
National Technology & Engineering Solutions of Sandia, LLC
Inventors:
Darryl Y. Sasaki, Oscar Negrete, Edwin A. Saada, Patrick F. Fleig, Scott Reed, Eric L. Qiao
Abstract: A core/shell nanoparticle with enhanced emission comprises a fluorescent conjugated polymer core that is encapsulated by an amphiphilic block copolymer shell. The core/shell nanoparticle structure confines the electronic charge to improve quantum yield and is water soluble to enable low-cost and environmentally friendly processing.
Type:
Grant
Filed:
May 15, 2018
Date of Patent:
March 2, 2021
Assignees:
National Technology & Engineering Solutions of Sandia, LLC, University of Akron
Inventors:
Hongyou Fan, Kaifu Bian, Leanne Julia Alarid, Yu Zhu