Abstract: Disclosed is a semiconductor structure. The semiconductor structure includes: a multiple quantum well layer including a quantum barrier layer and a quantum well layer which are alternately arranged; and a protective layer formed on the quantum well layer, where the protective layer is made of an oxygen-doped nitride material. In the present disclosure, the presence of the oxygen-doped protective layer may achieve a longer luminous wavelengths through an InGaN quantum well material with a lower In component.

Abstract: Disclosed are a semiconductor structure and a preparation method thereof. The semiconductor structure comprises a first nitride semiconductor layer, a second nitride semiconductor layer formed on the first nitride semiconductor layer, and a third nitride semiconductor layer formed on the second nitride semiconductor layer with a groove penetrating through the third nitride layer. In the present disclosure, by etching the groove on the third nitride semiconductor layer of P-type doping, and then secondarily extending selectively a N-type doped source region in the groove, the sharp P-N interface formed between the third nitride semiconductor layer and the second nitride semiconductor layer can further help control the shape of the groove, reduce the on-resistance and improve the breakdown voltage of the semiconductor structure.

Abstract: The present disclosure provides a vertically conductive semiconductor structure, including a heavily doped layer, a first semiconductor layer, a second semiconductor layer and an ion implanted region in the second semiconductor layer. Conductivity types of the heavily doped layer and the first semiconductor layer are same, and conductivity types of the first semiconductor layer and the second semiconductor layer are opposite. Materials of the first semiconductor layer and the second semiconductor layer are GaN-based materials. Conductivity types of the ion implanted region and the second semiconductor layer are opposite. The ion implanted region includes a first end and a second end that are opposite to each other. The first end is flush with a surface of the second semiconductor layer far from the first semiconductor layer, and the second end connects the first semiconductor layer. A width of the ion implanted region from bottom to top varies.

Abstract: The present disclosure provides a light sensing unit, a gallium nitride (GaN)-based image sensor, and a display apparatus thereof. The light sensing unit includes: red, green, and blue light sensing sub-units, where materials of a light sensing layer of each of the light sensing sub-units are GaN-based materials containing indium(In). The materials of the light sensing layers may contain different contents of In, such that the light sensing sub-units are enabled to generate or not generate light sensing electrical signals according to different wave lengths of received light. During a GaN-based material growth process, the contents of In in different regions are controlled to prepare the light sensing sub-units at the same time to increase integration degrees of the light sensing unit, the GaN-based image sensor, and the display apparatus containing the light sensing unit to achieve miniaturization.

Abstract: Disclosed is an image sensor. The image sensor includes at least one photosensitive unit including at least two photosensitive layers stacked and not completely overlapped, a region where each photosensitive layer is not overlapped with other photosensitive layers being configured to arrange an electrode wire, and photosensitive component contents of the at least two photosensitive layers being different. According to the present disclosure, a wavelength range of sensible light of each photosensitive unit may be enlarged, so that more image details may be recorded, images with a high dynamic range may be generated, and people may experience a visual effect close to a real environment. In addition, as there is no need to reduce a photosensitive area of the photosensitive layer for arranging the electrode wires, the photosensitive area of the photosensitive layer is increased and thereby a dynamic range of the image sensor is improved.

Abstract: Disclosed are a semiconductor structure and a method for manufacturing a semiconductor structure, the method includes: forming a first transition layer, a protection layer and an active structure layer sequentially epitaxially on a side of a growth substrate, where a surface, away from the growth substrate, of the first transition layer is a two-dimensional flat surface; on a first plane, an orthographic projection of the active structure layer is at least partially covered by an orthographic projection of the protection layer, and the first plane is perpendicular to an arrangement direction of the protection layer and the active structure layer; detaching the growth substrate by a laser lift-off process, to make the epitaxial layer transferred to a transfer substrate; etching the first transition layer up to the protection layer, to make a surface, away from the active structure layer, of the protection layer to be a planarization surface.

Abstract: A light emitting device includes: a first substrate; a light emitting structure layer located on the first substrate; and an insertion layer located on the light emitting structure layer, a surface, away from the light emitting structure layer, of the insertion layer is a roughened surface, and the insertion layer has a protective effect on the light emitting structure layer. In the light emitting device provided by the present disclosure, the surface, away from the light emitting structure layer, of the insertion layer is the roughened surface, and the insertion layer has the protective effect on the light emitting structure layer during a peeling off process, which solves problems of reduced yield and reduced light extraction efficiency of a light emitting device.

Abstract: A semiconductor structure includes: a first semiconductor layer, including a first surfaces and a second surfaces opposite to the first surface; a second semiconductor layer, disposed on the first semiconductor layer, where a conductive type of the second semiconductor layer is the same as that of the first semiconductor layer, and a doping concentration of the second semiconductor layer is less than that of the first semiconductor layer; grooves, formed in the second semiconductor layer; and a third semiconductor layer, where a conductive type of the third semiconductor layer is different from that of the second semiconductor layer, a material of the third semiconductor layer is different from that of the second semiconductor layer, and at least a portion of the third semiconductor layer is disposed in the grooves.

Abstract: An epitaxial structure of a light-emitting device and a manufacturing method thereof are provided. The epitaxial structure of the light-emitting device includes a first semiconductor layer, an active region and a second semiconductor layer sequentially stacked; where the active region includes at least one group of a barrier layer and a quantum well layer which are stacked, a surface of the quantum well layer away from the first semiconductor layer has a first roughness, a surface of the barrier layer away from the first semiconductor layer has a second roughness, and the first roughness is greater than the second roughness.

Abstract: Disclosed is an image sensor, comprising: at least one photosensitive unit, where the photosensitive unit includes a main photosensitive region and an auxiliary photosensitive region arranged at the periphery of the main photosensitive region, and a photosensitive component content of the main photosensitive region is different from a photosensitive component content of the auxiliary photosensitive region. The disclosure enlarges a wavelength range of sensible light of each the photosensitive unit by arranging the auxiliary photosensitive region at the periphery of the main photosensitive region of the photosensitive unit, where the photosensitive component content of the main photosensitive region is different from that of the auxiliary photosensitive region. Thereby more image details may be recorded to generate images with high dynamic range, which enables people to experience a visual effect close to a real environment.

Abstract: A light emitting device includes: a substrate; a DBR mask layer on a side of the substrate, the DBR mask layer being provided with a window exposing the substrate, the window including an opening end away from the substrate and a bottom wall end close to the substrate, and on a plane where the substrate is located, an orthographic projection of the opening end falling within an orthographic projection of the bottom wall end; and a light emitting unit. The light emitting unit includes an active layer located on a side, away from the substrate, of the DBR mask layer. Providing the window on the DBR mask layer may reduce dislocation density during epitaxial growth of the light emitting unit, and arrangement of the DBR mask layer may improve light extraction efficiency of the light emitting device.

Abstract: The present disclosure provides a semiconductor structure, including: a substrate, a first-type mask layer, a second-type mask layer, and an epitaxial layer; where the first-type mask layer includes a first mask multilayer, the first mask multilayer includes a first mask layer and a second mask layer, the first mask layer includes a first window, the second mask layer includes a second window communicating with the first window, the second window and the first window constitute a first-type window, and a cross-section of the second window is larger than that of the first window; the second-type mask layer is located on a side of the first-type mask layer away from the base; the second-type mask layer includes a second-type window communicating with the first-type window, and a cross-section of the second-type window is smaller than that of the second window.

Abstract: Disclosed is a semiconductor structure, including a substrate; a V-shaped groove layer, a V-shaped groove enlargement layer and a semiconductor epitaxial layer stacked from bottom to top; a first V-shaped groove arranged on a surface of the V-shaped groove layer close to the V-shaped groove enlargement layer; a second V-shaped groove arranged on a surface of the V-shaped groove enlargement layer close to the semiconductor epitaxial layer, where a size of the second V-shaped groove is greater than a size of the first V-shaped groove In the present disclosure, a lateral epitaxy effect of the V-shaped groove enlargement layer and the semiconductor epitaxial layer is realized for two times, which makes dislocation fully bend, effectively improving crystal quality. Meanwhile, the first V-shaped groove and the second V-shaped groove are self-formed during an epitaxial growth process, which greatly reduces preparation cost and improves preparation efficiency.

Abstract: In the present disclosure, a semiconductor structure and a manufacturing method of the semiconductor structure are provided. The semiconductor structure includes a base, a first mask layer, a first epitaxial layer, and a second epitaxial layer. The first mask layer is located on the base, and the first mask layer has a first window that exposes the base. The first window includes an opening end far from the base and a bottom wall end close to the base. On the plane where the base is located, the orthographic projection of the opening end falls within the bottom wall end.

Abstract: The present disclosure provides a semiconductor structure and a manufacturing method of the semiconductor, including: a first semiconductor layer, where first protrusions are at a first surface of the first semiconductor layer; and a second semiconductor layer on the first semiconductor layer, where second protrusions are at a surface of the second semiconductor layer away from the first semiconductor layer, the second protrusions correspond to the first protrusions. A conductivity type of the second semiconductor layer is the same as a conductivity type of the first semiconductor layer, and a doping concentration of the second semiconductor layer is lower than a doping concentration of the first semiconductor layer. The third semiconductor layer is on the second semiconductor layer, and a conductivity type of the third semiconductor layer is opposite to the conductivity type of the first semiconductor layer.

Abstract: The present disclosure provides a semiconductor structure including a substrate, an insulation layer on the substrate; a protrusion structure protruding out of the insulation layer, where the protrusion structure includes a source region, a drain region and a channel region between whereof; the protrusion structure includes a first heterojunction structure, . . . and an n-th heterojunction structure sequentially stacked along a direction away from the substrate, where n is an integer greater than or equal to 2; the first heterojunction structure includes a first channel layer and a first barrier layer, . . . the n-th heterojunction structure includes an n-th channel layer and an n-th barrier layer, and at least one of the first barrier layer, . . . or the n-th barrier layer is doped with an N-type element; the source electrode on the source region, the drain electrode on the drain region, and the gate structure on the channel region.

Abstract: A semiconductor structure is provided, and comprises: a substrate, an insulation layer and a protruding structure. The insulation layer is located on the substrate, and the protruding structure protrudes from the insulation layer, where the protruding structure further includes a first heterojunction structure, a second heterojunction structure, . . . , and an n-th heterojunction structure that are sequentially stacked in a direction away from the substrate, and n is greater than or equal to 2, wherein the first heterojunction structure includes a first channel layer and a first barrier layer, the second heterojunction structure includes a second channel layer and a second barrier layer, . . . , and the n-th heterojunction structure includes an n-th channel layer and an n-th barrier layer, and component proportions of at least two of the first barrier layer, the second barrier layer, . . . , or the n-th barrier layer are different.

Abstract: Disclosed are a semiconductor structure and a preparation method thereof. The semiconductor structure includes a substrate, including a first region arranged at the center of the substrate and a second region arranged at the periphery of the first region; and a composite buffer layer arranged on the substrate, including a carbon-containing first buffer layer including at least one set of a first sub-buffer layer and a second sub-buffer layer stacked in layers; therein, a carbon concentration of the first sub-buffer layer arranged at the first region is higher than that arranged at the second region; and a carbon concentration of the second sub-buffer layer arranged at the first region is lower than that at arranged the second region. Therefore, uniformity of the carbon concentration of the composite buffer layer is improved to improve resistivity of the composite buffer layer, so as to increase breakdown voltage and improve device performance.

Abstract: The present application provides methods for manufacturing a vertical device. To begin with, a GaN-based semiconductor substrate is etched from a front surface to form a trench. Then, a P-type semiconductor layer and an N-type semiconductor layer are sequentially formed on a bottom wall and side walls of the trench and the front surface of the semiconductor substrate. The trench is partially filled with the P-type semiconductor layer. Thereafter, the N-type semiconductor layer and the P-type semiconductor layer are planarized, and the P-type semiconductor layer and the N-type semiconductor layer in the trench are retained. Next, a gate structure is formed at a gate area of the front surface of the semiconductor substrate, a source electrode is formed on two sides of the gate structure, and a drain electrode is formed on a rear surface of the semiconductor substrate respectively.

Abstract: The present disclosure provides a composite substrate and semiconductor device structure, where the composite substrate includes: a base; a DBR layer on a side of the base; and a growing substrate on a side of the DBR layer far from the base. In the present disclosure, the growing substrate can be prepared on the top layer of the DBR layer by a bonding process, which requires a lower temperature than the high-temperature epitaxial process, reducing the risk of DBR layer decomposition during the preparation of the growing substrate, thereby, improving the stability of the DBR layer.