Abstract: The present disclosure provides a semiconductor structure including a substrate, an insulation layer on the substrate; a protrusion structure protruding out of the insulation layer, where the protrusion structure includes a source region, a drain region and a channel region between whereof; the protrusion structure includes a first heterojunction structure, . . . and an n-th heterojunction structure sequentially stacked along a direction away from the substrate, where n is an integer greater than or equal to 2; the first heterojunction structure includes a first channel layer and a first barrier layer, . . . the n-th heterojunction structure includes an n-th channel layer and an n-th barrier layer, and at least one of the first barrier layer, . . . or the n-th barrier layer is doped with an N-type element; the source electrode on the source region, the drain electrode on the drain region, and the gate structure on the channel region.

Abstract: The present disclosure provides a semiconductor structure and a manufacturing method of the semiconductor, including: a first semiconductor layer, where first protrusions are at a first surface of the first semiconductor layer; and a second semiconductor layer on the first semiconductor layer, where second protrusions are at a surface of the second semiconductor layer away from the first semiconductor layer, the second protrusions correspond to the first protrusions. A conductivity type of the second semiconductor layer is the same as a conductivity type of the first semiconductor layer, and a doping concentration of the second semiconductor layer is lower than a doping concentration of the first semiconductor layer. The third semiconductor layer is on the second semiconductor layer, and a conductivity type of the third semiconductor layer is opposite to the conductivity type of the first semiconductor layer.

Abstract: A semiconductor structure is provided, and comprises: a substrate, an insulation layer and a protruding structure. The insulation layer is located on the substrate, and the protruding structure protrudes from the insulation layer, where the protruding structure further includes a first heterojunction structure, a second heterojunction structure, . . . , and an n-th heterojunction structure that are sequentially stacked in a direction away from the substrate, and n is greater than or equal to 2, wherein the first heterojunction structure includes a first channel layer and a first barrier layer, the second heterojunction structure includes a second channel layer and a second barrier layer, . . . , and the n-th heterojunction structure includes an n-th channel layer and an n-th barrier layer, and component proportions of at least two of the first barrier layer, the second barrier layer, . . . , or the n-th barrier layer are different.

Abstract: Disclosed are a semiconductor structure and a preparation method thereof. The semiconductor structure includes a substrate, including a first region arranged at the center of the substrate and a second region arranged at the periphery of the first region; and a composite buffer layer arranged on the substrate, including a carbon-containing first buffer layer including at least one set of a first sub-buffer layer and a second sub-buffer layer stacked in layers; therein, a carbon concentration of the first sub-buffer layer arranged at the first region is higher than that arranged at the second region; and a carbon concentration of the second sub-buffer layer arranged at the first region is lower than that at arranged the second region. Therefore, uniformity of the carbon concentration of the composite buffer layer is improved to improve resistivity of the composite buffer layer, so as to increase breakdown voltage and improve device performance.

Abstract: The present application provides methods for manufacturing a vertical device. To begin with, a GaN-based semiconductor substrate is etched from a front surface to form a trench. Then, a P-type semiconductor layer and an N-type semiconductor layer are sequentially formed on a bottom wall and side walls of the trench and the front surface of the semiconductor substrate. The trench is partially filled with the P-type semiconductor layer. Thereafter, the N-type semiconductor layer and the P-type semiconductor layer are planarized, and the P-type semiconductor layer and the N-type semiconductor layer in the trench are retained. Next, a gate structure is formed at a gate area of the front surface of the semiconductor substrate, a source electrode is formed on two sides of the gate structure, and a drain electrode is formed on a rear surface of the semiconductor substrate respectively.

Abstract: The present disclosure provides a composite substrate and semiconductor device structure, where the composite substrate includes: a base; a DBR layer on a side of the base; and a growing substrate on a side of the DBR layer far from the base. In the present disclosure, the growing substrate can be prepared on the top layer of the DBR layer by a bonding process, which requires a lower temperature than the high-temperature epitaxial process, reducing the risk of DBR layer decomposition during the preparation of the growing substrate, thereby, improving the stability of the DBR layer.

Abstract: Disclosed are a composite substrate and a semiconductor structure, and the composite substrate includes a first semiconductor layer and a second semiconductor layer that are stacked, at least one heat dissipation groove is disposed on a surface, close to the second semiconductor layer, of the first semiconductor layer, a heat dissipation channel is disposed on a side wall of the first semiconductor layer, or a surface, away from the second semiconductor layer, of the first semiconductor layer, and the heat dissipation channel is in communication with the heat dissipation groove. The composite substrate and the semiconductor structure according to the present application can effectively resolve a heat dissipation problem of a high-power gallium nitride-based component by using a heat dissipation channel and a heat dissipation groove that are interconnected internal and external.

Abstract: A composite substrate, a photoelectric device and a preparation method therefor. The composite substrate comprises a base substrate and a nano-diamond structure located on the base substrate; the nano-diamond structure comprises a plurality of nano-diamond protrusions arranged at intervals, and a gap is provided between two adjacent nano-diamond protrusions. The photoelectric device comprises the composite substrate, and further comprises a first semiconductor layer, an active layer, and a second semiconductor layer stacked on the composite substrate; the first semiconductor layer comprises protruding portions and a flat portion sequentially stacked in the vertical direction, the protruding portions are in the gaps and correspond one-to-one to the gaps, and the flat portion is located on the protruding portions and the nano-diamond structure. The preparation method for the photoelectric device is used for manufacturing the photoelectric device.

Abstract: Embodiments of the present application disclose a semiconductor structure and a manufacturing method for the semiconductor structure, which solve problems of complicated manufacturing process and poor stability and reliability of existing semiconductor structures. The semiconductor structure includes: a substrate; a channel layer and a barrier layer sequentially superimposed on the substrate, wherein the channel layer and the barrier layer are made of GaN-based materials and an upper surface of the barrier layer is Ga-face; and a p-type GaN-based semiconductor layer formed in a gate region of the barrier layer. An upper surface of the p-type GaN-based semiconductor layer is N-face.

Abstract: A manufacturing method for the LED structure, including: growing a first conductive-type semiconductor layer on a substrate; growing an active layer on the first conductive-type semiconductor layer, where the active layer includes a potential well layer, an insertion layer and a potential barrier layer that are stacked, the insertion layer includes a first insertion layer and a second insertion layer that are stacked, a quantum confinement Stark effect is generated between the first insertion layer and the potential well layer, the materials of the potential well layer, the first insertion layer and the potential barrier layer are all group III-V semiconductor materials, and the material of the second insertion layer includes Si—N bonds for repairing V-type defects of the first insertion layer; and growing a second conductive-type semiconductor layer on the active layer, where the first conductive-type semiconductor layer and the second conductive-type semiconductor layer have opposite conductivity types.

Abstract: A GaN-based laser and a manufacturing method thereof are provided in this present disclosure. The GaN-based laser includes: an epitaxial substrate unit; and a light-emitting unit located on the epitaxial substrate unit, where the light-emitting unit includes an active layer unit, which is arranged parallel to the epitaxial substrate unit; the light emitting unit includes a pair of first sidewall and second sidewall, which are opposite to each other; a first reflector is provided on the first sidewall and a second reflector is provided on the second sidewall, and the first reflector or second reflector corresponds to the light emitting surface. The first reflector and the second reflector are arranged on the side surfaces of the active layer unit.

Abstract: Disclosed are a light-emitting chip, a manufacturing method thereof and an electronic device. The light-emitting chip includes a first substrate; and at least one reflector and a light-emitting pixel layer sequentially located on the first substrate. The light-emitting pixel layer includes at least one light-emitting pixel. The reflector is arranged corresponding to the light-emitting pixel. A first surface, close to the light-emitting pixel, of the reflector is a bowl-shaped surface. The bowl-shaped surface is concave in a direction close to the first substrate. The reflector is configured to reflect light emitted by a corresponding light-emitting pixel and adjust an emission direction and/or an emission angle of the light, so that the light exit rate of the light-emitting chip can be improved, and the light-emitting brightness of the light-emitting chip and electronic device can be further improved.

Abstract: A light-emitting device includes: a substrate; a first mask layer, a first epitaxial layer and a light-emitting structure. The first mask layer is arranged on the substrate and includes a first opening exposing the substrate, the first opening includes an open end, an area of an orthographic projection of the open end on a plane where the substrate is located is smaller than an area of an orthographic projection of the first opening on the plane where the substrate is located; the first epitaxial layer is epitaxially grown in the first opening on the substrate to fill up the first opening; and the light-emitting structure is arranged on the first epitaxial layer and on the first mask layer. An inward sidewall of the first opening is utilized to terminate dislocations of GaN-based material, thereby reducing a dislocation density of the GaN-based material and improving a light-emitting efficiency.

Abstract: The present disclosure provides a manufacturing method of semiconductor structure, including: providing a structure to be peeled off, where the structure to be peeled off includes a first structure and a second structure, the first structure includes: a base; a first mask layer located on the base, where a first opening that exposes the base is provided in the first mask layer, and a first epitaxial layer epitaxially grown from the base to fill up the first opening; and the second structure includes: a second epitaxial layer located on the first epitaxial layer and the first mask layer; and applying force on the structure to be peeled off to fracture the second epitaxial layer and the first epitaxial layer, to peel off the first structure and make the second structure form a semiconductor structure.

Abstract: Disclosed is a semiconductor structure. The semiconductor structure includes a support structure, and a first dielectric layer and a growth substrate sequentially formed on the support structure, where a gravity center of the support structure and a gravity center of the growth substrate are disposed in a staggered manner, so that the direct contact between the growth substrate and the graphite disk can be avoided, a centrifugal force on the growth substrate exerted by the graphite disk to the support structure can be transferred, thereby further ensuring a quality of the growth substrate, and significantly reducing a probability of cracking to ensure a crystal quality of a subsequent epitaxial layer. The support structure is formed at the bottom of the growth substrate, so that a mechanical strength of the semiconductor structure can be effectively improved, a stability can be enhanced, and a deformation of the semiconductor structure can be suppressed.

Abstract: Disclosed are a composite substrate, a manufacturing method thereof and a semiconductor device. The composite substrate includes a first substrate, a bonding layer, and a second substrate which are stacked sequentially, where the first substrate comprises a plurality of protruding structures disposed on a side close to the second substrate, and a groove formed between at least two protruding structures of the plurality of protruding structures. The composite substrate provided by the present disclosure, by setting a bonding layer, a bond strength between the first substrate and the second substrate may be improved, and a mechanical strength of the composite substrate is enhanced. By setting the groove, a stress transmitted from the second substrate to the first substrate may be attenuated, so as to improve the mechanical strength of the composite substrate and avoid a plastic deformation in a subsequent epitaxial process.

Abstract: A structure includes a base; a first mask layer disposed on the base, where the first mask layer has a first channel exposing the base, the first channel comprises a first open end and a second open end, the second open end is close to a surface of the base, the first open end is away from the surface of the base, and an area of an orthographic projection of the first open end in a plane where the base is located is smaller than an area of an orthographic projection of the first channel in the plane; and a second mask layer disposed on the first mask layer, where the second mask layer has a second channel exposing the first mask layer, and the second channel is connected to the first channel.

Abstract: A light-emitting device and a method for manufacturing the same are provided. The method includes: providing an epitaxial base with a first concave portion, wherein an inner surface of the first concave portion is a curved surface; epitaxially growing a light-emitting structure layer on the epitaxial base, wherein the light-emitting structure layer comprises a first surface and a second surface opposite the first surface, and the second surface protrudes towards the first concave portion; forming a first reflector layer on the first surface; and removing the epitaxial base to form a second reflector layer covering the second surface. A curved resonant cavity can be formed by the method.

Abstract: Disclosed are a micro light-emitting diode chip, a manufacturing method therefor, and an electronic device. The micro light-emitting diode chip includes: a substrate; a plurality of light-emitting units, where a light-emitting unit is located on a side of the substrate, the light-emitting unit includes a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence, the first semiconductor layer is located on a side, away from the substrate, of the second semiconductor layer, and the light-emitting unit further includes a reflective sidewall, which constitutes a sidewall of the active layer, the second semiconductor layer and at least a part of the first semiconductor layer; and a blocking portion, where at least a part of the blocking portion is located between first semiconductor layers of two of the light-emitting units.

Abstract: Disclosed are a film bulk acoustic resonator and a manufacturing method therefor. The film bulk acoustic resonator includes: a substrate, a buffer layer, a first electrode layer, a piezoelectric layer, a second electrode layer stacked in sequence, and a cavity structure arranged between the substrate and the first electrode layer and at least partially located in the buffer layer, where the first electrode layer includes an N-type semiconductor. The N-type semiconductor has an integrated structure and may be used as an electrode, so that the cavity structure at least partially located in the buffer layer may be formed first, and then the N-type semiconductor is arranged on the cavity structure. Thus, there is no need to etch sacrificial materials to form the cavity structure, thereby reducing probability of device reliability deterioration due to etching sacrificial materials.