Abstract: The present invention discloses a semiconductor structure and a method for manufacturing the semiconductor structure. The semiconductor structure includes: a substrate; and at least one composition adjusting layer disposed above the substrate; wherein each of the at least one composition adjusting layer is made of a semiconductor compound, the semiconductor compound at least comprises a first element and a second element, and an atomic number of the first element is less than an atomic number of the second element, wherein in each of the at least one composition adjusting layer, along an epitaxial direction of the substrate, an atomic percentage of the first element in a compound composition is gradually decreased at first and then gradually increased, a thickness of a gradual decrease section is greater than a thickness of a gradual increase section.

Abstract: A semiconductor light-emitting device comprises: an insulating base, a current diffusion layer, light-emitting structure layers and an insulating layer. The current diffusion layer includes: a first electrode connecting part, a second electrode connecting part, N contact parts and N+1 flat parts. N+1 light-emitting structure layers are correspondingly disposed on the N+1 flat parts, and each of the N+1 light-emitting structure layers includes: a first semiconductor layer, an active layer and a second semiconductor layer sequentially stacked on a corresponding flat part. N grooves are formed on a side of the second semiconductor layer away from the active layer, depth of the N grooves is less than the thickness of the second semiconductor layer, and the N contact parts correspond to the N grooves.

Abstract: The invention provides a semiconductor structure and a method of preparing a semiconductor structure, which solves the problems of easy cracking, large warpage and large dislocation density which exist in epitaxial growth of a semiconductor compound epitaxial structure on a substrate in the prior art. The semiconductor structure includes: a substrate; at least one periodic structure disposed over the substrate; wherein each of the periodic structures includes at least one period, each period including a first periodic layer and a second periodic layer which are sequentially stacked in an epitaxial direction; wherein the thickness of the nth periodic structure is smaller than the thickness of the (n+1)th periodic structure, wherein n is an integer greater than or equal to 1.

Abstract: An III group nitride semiconductor device comprises: a substrate; a nitride semiconductor layer located on the substrate; a passivation layer located on the nitride semiconductor layer, a portion of the passivation layer in a gate region being etched to expose the nitride semiconductor layer so as to form a gate groove; a composite dielectric layer located on the passivation layer and the gate groove, the composite dielectric layer comprising one or more combination structures of two or more of a nitride dielectric layer, an oxynitride dielectric layer and an oxide dielectric layer which are formed sequentially in the direction away from the substrate; and a source electrode and a drain electrode respectively located in a source region and a drain region on the nitride semiconductor layer, and a gate electrode located in a gate region between the source region and the drain region on the composite dielectric layer.

Abstract: The invention provides a semiconductor structure and a method of preparing a semiconductor structure, which solves the problems of easy cracking, large warpage and large dislocation density which exist in a semiconductor compound epitaxial structure epitaxially grown on a substrate in the prior art. The semiconductor structure includes: a substrate; at least one periodic structure disposed over the substrate; wherein each of the periodic structures includes at least one period, each period including a first periodic layer and a second periodic layer which are sequentially stacked in an epitaxial direction.

Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes: a substrate, a bonding metal layer, a reflective layer, a first conductive layer, an active layer, a second conductive layer, first electrode(s) and second electrode(s). The first electrode(s) extends, from one side of the bonding metal layer away from the substrate, to the first conductive layer, to be connected with the bonding metal layer and the first conductive layer. The second electrode(s) penetrates through the substrate and the bonding metal layer to be in contact with the reflective layer. The semiconductor device, forming a structure sharing the first conductive layer, has more uniform illumination and a higher light extraction rate, and eliminates interferences between pixel units, achieves better uniformity of emitted light wavelength and makes distribution of electric current flowing through different pixel units more even.

Abstract: The invention provides a semiconductor structure and a method of preparing a semiconductor structure, which solves the problems of easy cracking, large warpage and large dislocation density which exist in epitaxial growth of a semiconductor compound epitaxial structure on a substrate in the prior art. The semiconductor structure includes: a substrate; at least one periodic structure disposed over the substrate; wherein each of the periodic structures includes at least one period, each period including a first periodic layer and a second periodic layer which are sequentially stacked in an epitaxial direction; wherein the thickness of the nth periodic structure is smaller than the thickness of the (n+1)th periodic structure, wherein n is an integer greater than or equal to 1.

Abstract: A method of forming a semiconductor structure is provided. The method includes providing a substrate with a first melting point. A sacrificial layer with a second melting point is forming over the substrate. The second melting point is less than the first melting point. A stack of semiconductor layers is formed over the sacrificial layer. The stack of semiconductor layers has a third melting point greater than the second melting point and a formation temperature less than the second melting point. A thermal process is performed at a temperature greater than the second melting point and less than the first melting point and the third melting point in order to melt the sacrificial layer such that the substrate is stripped from the stack of semiconductor layers.

Abstract: The invention provides a semiconductor structure and a method of preparing a semiconductor structure, which solves the problems of easy cracking, large warpage and large dislocation density which exist in a semiconductor compound epitaxial structure epitaxially grown on a substrate in the prior art. The semiconductor structure includes: a substrate; at least one periodic structure disposed over the substrate; wherein each of the periodic structures includes at least one period, each period including a first periodic layer and a second periodic layer which are sequentially stacked in an epitaxial direction.

Abstract: An patterned Si substrate-based LED epitaxial wafer and a preparation method therefor, the LED epitaxial wafer comprising: a patterned Si substrate (1) and an Al2O3 coating (2) growing on the patterned Si substrate (1); sequentially growing on the Al2O3 coating (2) are a nucleating layer (3), a first buffer layer (4), a first insertion layer (5), a second buffer layer (6), a second insertion layer (7), an n-GaN layer (8), a quantum well layer (9), a p-GaN layer (10), an n-electrode (14) electrically connected to the n-GaN layer and a p-electrode (13) electrically connected to the p-GaN layer. The present invention is suitable for the preparation of large-sized LED epitaxial wafers. Furthermore, the crystal quality is improved, and the light extraction efficiency of the LED die is improved.

Abstract: A semiconductor substrate, a semiconductor device and a manufacturing method of the semiconductor substrate are provided. The semiconductor substrate comprises a first semiconductor layer and a second semiconductor layer located on the first semiconductor layer. The first semiconductor layer and the second semiconductor layer, as well as semiconductor layers obtained by symmetrically rotating the first semiconductor layer and the second semiconductor layer according to their respective lattice structures, have different cleavage planes in a vertical direction. By providing the semiconductor substrates having composite structures, even if thicknesses of the substrates are not changed, the damages to the semiconductor substrates due to stresses by the semiconductor epitaxial layers can be reduced, thereby decreasing the likelihood of breakage of the semiconductor substrates. Furthermore, the processing difficulty is reduced and the reliability of the semiconductor devices is improved.

Abstract: A method of manufacturing an enhanced device and an enhance device are provided. The method comprises: preparing a substrate, and forming a non-planar structure in the substrate; depositing a nitride channel layer on the substrate, a gate region, a source region and a drain region being defined on the nitride channel layer, the gate region of the nitride channel layer having a non-planar structure transferred from the non-planar structure of the substrate; depositing a nitride barrier layer on the nitride channel layer, the nitride barrier layer having a non-planar structure located above and corresponding to the non-planar structure of the nitride channel layer, the nitride barrier layer and the nitride channel layer forming a nitride channel layer/nitride barrier layer heterojunction.

Abstract: A high-voltage nitride device which can avoid vertical breakdown and has a high breakdown voltage includes: a silicon substrate; a nitride epitaxial layer, prepared on the silicon substrate; a positive electrode and a negative electrode, both of which are contacted with the nitride epitaxial layer; and at least one spatial isolation area, formed in a region between the silicon substrate and the nitride epitaxial layer vertically and between the positive electrode and the negative electrode horizontally.

Abstract: An enhanced switch device and a manufacturing method therefor. The method comprises: providing a substrate, and forming a nitride transistor structure on the substrate; fabricating and forming a dielectric layer on the nitride transistor structure, on which a gate region is defined; forming a groove structure on the gate region; depositing a p-type semiconductor material in the groove; removing the p-type semiconductor material outside the gate region on the dielectric layer; etching the dielectric layer in another position than the gate region on the dielectric layer to form two ohmic contact regions; and forming a source electrode and a drain electrode on the two ohmic contact regions, respectively.

Abstract: A semiconductor device comprises: a semiconductor device active region; an electrode shape controlling layer disposed on the semiconductor device active region, the electrode shape controlling layer containing aluminum, the content of aluminum being changed in a direction from bottom to up from the semiconductor device active region, an electrode region being disposed on the electrode shape controlling layer, a groove extended toward the semiconductor device active region and penetrating through the electrode shape controlling layer longitudinally being disposed in the electrode region, all or part of a side surface of the groove having a shape corresponding to the content of aluminum in the electrode shape controlling layer; and an electrode disposed in the groove in the electrode region entirely or partially, the electrode having a shape matching with the shape of the groove, a bottom portion of the electrode being contacted with the semiconductor device active region.

Abstract: A high-voltage nitride device which can avoid vertical breakdown and has a high breakdown voltage includes: a silicon substrate; a nitride epitaxial layer, prepared on the silicon substrate; a source electrode and a drain electrode, both of which are contacted with the nitride epitaxial layer; a gate electrode, prepared between the source electrode and the drain electrode; and, at least one spatial isolation area, formed in a region between the silicon substrate and the nitride epitaxial layer vertically and between the source electrode and the drain electrode horizontally.

Abstract: An enhancement-mode device comprises: a substrate, an epitaxial multilayer structure formed on the substrate, and a gate region formed on the epitaxial multilayer structure, where the epitaxial multilayer structure sequentially comprises from the substrate: a nucleation layer, a buffer layer, a heterojunction structure layer, a second gallium nitride layer, a nitride transition layer and a dielectric layer, where the heterojunction structure layer comprises a gallium nitride channel layer and a barrier layer which has a sandwich structure, and a middle layer of the sandwich structure is a first gallium nitride layer; and the gate region comprises a gate metal layer and a p-type nitride layer located under the gate metal layer, wherein the p-type nitride layer is embedded into the epitaxial multilayer structure, a bottom of the p-type nitride layer is in contact with the first gallium nitride layer of the sandwich structure.

Abstract: A semiconductor epitaxial structure is provided, which includes: a nitride nucleation layer, formed on a substrate including silicon, sapphire, patterned sapphire substrate (PSS) or silicon carbide, a nitride layer on the nitride nucleation layer and an multi-layer structure in the nitride layer. The multi-layer structure includes a first intermediate layer and a second intermediate layer formed on the first intermediate layer. The first intermediate layer includes AlGaN, the second intermediate layer includes AlGaN or aluminum nitride, and the average composition of Al in the first intermediate layer is less than that in the second intermediate layer. A method for forming a semiconductor epitaxial structure is provided. The semiconductor epitaxial structure according to the present disclosure can not decrease the crystalline quality when a compressive stress is introduced, which may avoid a crack phenomenon or quality degradation caused by the change of temperature.

Abstract: A semiconductor epitaxial structure is provided, which includes: a nitride nucleation layer, formed on a substrate including silicon, sapphire, patterned sapphire substrate (PSS) or silicon carbide, a nitride layer on the nitride nucleation layer and an multi-layer structure in the nitride layer. The multi-layer structure includes a first intermediate layer and a second intermediate layer formed on the first intermediate layer. The first intermediate layer includes AlGaN, the second intermediate layer includes AlGaN or aluminium nitride, and the average composition of Al in the first intermediate layer is less than that in the second intermediate layer. A method for forming a semiconductor epitaxial structure is provided. The semiconductor epitaxial structure according to the present disclosure can not decrease the crystalline quality when a compressive stress is introduced, which may avoid a crack phenomenon or quality degradation caused by the change of temperature.

Abstract: An enhancement-mode device is provided. A spontaneous polarization effect and a piezoelectric effect in a crystal of nitride are greatest in a <0002> direction and do not exist or are minimal in a non-polar and a semi-polar direction, which is used to form the enhancement-mode device. A groove having a non-polar surface or a semi-polar surface is formed in an epitaxial multilayer structure, thereby interrupting two-dimensional electron gas in the groove. When a gate voltage is increased, the electron density on the non-polar and semi-polar surfaces in the groove is increased consequently, thereby realizing an enhancement-mode operation.