Patents Assigned to Fairchild Semiconductor Corporation
  • Patent number: 9802814
    Abstract: An apparatus includes a substrate having at least one via disposed in the substrate, wherein the substrate includes a trench having a substantially trapezoidal cross-section, the trench extending through the substrate between a lower surface of the substrate and an upper surface of the substrate, wherein the top of the trench opens to a top opening, and the bottom of the trench opens to a bottom opening, the top opening being larger than the bottom opening. The apparatus can include a mouth surrounding the top opening and extending between the upper surface and the top opening, wherein a mouth opening in the upper surface is larger than the top opening of the trench, wherein the via includes a dielectric layer disposed on an inside surface of a trench. The apparatus includes and a disposed in the trench, with the dielectric layer sandwiched between the fill and the substrate.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: October 31, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: David Lambe Marx, Brian Bircumshaw, Janusz Bryzek
  • Publication number: 20170302184
    Abstract: In one embodiment, a power supply controller, or alternately a semiconductor device having a power supply controller, may have a circuit configured configuring the PWM circuit to form a first signal having a value formed to be representative of a peak value of a primary current through the power switch and having a duration that is representative of a time interval that a secondary current is flowing through a secondary winding wherein the peak value is the peak value during an on-time of the power switch, and configured to form a current having a value that is representative of an average value of the secondary current.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 19, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Lei CHEN, Chih-Hsien HSIEH, Yue-Hong TANG
  • Publication number: 20170303057
    Abstract: In one general aspect, a method can include calculating, at a calibration temperature of a speaker, a calibration parameter through a coil of the speaker in response to a first test signal, and can include sending a second test signal through the coil of the speaker. The method can also include measuring a parameter through the coil of the speaker based on the second test signal, and calculating a temperature change of the coil of the speaker based on the parameter and based on the calibration parameter at the calibration temperature.
    Type: Application
    Filed: July 6, 2017
    Publication date: October 19, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Philip CRAWLEY, William D. LLEWELLYN, Majid SHUSHTARIAN, Earl D. SCHREYER
  • Publication number: 20170302185
    Abstract: In one embodiment, a power supply controller, or alternately a semiconductor device having a power supply controller, may have a first circuit configured to form a sense signal that is representative of a signal from an auxiliary winding of a transformer. A feedback circuit may be configured to allow the sense signal to increase in response to a turn-off of the power switch, to subsequently detect a second increase of the sense signal prior to subsequently turning on the power switch, and to form a feedback signal as a value of the sense signal responsively to the second increase of the sense signal.
    Type: Application
    Filed: March 29, 2017
    Publication date: October 19, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Zhibo TAO, Chih-Hsien HSIEH, Yue-Hong TANG
  • Patent number: 9794708
    Abstract: Apparatus and methods for detecting audio jack connection anomalies such as moisture or a partial insertion of an audio jack plug with an audio jack receptacle are provided. In an example, a method for detecting an audio jack insertion anomaly can include ramping on a first detection current source of a detection circuit coupled to a detection terminal of a first audio jack connector, receiving a reference information at a comparator of the detection circuit, receiving a voltage of the detection terminal at the comparator, providing comparison information at an output of the comparator, the comparison information indicative of a comparison of the voltage of the detection terminal and the reverence information, and wherein a first state of the comparison information indicates the audio jack insertion anomaly is due to moisture at the first audio jack connector.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: October 17, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: John R. Turner
  • Patent number: 9791523
    Abstract: This document discusses, among other things, a first magnetic sensor configured to sense first and second components of a magnetic field in respective, orthogonal directions, using first, second, third, and fourth sense elements, each on an angled surface sloped with respect to a surface, each including respective first, second, third, and fourth longitudinal axes, each parallel to each other. Further, a second magnetic sensor on the same surface can sense second and third components of a magnetic field in respective, orthogonal directions, using first, second, third, and fourth sense elements, each on an angled surface sloped with respect to the first surface, each including respective first, second, third, and fourth longitudinal axes, each parallel to each other and orthogonal to the longitudinal axes of the first magnetic sensor.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: October 17, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Phil Mather
  • Publication number: 20170288048
    Abstract: In one general aspect, an apparatus can include a silicon carbide (SiC) device can include a gate dielectric, a first doped region having a first conductivity type, a source, a body region of the first conductivity type, and a second doped region having a second conductivity type. The second doped region can have a first portion and a second portion. The first portion can be disposed between the first doped region and the body region and the second portion can be disposed between the first doped region and the gate dielectric. The first portion of the second doped region can have a width less than a width of the first doped region.
    Type: Application
    Filed: June 19, 2017
    Publication date: October 5, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventor: Martin DOMEIJ
  • Patent number: 9772233
    Abstract: This document discusses, among other things, an apparatus and method for providing temperature information. In an example, an integrated circuit apparatus can include a first resistor configured to be coupled to a first terminal of a temperature-sensitive resistance, a second resistor configured to be coupled to a second terminal of the temperature-sensitive resistance, and a temperature information circuit configured to receive a first voltage from the first terminal of the temperature-sensitive resistance and a second voltage from the second terminal of the temperature-sensitive resistance. The temperature information circuit can provide the temperature information using the first and second voltages.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: September 26, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Kenneth P. Snowdon, Roy Yarbrough
  • Patent number: 9774240
    Abstract: This document discusses, among other things, apparatus and methods for an edge rate driver for a power converter switch. In an example, the driver can include an input node configured to receive a pulse width modulated signal, a first switch configured to couple a control node of the power converter switch to a supply voltage during a first state, a second switch configured to couple the control node of the power converter switch to a reference voltage during a second state, and a first current source configured to supply charge current to the first switch when the power converter switch transitions from the second state to the first state, the charge current configured to charge a parasitic capacitance of the power converter switch.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: September 26, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Michael David Mulligan, Timothy Alan Dhuyvetter
  • Patent number: 9774954
    Abstract: This document discusses, among other things, an impedance detection circuit, method, and integrated circuit, comprising a ramp-up current generation circuit and an impedance determining circuit, wherein the ramp-up current generation circuit is configured to input a ramp-up current including n breaks to a port of a device where the ramp-up current generation circuit is disposed, to which port an external device is connected, and wherein the impedance determining circuit is configured to detect an impedance of the external device in each break time period of the ramp-up current input by the ramp-up current generation circuit until the impedance of the external device is acquired by detection in the last break time period of the n breaks.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: September 26, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Peng Zhu, Kenneth O'Brien, Jianing Zhou, Yongliang Li
  • Patent number: 9769579
    Abstract: Apparatus and methods for detecting audio jack connection anomalies such as moisture or a partial insertion of an audio jack plug with an audio jack receptacle are provided. In an example, a method for detecting an audio jack insertion anomaly can include ramping on a first detection current source of a detection circuit coupled to a detection terminal of a first audio jack connector, receiving a reference information at a comparator of the detection circuit, receiving a voltage of the detection terminal at the comparator, providing comparison information at an output of the comparator, the comparison information indicative of a comparison of the voltage of the detection terminal and the reverence information, and wherein a first state of the comparison information indicates the audio jack insertion anomaly is due to moisture at the first audio jack connector.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: September 19, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: John R. Turner
  • Patent number: 9768761
    Abstract: This document discusses, among other things, a voltage comparator, an integrated circuit, or a voltage comparison method having increased precision. The hysteresis comparator or the integrated circuit can include first and second input transistors, each having a gate configured to receive a respective first or second input voltage. A bias power source can generate a bias current to a first node by applying a voltage through a first resistor. The first node can be connected to a source of the first input transistor through a second resistor and to a source of the second input transistor through a third resistor. The first, second, and third resistors can include the same type of resistor, with the second and third resistors having different resistance values.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: September 19, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Lei Huang, Jianing Zhou, Zhaohong Li
  • Patent number: 9759564
    Abstract: This document discusses, among other things, a temperature and power supply calibration system configured to compensate for temperature and supply voltage variation in MEMS or other circuits using representations of positive and negative supply voltages and first and second base-emitter voltages, wherein the second base-emitter voltage is a scaled representation of the first base-emitter voltage.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: September 12, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Shungneng Lee, Justin Seng, Marwan Ashkar, Ion Opris
  • Patent number: 9762049
    Abstract: This document discusses, among other things, a self-test (ST) ground fault circuit interrupter (GFCI) monitor configured to generate a simulated ground fault starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power, wherein the first half-cycle of the first cycle of AC power precedes the second half-cycle of the first cycle of AC power. Further, the ST GFCI monitor can detect a response to the simulated ground fault.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: September 12, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Bruce Armstrong
  • Patent number: 9745947
    Abstract: In a general aspect, an apparatus can include an insulated-gate bipolar transistor device (IGBT), a gate driver circuit (driver) coupled with a gate terminal of the IGBT and a low-resistance switch device coupled between an emitter terminal of the IGBT and an electrical ground terminal, the low-resistance switch device being coupled with the electrical ground terminal via a resistor. The apparatus can also include a current sensing circuit coupled with the driver and a current sense signal line coupled with the current sensing circuit and a current sense node, the current sense node being disposed between the low-resistance switch device and the resistor. The apparatus can further include a control circuit configured, when the driver is off, to detect, based on a voltage on the current sense node, when a current through the resistor is above a threshold value and disable the IGBT in response to the detection.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: August 29, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: James E. Gillberg, Juergen Pianka
  • Patent number: 9748329
    Abstract: Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: August 29, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Joseph A. Yedinak, Ashok Challa
  • Publication number: 20170244333
    Abstract: A synchronous rectifier driver pre-positions a gate of a synchronous rectifier to allow for fast turn-off. The synchronous rectifier driver turns ON the synchronous rectifier by driving the gate at a high level for a period of time that is based on a previous conduction time of the synchronous rectifier. The synchronous rectifier driver thereafter drives the gate at a lower level that is sufficient to keep the synchronous rectifier ON. The synchronous rectifier can be quickly turned OFF by further reducing the level of the drive signal at the gate of the synchronous rectifier.
    Type: Application
    Filed: November 22, 2016
    Publication date: August 24, 2017
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Hangseok CHOI, Wei-Hsuan HUANG, Cheng-Sung CHEN
  • Patent number: 9741873
    Abstract: In at least one general aspect, a SiC device can include a drift region of a first conductivity type, a shielding body, and a Schottky region. The SiC device can include a rim having a second conductivity type at least partially surrounding the shielding body and the Schottky region. The SiC device can include a termination region at least partially surrounding the rim and having a doping of the second conductivity type. The termination region can have a transition zone disposed between a first zone and a second zone where the first zone has a top surface lower in depth than a depth of a top surface of the second zone and the transition zone has a recess.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: August 22, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Andrei Konstantinov
  • Patent number: 9735112
    Abstract: In some general aspects, an apparatus may include a first semiconductor die, a second semiconductor die, and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die. The capacitive isolation circuit may be disposed outside of the first semiconductor die and the second semiconductor die. The first semiconductor die, the second semiconductor die, and the capacitive circuit may be included in a molding of a semiconductor package.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: August 15, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: John Constantino, Timwah Luk, Ahmad Ashrafzadeh, Robert L. Krause, Etan Shacham, Maria Clemens Ypil Quinones, Janusz Bryzek, Chung-Lin Wu
  • Patent number: 9735768
    Abstract: In a general aspect, an apparatus can include a temperature measurement circuit configured to produce a first signal indicating a first operating temperature of a first semiconductor device and a temperature comparison circuit operationally coupled with the temperature measurement circuit. The temperature comparison circuit can be configured to compare the first signal with a second signal indicating a second operating temperature of at least a second semiconductor device and produce a comparison signal indicating whether the indicated first operating temperature is higher, lower or equal to the indicated second operating temperature. The apparatus can also include an adjustment circuit configured to adjust operation of the first semiconductor device based on the comparison signal.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: August 15, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Ahmad R. Ashrafzadeh