Abstract: Interconnect assemblies and methods for forming and using them. In one example of the invention, an interconnect assembly comprises a substrate, a resilient contact element and a stop structure. The resilient contact element is disposed on the substrate and has at least a portion thereof which is capable of moving to a first position, which is defined by the stop structure, in which the resilient contact element is in mechanical and electrical contact with another contact element. In another example of the invention, a stop structure is disposed on a first substrate with a first contact element, and this stop structure defines a first position of a resilient contact element, disposed on a second substrate, in which the resilient contact element is in mechanical and electrical contact with the first contact element.

Abstract: A main power source supplies current through path impedance to a power terminal of an integrated circuit device under test (DUT). The DUT's demand for current at the power input terminal temporarily increases following edges of a clock signal applied to the DUT during a test as transistors within the IC switch in response to the clock signal edges. To limit variation (noise) in voltage at the power input terminal, an auxiliary power supply supplies an additional current pulse to the power input terminal to meet the increased demand during each cycle of the clock signal. The magnitude of the current pulse is a function of a predicted increase in current demand during that clock cycle, and of the magnitude of an adaption signal controlled by a feedback circuit provided to limit variation in voltage developed at the DUT's power input terminal.

Abstract: An elongate, columnar micro-mechanical structure disposed along a central longitudinal axis; the structure is made up of laminated structural layers, each comprised of a structural material. The layers define a substantially rigid base portion at a proximal end of the structure, a resilient intermediate portion extending from the base portion along the central axis, and a contact tip extending from the resilient portion at a distal end of the structure. The resilient portion of the contact structure is comprised of resilient arms defined in the layers. Opposite ends of the resilient arms may be angularly offset with respect to one another around the central axis. Accordingly, when the contact structure is compressed in an axial direction, the contact tip will rotate around the central axis, while the base remains fixed, providing beneficial wiping action to the contact tip.

Abstract: One embodiment of the present invention concerns an integrated circuit that includes bond pads and special contact pads or points. The bond pads are for interfacing the integrated circuit as a whole with an external circuit, and are to be bonded to a package or circuit board. The bond pads are disposed on the die in a predetermined alignment such as a peripheral, grid, or lead-on-center alignment. The special contact pads are used to provide external test patterns to internal circuits and/or to externally monitor results from testing the internal circuits. The special contact pads may be advantageously located on the integrated circuit with a high degree of positional freedom. For one embodiment, the special contact pads may be disposed on the die at a location that is not in the same alignment as the bond pads. The special contact pads may be smaller than the bond pads so as not to increase the die size due to the special contact pads.

Abstract: A method for fabricating microelectronic spring structures is disclosed. In an initial step of the method, a layer of sacrificial material is formed over a substrate. Then, a contoured surface is developed in the sacrificial material, such as by molding the sacrificial material using a mold or stamp. The contoured surface provides a mold for at least one spring form, and preferably for an array of spring forms. If necessary, the sacrificial layer is then cured or hardened. A layer of spring material is deposited over the contoured surface of the sacrificial material, in a pattern to define at least one spring form, and preferably an array of spring forms. The sacrificial material is then at least partially removed from beneath the spring form to reveal at least one free-standing spring structure. A separate conducting tip is optionally attached to each resulting spring structure, and each structure is optionally plated or covered with an additional layer or layers of material, as desired.

Abstract: A probe card is provided for probing a semiconductor wafer with raised contact elements. In particular, the present invention is useful with resilient contact elements, such as springs. A probe card is designed to have terminals to mate with the contact elements on the wafer. In a preferred embodiment, the terminals are posts. In a preferred embodiment the terminals include a contact material suitable for repeated contacts. In one particularly preferred embodiment, a space transformer is prepared with contact posts on one side and terminals on the opposing side. An interposer with spring contacts connects a contact on the opposing side of the space transformer to a corresponding terminal on a probe card, which terminal is in turn connected to a terminal which is connectable to a test device such as a conventional tester.

Abstract: Microelectronic spring contacts with fiducial alignment marks for use on a semiconductor wafer contactor or similar apparatus, and methods for making such marks, are disclosed. Each alignment mark is placed on a pad adjacent to a contact tip. The alignment mark is positioned on the pad so that it will not contact the terminal or any other part of a wafer under test. The alignment mark and the contact tip are preferably positioned on the pad in the same lithographic step. Then, the pad and like pads, selected ones of which also have similar alignment marks, are attached to the ends of an array of resilient contact elements. A plurality of alignment marks in accurate registration with a plurality of contact tips on a contactor is thus disclosed. Configurations for ensuring that the alignment marks remain free of debris and easily located for essentially the entire life of the contactor are disclosed, as are various different exemplary shapes of alignment marks.

Abstract: A interconnect structure is inexpensively manufactured and easily insertable into a socket. The interconnect structure is manufactured by forming a sacrificial substrate with cavities that is covered by a masking material having openings corresponding to the cavities. A first plating process is performed by depositing conductive material, followed by coupling wires within the openings and performing another plating process by depositing more conductive material. The interconnect structure is completed by first removing the masking material and sacrificial substrate. Ends of the wires are coupled opposite now-formed contact structures to a board. To complete the socket, a support device is coupled to the board to hold a tested integrated circuit.

Abstract: A mechanical support configuration for a probe card of a wafer test system is provided to increase support for a very low flexural strength substrate that supports spring probes. Increased mechanical support is provided by: (1) a frame around the periphery of the substrate having an increased sized horizontal extension over the surface of the substrate; (2) leaf springs with a bend enabling the leaf springs to extend vertically and engage the inner frame closer to the spring probes; (3) an insulating flexible membrane, or load support member machined into the inner frame, to engage the low flexural strength substrate farther away from its edge; (4) a support structure, such as support pins, added to provide support to counteract probe loading near the center of the space transformer substrate; and/or (5) a highly rigid interface tile provided between the probes and a lower flexural strength space transformer substrate.

Abstract: Described herein is a probe card assembly providing signal paths for conveying high frequency signals between bond pads of an integrated circuit (IC) and an IC tester. The frequency response of the probe card assembly is optimized by appropriately distributing, adjusting and impedance matching resistive, capacitive and inductive impedance values along the signal paths so that the interconnect system behaves as an appropriately tuned Butterworth or Chebyshev filter.

Abstract: Surface-mount, solder-down sockets are described which permit electronic components such as semiconductor packages to be releasably mounted to a circuit board. Generally, the socket includes resilient contact structures extending from a top surface of a support substrate, and solder-ball (or other suitable) contact structures disposed on a bottom surface of the support substrate. Composite interconnection elements are described for use as the resilient contact structures disposed atop the support substrate. In use, the support substrate is soldered down onto the circuit board, the contact structures on the bottom surface of the support substrate contacting corresponding contact areas on the circuit board. In any suitable manner, selected ones of the resilient contact structures atop the support substrate are connected, via the support substrate, to corresponding ones of the contact structures on the bottom surface of the support substrate.

Abstract: Vertical holes are created in streets separating individual integrated circuit (IC) dies formed on a semiconductor wafer, the holes spanning saw-lines along which the wafer is to be later cut to separate the IC die from one another to form individual IC chips. The holes are then filled with conductive material. After the wafer is cut along the saw-lines, portions of the conductive material on opposing sides of the saw-lines remain on peripheral edges of the IC chip to form signal paths between the upper and lower surfaces of the IC chips.

Abstract: A method of testing a probe card includes the step of positioning the probe card in a prober over a verification wafer that is placed on a stage. The probe card is brought in contact with a contact region on the verification wafer. The verification wafer includes a shorting plane surrounding the contact region. A test signal is sent through the verification wafer to the probe card. A response signal from the probe card is received and analyzed.

Abstract: A probe system for providing signal paths between an integrated circuit (IC) tester and input/output, power and ground pads on the surfaces of ICs to be tested includes a probe board assembly, a flex cable and a set of probes arranged to contact the IC's I/O pads. The probe board assembly includes one or more rigid substrate layers with traces and vias formed on or within the substrate layers providing relatively low bandwidth signal paths linking the tester to probes accessing some of the IC's pads. The flex cable provides relatively high bandwidth signal paths linking the tester to probes accessing others of the IC's pads. A flex strip may alternatively be disposed behind a substrate with probes.

Abstract: A probe card cooling assembly for use in a test system includes a package with one or more dies cooled by direct cooling. The cooled package includes one or more dies with active electronic components and at least one coolant port that allows a coolant to enter the high-density package and directly cool the active electronic components of the dies during a testing operation.

Abstract: Methods for processing at least one die which comprises an integrated circuit. In one example of a method of the invention, an identification code is applied to a carrier. A singulated die is deposited into the carrier which holds the singulated die. The singulated die comprises an integrated circuit. The identification code may be applied to the carrier before or after depositing the singulated die into the carrier. The carrier may be used in testing the singulated die and may include a plurality of singulated die or just one singulated die. In another example of a method of the invention, an identification code is applied to a die. The die is deposited into a carrier which holds the die. The die comprises an integrated circuit, and the carrier holds the die in singulated form. Typically the die is placed in the carrier without any packaging which may protect the die. The identification code may be applied to the die before or after it is deposited into the carrier.

Abstract: An electronic component is disclosed, having a plurality of microelectronic spring contacts mounted to a planar face of the component. Each of the microelectronic spring contacts has a contoured beam, which may be formed of an integral layer of resilient material deposited over a contoured sacrificial substrate, and comprises a base mounted to the planar face of the component, a beam connected to the base at a first end of the beam, and a tip positioned at a free end of the beam opposite to the base. The beam has an unsupported span between its free end and its base. The microelectronic spring contacts are advantageously formed by depositing a resilient material over a molded, sacrificial substrate. The spring contacts may be provided with various innovative contoured shapes. In various embodiments of the invention, the electronic component comprises a semiconductor die, a semiconductor wafer, a LGA socket, an interposer, or a test head assembly.

Abstract: A multiple integrated circuit (IC) die assembly includes a base IC die and secondary IC dice mounted on a surface of the base IC die. A set of protruding contacts formed on the surface of the base IC die and extending beyond the secondary IC dice link the surface of the base IC die to a printed circuit board (PCB) substrate with the secondary IC die residing between the base IC die and the PCB substrate.

Abstract: An electromagnetic interconnect method and apparatus effects contactless, proximity connections between elements in an electronics system. Data to be communicated between elements in an electronic system are modulated into a carrier signal and transmitted contactlessly by electromagnetic coupling. The electromagnetic coupling may be directly between elements in the system or through an intermediary transmission medium.

Abstract: An insulative material is applied to one or more selected probe tips to disable those probes, and the probes are brought into contact with a semiconductor die. One or more tests are run on the die to verify sufficient testing of the die without the disabled probes. The process may be repeated with other probes disabled to determine which probes need not be used in testing the die.