Abstract: Temporary connections to spring contact elements extending from an electronic component such as a semiconductor device are made by urging the electronic component, consequently the ends of the spring contact elements, vertically against terminals of an interconnection substrate, or by horizontally urging terminals of an interconnection substrate against end portions of the spring contact elements. A variety of terminal configurations are disclosed.

Abstract: An interconnect assembly and methods for making and using the assembly. An exemplary embodiment of an aspect of the invention includes a contact element which includes a base portion adapted to be adhered to a substrate and a beam portion connected to and extending from the base portion. The beam portion is designed to have a geometry which substantially optimizes stress across the beam portion when deflected (e.g. it is triangular in shape) and is adapted to be freestanding. An exemplary embodiment of another aspect of the invention involves a method for forming a contact element. This method includes forming a base portion to adhere to a substrate of an electrical assembly and forming a beam portion connected to the base portion. The beam portion extends from the base portion and is designed to have a geometry which substantially evenly distributes stress across the beam portion when deflected and is adapted to be freestanding.

Abstract: A method and system for designing a probe card from data provided by prospective customers via the Internet is provided. Design specifications are entered into the system by prospective customers and compiled into a database. The collective feasibility of each set of design specifications is determined by an automated computer system and communicated to the prospective customer. If feasible, additional software enables prospective customers to create verification packages according to their respective design specifications. These verification packages further consist of drawing files visually describing the final design and verification files confirming wafer bonding pad data. Verification packages are reviewed and forwarded to an applications engineer after customer approval. An interactive simulation of probe card performance is also provided.

Abstract: A method of fabricating a large area, multi-element contactor. A segmented contactor is provided for testing semiconductor devices on a wafer that comprises a plurality of contactor units mounted to a substrate. The contactor units are formed, tested, and assembled to a backing substrate. The contactor units may include leads extending laterally for connection to an external instrument such as a burn-in board. The contactor units include conductive areas such as pads that are placed into contact with conductive terminals on devices under test.

Abstract: Interconnect assemblies and methods for forming and using them. In one example of the invention, an interconnect assembly comprises a substrate, a resilient contact element and a stop structure with an embedded circuit element. The resilient contact element is disposed on the substrate and has at least a portion thereof which is capable of moving to a first position, which is defined by the stop structure, in which the resilient contact element is in mechanical and electrical contact with another contact element. In another example of the invention, a stop structure is disposed on a first substrate with a first contact element, and this stop structure defines a first position of a resilient contact element, disposed on a second substrate, in which the resilient contact element is in mechanical and electrical contact with the first contact element.

Abstract: A probe system for providing signal paths between an integrated circuit (IC) tester and input/output, power and ground pads on the surfaces of ICs to be tested includes a probe board assembly, a flex cable and a set of probes arranged to contact the IC's I/O pads. The probe board assembly includes one or more rigid substrate layers with traces and vias formed on or within the substrate layers providing relatively low bandwidth signal paths linking the tester to probes accessing some of the IC's pads. The flex cable provides relatively high bandwidth signal paths linking the tester to probes accessing others of the IC's pads. A flex strip may alternatively be disposed behind a substrate with probes.

Abstract: Interconnection elements for electronic components, exhibiting desirable mechanical characteristic (such as resiliency, for making pressure contacts) are formed by using a shaping tool (512) to shape an elongate core element (502) of a soft material (such as gold or soft copper wire) to have a springable shape (including cantilever beam, S-shape, U-shape), and overcoating the shaped core element with a hard material (such as nickel and its alloys), to impart to desired spring (resilient) characteristic to the resulting composite interconnection element. A final overcoat of a material having superior electrical qualities (e.g., electrical conductivity and/or solderability) may be applied to the composite interconnection element.

Abstract: A method of fabricating and using an interconnection element that includes a first element material adapted to be coupled to a substrate and a second element material comprising a material having a transformable property such that upon transformation, a shape of the interconnection is deformed. An example is a material that has a transformable property such that a volume of the first and/or second element material may undergo a thermal transformation from one volume to a different volume (such as a smaller volume) resulting in the deformation of the interconnection element.

Abstract: A method of fabricating a large contactor (62) is provided wherein one or more contactor units (78) are mounted on a support substrate (74) such that contact elements (80) attached to the contactor units are suitably aligned. In this manner, a large area contactor can be prepared using a plurality of smaller contactor units. Preferably the contact elements on the plurality of contactor units are coplanar across the contactor units. This is particularly advantageous for making a large contactor for probing semiconductor devices on a wafer. This also can be useful for making a contactor capable of contacting devices across an entire semiconductor wafer. In one embodiment, the contactor units self-align during reflow of a joining material such as solder balls (134) or other reflowable material interconnecting the contactor units and the support substrate.

Abstract: According to aspect of the invention, a plating system is provided which includes a tank for containing a plating solution, a shaft extending into the tank, and a substrate holder mounted to the shaft. The shaft and the tank are rotatable relative to one another. The substrate holder is configured to support a substrate in position so that at least a first face of the substrate is exposed to the plating solution in the tank.

Abstract: Described herein is a probe card assembly providing signal paths for conveying high frequency signals between bond pads of an integrated circuit (IC) and an IC tester. The frequency response of the probe card assembly is optimized by appropriately distributing, adjusting and impedance matching resistive, capacitive and inductive impedance values along the signal paths so that the interconnect system behaves as an appropriately tuned Butterworth or Chebyshev filter.

Abstract: A method of making a microelectronic spring contact array comprises forming a plurality of spring contacts on a sacrificial substrate and then releasing the spring contacts from the sacrificial substrate. Each of the spring contacts has an elongated beam having a base end. The method of making the array includes attaching the spring contacts at their base ends to a base substrate after they have been released entirely from the sacrificial substrate, so that each contact extends from the base substrate to a distal end of its beams. The distal ends are aligned with a predetermined array of tip positions. In an embodiment of the invention, the spring contacts are formed by patterning contours of the spring contacts in a sacrificial layer on the sacrificial substrate. The walls of patterned recesses in the sacrificial layer define side profiles of the spring contacts, and a conductive material is deposited in the recesses to form the elongated beams of the spring contacts.

Abstract: In an interconnect system for providing access to a common I/O terminal for multiple circuit devices such as drivers, receivers and electrostatic protection devices implemented on an IC, each such device is provided with a separate contact pad within the IC. The contact pads are linked to one another and to the IC I/O terminal though inductive conductors such as bond wires, metalization layer traces in the IC, or legs of a forked, lithographically-defined spring contact formed on the IC. The conductor inductance isolates the capacitance of the circuit devices from one another, thereby improving characteristics of the frequency response of the interconnect system. The inductances of the conductors and various capacitances of the interconnect system are also appropriately adjusted to optimize desired interconnect system frequency response characteristics.

Abstract: An initial graph of nodes is created within a routing space, and the number and locations of the nodes in the graph are adjusted. Links are created between nodes of the graph, and traces between specified nodes are created through the linked graph.

Abstract: Resistances of signal paths within a interconnect structure for linking input/output (I/O) ports of an integrated circuit (IC) tester to test points of an IC are measured by the IC tester itself. To do so the interconnect structure is used to link the tester's I/O ports to a similar arrangement of test points linked to one another through conductors. Drivers within the tester, which normally transmit digital test signals to IC test points via the I/O ports when the IC is under test, are modified so that they may also either transmit a constant current through the I/O ports or link the I/O ports to ground or other reference potential. The tester then transmits known currents though the signal paths interconnecting the tester's I/O ports.

Abstract: A system for testing a number of integrated circuit (IC) devices under test (DUTs) having interface circuitry coupled to a single or multi-channel tester for receiving data values from the tester and providing error information concerning the DUTs. The interface circuitry forwards data values (received from the tester over a single channel) to a number of DUTs in parallel. The circuitry performs comparisons using data values read from the DUTs, and in response generates error values indicative of the comparison. The error values may then be returned to the tester over the same or a different channel.

Abstract: One embodiment of the present invention concerns a test assembly for testing product circuitry of a product die. In one embodiment, the test assembly includes at test die and an interconnection substrate for electrically coupling the test die to a host controller that communicates with the test die. The test die may be designed according to a design methodology that includes the step of concurrently designing test circuitry and a product circuitry in a unified design. The test circuitry can be designed to provide a high degree of fault coverage for the corresponding product circuitry generally without regard to the amount of silicon area that will be required by the test circuitry. The design methodology then partitions the unified design into the test die and the product die. The test die includes the test circuitry and the product die includes the product circuitry. The product and test die may then be fabricated on separate semiconductor wafers.

Abstract: An interconnection element of a spring (body) including a first resilient element with a first contact region and a second contact region and a first securing region and a second resilient element, with a third contact region and a second securing region. The second resilient element is coupled to the first resilient element through respective securing regions and positioned such that upon sufficient displacement of the first contact region toward the second resilient element, the second contact region will contact the third contact region. The interconnection, in one aspect, is of a size suitable for directly contacting a semiconductor device. A large substrate with a plurality of such interconnection elements can be used as a wafer-level contactor. The interconnection element, in another aspect, is of a size suitable for contacting a packaged semiconductor device, such as in an LGA package.

Abstract: Surface-mount, solder-down sockets permit electronic components such as semiconductor packages to be releasably mounted to a circuit board or other electronic component. In an embodiment, resilient contact structures extend through a support substrate, and solder-ball (or other suitable) contact structures are disposed along the bottom of the support substrate in electrical contact with the ends of the resilient contact structures. Composite interconnection elements are used as the resilient contact structures disposed atop the support substrate. In an embodiment intended to receive an LGA-type semiconductor package, pressure contact is made between the resilient contact structures and external connection points of the semiconductor package with a contact force which is generally normal to the top surface of the support substrate.

Abstract: A semiconductor wafer is cut to singulate integrated circuit dice formed on the wafer. A die pick machine then positions and orients the singulated dice on a carrier base such that signal, power and ground pads formed on the surface of each die reside at predetermined positions relative to landmarks on the carrier base the die pick machine optically identifies. With the dice temporarily held in place on the carrier base, they are subjected to a series of testing and other processing steps. Since each die's signal pads reside in predetermined locations, they can be accessed by appropriately arranged probes providing test equipment with signal access to the pads during tests. After each test, a die pick machine may replace any die that fails the test with another die, thereby improving efficiency of subsequent testing and other processing resources.