Patents Assigned to Fujitsu Quantum Devices Limited
  • Patent number: 6924162
    Abstract: A process of manufacturing a semiconductor device includes the steps of forming a stacked structure of a first III-V compound semiconductor layer containing In and having a composition different from InP and a second III-V compound semiconductor layer containing In. The second III-V compound semiconductor layer is formed over the first III-V compound semiconductor layer and growing an InP layer at regions adjacent the stacked structure to form a stepped structure of InP. The process further includes the step of wet-etching the stepped structure and the second III-V compound semiconductor layer using an etchant containing hydrochloric acid and acetic acid to remove at least the second III-V compound semiconductor layer.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: August 2, 2005
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Takayuki Watanabe, Tsutomu Michitsuta, Taro Hasegawa, Takuya Fujii
  • Patent number: 6900482
    Abstract: A high-frequency semiconductor device for power amplification has a comb-teeth electrode on each of active regions formed on the front surface of the semiconductor substrate. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a plurality of rectangular-shaped active regions arranged side by side on the front surface of the semiconductor substrate, each of the active regions having interdigited gate, drain and source electrodes thereon which are connected to the respective pads by multilayer interconnection technique. Additionally, the source potential is fed from the back surface of the substrate through a metal plugged via-hole.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: May 31, 2005
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Yoshio Aoki, Yutaka Mimino, Osamu Baba, Muneharu Gotoh
  • Patent number: 6882667
    Abstract: An optical semiconductor device includes an element in which a laser diode and an optical modulator are integrated, and a circuit that sets a common node of the laser diode and the optical modulator at a reference potential different from a ground potential and drives the laser diode and the optical modulator in opposite directions with respect to the reference potential.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: April 19, 2005
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Shinya Suzuki, Hiromitsu Kawamura
  • Patent number: 6876683
    Abstract: A package for hermetically sealing a semiconductor laser which outputs light having a wavelength of 1.1 ?m or more is filled with a gas containing an oxidizing gas such as oxygen or ozone. The oxidizing gas in the package oxidizes hydrogen in the package to prevent hydrogen embrittlement of electrodes that applies stress on electrodes and to suppress variation in the emission wavelength which would otherwise result from the application of stress.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: April 5, 2005
    Assignees: Fujitsu Limited, Fujitsu Quantum Devices Limited
    Inventors: Tohru Watanabe, Toshio Higashi, Manabu Komiyama, Takashi Yamane
  • Publication number: 20050040418
    Abstract: An optical semiconductor device includes a laminated layer structure, an intermediate film formed on an end surface of the laminated layer structure, and a passivation film formed on the intermediate film. The passivation film has a quantity of ion projection than that of the intermediate film.
    Type: Application
    Filed: September 14, 2004
    Publication date: February 24, 2005
    Applicant: FUJITSU QUANTUM DEVICES LIMITED
    Inventor: Shigeo Osaka
  • Patent number: 6853054
    Abstract: A high frequency semiconductor device including wiring layers which are formed above a semiconductor substrate and in which transmission lines are formed by combining with a ground plate having a potential fixed at the ground potential, at least one crossing portion in which the wiring layers mutually cross, with insulating interlayers provided therebetween, and at least one separation electrode being selectively provided on one of the insulating interlayers, the at least one separation electrode having a potential fixed at the ground potential. Accordingly, in the high frequency semiconductor device, electrical interference between two crossing wiring layer is prevented and transmission loss is suppressed.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: February 8, 2005
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Osamu Baba, Yutaka Mimino
  • Patent number: 6831265
    Abstract: A photodetector includes an optical absorption layer having a thickness d optimized with regard to a voltage applied across the optical absorption layer such that there occurs an increase of optical absorption coefficient at the wavelength of 1580 nm or longer.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: December 14, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Yoshihiro Yoneda, Ikuo Hanawa
  • Patent number: 6825809
    Abstract: A structure for eliminating the influence of an antenna line connected to the patch electrode on the antenna characteristics of a patch antenna built in an MMIC is disclosed. A through-hole is formed in the antenna ground plane which is provided under the patch electrode with an interlayer insulation film therebetween, the antena line is provided in the side opposite to the patch electrode with respect to the antena ground plane, and the patch electrode and antenna line are connected to each other with a conductor passing through the trough-hole.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: November 30, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Yoshio Aoki, Yutaka Mimino, Osamu Baba, Muneharu Gotoh
  • Patent number: 6822984
    Abstract: In the semiconductor laser module testing device, a temperature control power source changes a temperature of a wavelength locker module, and a wavelength monitoring bias circuit detects an output of a wavelength monitor in the changed temperature range and computes a correlation between a temperature of a semiconductor laser and a wavelength of light output therefrom. Moreover, the wavelength of the output light is locked by controlling the temperature of the wavelength locker module while feeding back the output of the wavelength monitor by a wavelength feedback circuit based on the obtained correlation between the temperature and the wavelength.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: November 23, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Haruyoshi Ono, Isao Baba
  • Patent number: 6809344
    Abstract: An optical semiconductor device includes a laminated layer structure, an intermediate film formed on an end surface of the laminated layer structure, and a passivation film formed on the intermediate film. The passivation film has a quantity of ion projection than that of the intermediate film.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: October 26, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Shigeo Osaka
  • Patent number: 6807199
    Abstract: In order to tune an oscillation wavelength of a semiconductor laser diode to a target wavelength, the amount of change of a wavelength to the amount of change of a wavelength varying item is determined by actual measurement and a basic wavelength coefficient is renewed by using the ratio of both amounts of change as a corrective wavelength coefficient, and thus the characteristic when the wavelength of an actual device is made closer to a target wavelength is utilized.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: October 19, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Haruyoshi Ono, Isao Baba
  • Patent number: 6806181
    Abstract: A protective pattern is formed on a semiconductor substrate in a shape covering a circuit region and exposing an air bridge connecting portion, a metallic film and an insulating film are formed to cover the protective pattern, the metallic film and the insulating film are patterned to form air bridge wiring and an air bridge protective film covering the air bridge wiring, and thereafter, the protective pattern is removed to form a hollow between the air bridge wiring and the circuit region.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: October 19, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Kazuyuki Sakamoto
  • Patent number: 6803312
    Abstract: A method for fabricating a semiconductor device includes the steps of forming a mask on a predetermined layer, said mask having a first opening at a given side of the predetermined layer and a second opening that continues to and is smaller than the first opening, and forming a plating layer on the predetermined layer by using the mask.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: October 12, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Yutaka Sato
  • Patent number: 6800878
    Abstract: At least a channel layer and an etching stopper layer are provided on a semiconductor substrate in order, a gate electrode that Schottky-contacts the etching stopper layer is provided on the etching stopper layer, and InGaP having an In composition ratio of 0.66 through 0.9 is used as the etching stopper layer in a field effect type compound semiconductor device.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: October 5, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Kazuo Nambu, Junichiro Nikaido
  • Publication number: 20040183152
    Abstract: A semiconductor photodetection device includes a semiconductor structure including an optical absorption layer having a photo-incidence surface on a first side thereof, a dielectric reflecting layer formed on a second side of the semiconductor structure opposite to the first side, a contact electrode surrounding the dielectric reflecting layer and contacting with the semiconductor structure, and a close contact electrode covering the dielectric reflecting layer and contacting with the contact electrode and the dielectric reflecting layer, wherein the close contact electrode adheres to the dielectric reflecting layer more strongly than to the contact electrode.
    Type: Application
    Filed: December 16, 2003
    Publication date: September 23, 2004
    Applicant: Fujitsu Quantum Devices, Limited
    Inventors: Yoshihiro Yoneda, Ikuo Hanawa
  • Patent number: 6787821
    Abstract: There is provided a compound semiconductor device that comprises a substrate formed of a first compound semiconductor, a graded channel layer formed on the substrate and formed of a second compound semiconductor layer, that lowers mostly an energy band gap in its inside by continuously changing a mixed-crystal ratio in a thickness direction such that a peak of the mixed-crystal ratio of one constituent element is positioned in its inside, and containing an impurity, a barrier layer formed on the graded channel layer, a gate electrode formed on the barrier layer, and source/drain electrodes for flowing a current into the graded channel layer. Accordingly, the compound semiconductor device having MESFET, that has the maximum mutual conductance and can make the change in the mutual conductance gentle in response to the gate voltage, can be obtained.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: September 7, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Keiji Minetani
  • Patent number: 6787909
    Abstract: A structure for preventing MMICs (Monolithic Microwave Integrated Circuits) from deterioration in the high-frequency transmission characteristics thereof, which results from mechanical pressure applied to the pads during the wire-bonding thereto for external connection. The structure includes a groove provided in the surface of the interlayer insulation film around each of the pads. The line conductor for transmitting high-frequency signals is free from the peeling off or bending thereof, which is caused by the deformation in the interlayer insulation films during when the mechanical pressure applied to the pads, and thus, the change in the transmission characteristics of the line conductor can be minimized, and the reliability of MMICs can be improved.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: September 7, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Yutaka Mimino, Osamu Baba, Yoshio Aoki, Muneharu Gotoh
  • Patent number: 6788521
    Abstract: A capacitor which includes a lower electrode 12 formed on a substrate 10; an insulation film 16 having an opening 24 on the lower electrode 12; a capacitor dielectric film 30 formed on the lower electrode 12 in the opening 24 and having a larger thickness at a peripheral part of the opening 24 than at a central part of the opening; and an upper electrode 32 formed on the capacitor dielectric film 30. Thus, degradation of the breakdown voltage and stress resistance of the peripheral part of the opening 24, which is due to the coverage of the capacitor dielectric film, can be suppressed.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: September 7, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Masahiro Nishi
  • Patent number: 6784036
    Abstract: A method for making a semiconductor device includes forming a resist pattern having a multi-layered structure by performing a plurality of development steps, the resist pattern including a first opening corresponding to a fine gate section of a gate electrode and a second opening placed on the first opening, the second opening corresponding to an over-gate section which is wider than the fine gate section and having a cross section protruding over an undercut in an underlying layer, wherein every angle of the second opening at the tip of the over-gate section is more than 90 degrees; and forming the gate electrode provided with the fine gate section and the over-gate section by depositing electrode materials on the resist pattern.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: August 31, 2004
    Assignees: Fujitsu Limited, Fujitsu Quantum Devices Limited
    Inventors: Kozo Makiyama, Katsumi Ogiri
  • Patent number: 6781165
    Abstract: A hetero-junction bipolar transistor includes a collector layer, a base layer and an emitter layer, an emitter electrode containing Au being provided for the emitter layer, and an Au-diffusion barrier layer of InP or InGaP interposed between the emitter electrode and the base layer.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: August 24, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Hiroyuki Oguri