Patents Assigned to Fujitsu Quantum Devices Limited
  • Patent number: 6778572
    Abstract: An electrode structure includes a conductive film 24c formed on a base substrate 10 through an insulation film. The insulation film comprises a plurality of poles 36 of polyimide, a first film 38 formed on the side surfaces of the poles and formed of an insulation material of a high hardness than polyimide, and a second film 40 of polyimide buried among the plural poles with the first film formed on the side surfaces thereof. Because of the first film of an insulation material having high hardness formed on the side surfaces of the poles of polyimide, even when a strong force is applied upon the bonding, the poles are prevented from being distorted, and the conductive film is protected from peeling off. Because of the thick polyimide layer below the conductive film, a parasitic capacity between the conductive film and the lower layer can be small, whereby radio-frequency signals can be used.
    Type: Grant
    Filed: December 8, 1999
    Date of Patent: August 17, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Shigeo Ohsaka, Shinichi Domoto, Nobumasa Okada
  • Patent number: 6774484
    Abstract: A multilayer wiring structure for MMICs includes a power-supply wiring formed of a multilayer wiring (a plurality of power-supply lines). The wires are interconnected by throughholes. A power-supply current is divided and supplied to the lines. A large current can be supplied to the entirety of the multilayer wiring, even when the width of each of the lines is reduced. The multilayer wiring structure has an improved degree of freedom in the layout of wiring.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: August 10, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Yutaka Mimino, Osamu Baba, Yoshio Aoki, Muneharu Gotoh
  • Publication number: 20040152289
    Abstract: A semiconductor device has: a semiconductor substrate having a pair of current input/output regions via which current flows; an insulating film formed on the semiconductor substrate and having a gate electrode opening; and a mushroom gate electrode structure formed on the semiconductor substrate via the gate electrode opening, the mushroom gate electrode structure having a stem and a head formed on the stem, the stem having a limited size on the semiconductor substrate along a current direction and having a forward taper shape upwardly and monotonically increasing the size along the current direction, the head having a size expanded stepwise along the current direction, and the stem contacting the semiconductor substrate in the gate electrode opening and riding the insulating film near at a position of at least one of opposite ends of the stem along the current direction.
    Type: Application
    Filed: February 2, 2004
    Publication date: August 5, 2004
    Applicants: FUJITSU LIMITED, FUJITSU QUANTUM DEVICES LIMITED
    Inventors: Kozo Makiyama, Takahiro Tan
  • Patent number: 6768147
    Abstract: A compound semiconductor device includes a gate electrode, a drain electrode, and a source electrode, and a p-type semiconductor layer provided between the gate electrode and the drain electrode. The p-type semiconductor layer has a lower acceptor concentration on a drain side thereof than that on a gate side thereof.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: July 27, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Mitsunori Yokoyama, Masaki Nagahara
  • Patent number: 6753587
    Abstract: A high response speed semiconductor photo detecting device having a thin photo absorption layer which avoids an optical efficiency loss. The semiconductor photo detecting devices are formed on a semiconductor substrate having an inclined cleavage face to a principal plane of the substrate. An incoming photo signal is input to the cleavage face perpendicularly.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: June 22, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Akira Furuya, Tatsunori Shirai
  • Patent number: 6748746
    Abstract: A device and method for controlling the temperature of a semiconductor module in which the semiconductor module is sandwiched by a first supporting unit and a second supporting unit. An area of the second supporting unit with which the semiconductor module comes into contact is shielded from heat of external ambient atmosphere, and has a temperature sensor provided thereat. The temperature of the first supporting unit is controlled so that the temperature of this area becomes equal to a predetermined temperature. The amount of heat moving from the heat-shielded area to the semiconductor module is small, so that the difference between the temperatures in the region extending from the heat-shielded area and the semiconductor module is small. The first and second supporting units may be separately controlled at different predetermined temperatures. By this, changes in the temperature of the semiconductor module caused by changes in outside air temperature are reduced.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: June 15, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Haruyoshi Ono
  • Patent number: 6747299
    Abstract: A high frequency semiconductor device includes a ground plate, an insulating layer, a power-supply conductor, an insulating interlayer, and a strip line as a line conductor. The power-supply conductor is disposed above the ground plate, with the insulating layer provided therebetween. The ground plate and the power-supply conductor have a capacitance formed therebetween. Thus, the line conductor regards the power-supply conductor as having a potential identical to that of the ground plate. This makes it possible to lay out the line conductor without considering the arrangement of the power-supply conductor. In other words, by two-dimensionally overlapping a microstrip line and a power-supply conductor in an MMIC, the degree of freedom in the device layout can be increased.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: June 8, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Yutaka Mimino, Osamu Baba, Yoshio Aoki, Muneharu Gotoh
  • Patent number: 6730586
    Abstract: An edge of a passivation film is positioned inside an edge of an overhanging emitter structure by a distance L so that a base electrode layer is formed at an interval not to overlap the edge of the passivation film even when the base electrode layer is formed by etching with the emitter structure as a mask.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: May 4, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Hiroshi Endoh
  • Patent number: 6723571
    Abstract: A semiconductor device manufacturing method including a plasma etching process performed on a surface of the semiconductor device is provided. The semiconductor device has a specific metal therein that is unexposed at the surface at the beginning stage of the etching process, the specific metal gets exposed during the etching process, and the existence of the specific metal in an etching reactive chamber affects the rate of etching the semiconductor device. The method is characterized in that the specific metal is plasma etched as pretreatment before starting the plasma etching process of the semiconductor device to keep the etching rate stable.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: April 20, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Yukihiko Furukawa
  • Patent number: 6717271
    Abstract: A semiconductor device has: a semiconductor substrate having a pair of current input/output regions via which current flows; an insulating film formed on the semiconductor substrate and having a gate electrode opening; and a mushroom gate electrode structure formed on the semiconductor substrate via the gate electrode opening, the mushroom gate electrode structure having a stem and a head formed on the stem, the stem having a limited size on the semiconductor substrate along a current direction and having a forward taper shape upwardly and monotonically increasing the size along the current direction, the head having a size expanded stepwise along the current direction, and the stem contacting the semiconductor substrate in the gate electrode opening and riding the insulating film near at a position of at least one of opposite ends of the stem along the current direction.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: April 6, 2004
    Assignees: Fujitsu Limited, Fujitsu Quantum Devices Limited
    Inventors: Kozo Makiyama, Naoya Ikechi, Takahiro Tan
  • Patent number: 6712284
    Abstract: In a high frequency semiconductor device, a shield plate which is connected to the ground potential is provided above an MMIC structure including line conductors, with an insulating interlayer provided therebetween. By using the shield plate to shield the MMIC, interference caused by external electromagnetic waves or leakage of electromagnetic waves to the exterior can be reduced in a chip alone.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: March 30, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Yoshio Aoki, Yutaka Mimino, Osamu Baba, Muneharu Gotoh
  • Patent number: 6714082
    Abstract: A semiconductor amplifier circuit comprises a transimpedance amplifier for amplifying an input signal; a by-pass transistor connected between an input terminal of the transimpedance amplifier and the ground potential; a first resistor, one end of the first resistor being connected to an output terminal of the transimpedance amplifier; a capacitor connected between the other end of the first resistor and the ground potential; a second resistor connected between the other end of the first resistor and the gate of the by-pass transistor via an inverter; and a differential amplifier having a signal input terminal connected to the output terminal of the transimpedance amplifier and a reference-voltage input terminal connected to the other end of the first resistor.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: March 30, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Shigemi Miyazawa
  • Publication number: 20040056179
    Abstract: A semiconductor light-receiving device includes: a substrate that has a first surface and a second surface facing each other; a first semiconductor layer that is formed on the first surface of the substrate and includes at least one semiconductor layer of a first conductivity type; a light absorption layer that is formed on the first semiconductor layer and generates carriers in accordance with incident light; a second semiconductor layer that is formed on the light absorption layer and includes at least one semiconductor layer of a second conductivity type; a first electrode part that is electrically connected to the first semiconductor layer and applies a first potential thereto; a second electrode part that is electrically connected to the second semiconductor layer and applies a second potential thereto; and a third semiconductor layer of the second conductivity type that is interposed between the first surface of the substrate and the first semiconductor layer.
    Type: Application
    Filed: September 22, 2003
    Publication date: March 25, 2004
    Applicant: FUJITSU QUANTUM DEVICES LIMITED
    Inventors: Gang Wang, Yoshihiro Yoneda
  • Publication number: 20040056250
    Abstract: A semiconductor light-receiving device includes: a semi-insulating substrate; a semiconductor layer of a first conduction type that is formed on the semi-insulating substrate; a buffer layer of the first conduction type that is formed on the semi-insulating substrate and has a lower impurity concentration than the semiconductor layer of the first conduction type; a light absorption layer that is formed on the buffer layer and generates carriers in accordance with incident light; a semiconductor layer of a second conduction type that is formed on the light absorption layer; and a semiconductor intermediate layer that is interposed between the buffer layer and the light absorption layer, and has a forbidden bandwidth within a range lying between the forbidden bandwidth of the buffer layer and the forbidden bandwidth of the light absorption layer.
    Type: Application
    Filed: September 22, 2003
    Publication date: March 25, 2004
    Applicant: FUJITSU QUANTUM DEVICES LIMITED
    Inventors: Gang Wang, Yoshihiro Yoneda
  • Patent number: 6710378
    Abstract: A photo sensor is formed in a partial area of the principal surface of a substrate. The photo sensor includes a light reception layer parallel to the principal surface, the light reception layer being made of semiconductor and generating carriers in response to received light. A light waveguide is formed in a partial area of the principal surface of the substrate, the light waveguide propagating light in a direction parallel to the principal surface and introducing light into the light reception layer. A semi-insulating semiconductor film covers side faces of the photo sensor. A pair of electrodes flows current into the light reception layer of the photo sensor in a thickness direction of the light reception layer. A semiconductor light reception device having a structure suitable for high-speed operation and easy to manufacture is provided.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: March 23, 2004
    Assignees: Fujitsu Limited, Fujitsu Quantum Devices Limited
    Inventors: Masao Makiuchi, Nami Yasuoka, Haruhisa Soda, Takuya Fujii
  • Publication number: 20040052491
    Abstract: An optical modulator includes a p- or n-type semiconductor layer that is provided at an upper part of an optical waveguide path, and modulating electrodes that are provided at intervals on the semiconductor layer in an extension area of the optical waveguide path. The semiconductor layer has first regions located immediately under the modulating electrodes, and second regions located between the first regions. The second regions have separators that electrically separate the first regions from one another.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 18, 2004
    Applicants: FUJITSU QUANTUM DEVICES LIMITED, FUJITSU LIMITED
    Inventors: Fumio Otake, Haruhisa Soda
  • Publication number: 20040050587
    Abstract: A transmission line includes a transmission line substrate, a signal line, and a first ground pattern that is provided on the transmission line substrate and is located between the transmission line substrate and a metal wire used to connect the signal line to a component.
    Type: Application
    Filed: September 17, 2003
    Publication date: March 18, 2004
    Applicant: FUJITSU QUANTUM DEVICES LIMITED
    Inventor: Koji Tsukashima
  • Publication number: 20040052281
    Abstract: A laser device includes a laser diode, and a controller that superimposes a low-frequency signal on a modulating signal applied to the laser diode. The low-frequency signal has an amplitude that correlates with an amplitude of the modulating signal.
    Type: Application
    Filed: June 19, 2003
    Publication date: March 18, 2004
    Applicant: FUJITSU QUANTUM DEVICES LIMITED
    Inventors: Yasuhiro Hamajima, Hiroyuki Imoto, Hiroaki Maki
  • Publication number: 20040051394
    Abstract: A switching circuit includes switching transistors connected to one of an input terminal and an output terminal of the switching circuit, and a control bias supply circuit that supplies a control bias for cutting off all the switching transistors to the switching transistors when all of the switching transistors are in a non-selected state.
    Type: Application
    Filed: August 27, 2003
    Publication date: March 18, 2004
    Applicant: FUJITSU QUANTUM DEVICES LIMITED
    Inventors: Takayuki Kitazawa, Naoyuki Miyazawa
  • Publication number: 20040043259
    Abstract: An optical multilayer film includes: a first layer; a second layer that contains titanium oxynitride as a main component; and a third layer that contains magnesium fluoride as a main component; the first layer that has a different refractive index from that of the second layer or the third layer; and the first layer, the second layer, and the third layer being part of a laminated structure that includes a plurality of reflection planes. The thickness of the third layer is smaller than ¼ wavelength.
    Type: Application
    Filed: August 27, 2003
    Publication date: March 4, 2004
    Applicant: FUJITSU QUANTUM DEVICES LIMITED
    Inventors: Nobumasa Okada, Tadahiro Hiraike