Abstract: A semiconductor photodetection device includes a semiconductor structure including an optical absorption layer having a photo-incidence surface on a first side thereof, a dielectric reflecting layer formed on a second side of the semiconductor structure opposite to the first side, a contact electrode surrounding the dielectric reflecting layer and contacting with the semiconductor structure, and a close contact electrode covering the dielectric reflecting layer and contacting with the contact electrode and the dielectric reflecting layer, wherein the close contact electrode adheres to the dielectric reflecting layer more strongly than to the contact electrode.

Abstract: The high frequency power amplifier comprises a detector which detects a collector output power (or base input power) of an amplifying transistor, and a DC/DC converter which changes a collector voltage of the amplifying transistor in proportion to the detected power. Thus, a DC power consumed by the amplifying transistor is controlled. A resistor for a base bias of the amplifying transistor is connected to the DC/DC converter, thereby interlocking the base bias control with the control of the DC/DC converter.

Abstract: A method of forming a compound semiconductor device. The method includes the steps of depositing a film that contains zinc oxide and silicon oxide to contain the zinc oxide by 70 wt % or more on compound semiconductor layer as a diffusion source, and diffusing zinc from the diffusion source into the compound semiconductor layer by annealing. Accordingly, there can be provided a compound semiconductor device manufacturing method containing the step of diffusing zinc into compound semiconductor layers, capable of deepening a Zn diffusion position from a ZnO/SiO2 film to such extent that COD endurance of laser end face window structures can be increased rather than the prior art.

Abstract: A field-effect transistor includes a channel layer that is formed on a predetermined semiconductor layer and has an impurity concentration varying from a low value to a high value, and a source region and a drain region each having a bottom face above the predetermined semiconductor layer.

Abstract: An optical communication module includes: a laser light emitting unit that emits laser light; a temperature control unit that controls the temperature of the laser light emitting unit; a power intensity control unit that controls the power intensity of the laser light emitted from the laser light emitting unit; and a setting value storage unit that stores a setting value determined from an optimum power intensity that maintains a predetermined wavelength and satisfies predetermined temperature conditions and predetermined power intensity conditions, and from an optimum temperature that maintains the predetermined wavelength and satisfies the predetermined temperature conditions and the predetermined power intensity conditions. In this optical communication module, the temperature control unit and the power intensity control unit control the temperature and the power intensity of the laser light emitting unit, based on the setting value stored in the setting value storage unit.

Abstract: A directional coupler includes a transmission line, and a coupling line, the transmission line being coupled with the coupling line. The transmission line is located at a height position different from that of the coupling line with respect to a reference plane. The transmission line and the coupling line have portions that do not overlap each other.

Abstract: An optical device measuring apparatus includes a photodetector receiving light emitted from an optical device, and an introduction portion for introducing the emitted light transmitted through the photodetector to an optical fiber.

Abstract: A source electrode, a gate electrode, and a drain electrode formed on a front face active region of a semiconductor substrate in a shape of teeth of a comb are covered with an insulating film such as polyimede etc., as well as all of the upper surface and the side surfaces of the insulating film are covered with a metal protective film. Via hole receiving pads connected to the source electrode, the gate electrode, and the drain electrode are respectively connected to bonding pads on a reveres face of the semiconductor substrate through via holes.

Abstract: A method for making a semiconductor device includes forming a resist pattern having a multi-layered structure by performing a plurality of development steps, the resist pattern including a first opening corresponding to a fine gate section of a gate electrode and a second opening placed on the first opening, the second opening corresponding to an over-gate section which is wider than the fine gate section and having a cross section protruding like an overhang, wherein every angle of the second opening at the tip of the over-gate section is more than 90 degrees; and forming the gate electrode provided with the fine gate section and the over-gate section by depositing electrode materials on the resist pattern.

Abstract: A semiconductor device includes a SAW device chip. The SAW device chip is provided on a passive element chip in which a passive element circuit including a transmission line is formed on a semi-insulating compound substrate having one surface set to have a ground potential electrode. In the semiconductor device, even when the width of the transmission line is increased, a high characteristic impedance can be maintained by increasing the thickness of the substrate. This can reduce the resistance of the transmission line and can facilitate matching with the SAW device.

Abstract: There is provided a compound semiconductor device having a capacitor, to prevent a leakage current flowing between an upper electrode and a lower electrode of the capacitor via an insulating protective film. The compound semiconductor device comprises a first electrode of a capacitor formed on a compound semiconductor substrate via a first insulating film, a dielectric film of the capacitor formed on the first electrode, a second electrode of a capacitor formed on the dielectric film, a second insulating film for covering an upper surface and side surfaces of the second electrode, and an insulating protective film for covering the second insulating film, the dielectric film, the first electrode and the first insulating film, and having a hydrogen containing rate which is larger than the second insulating film.

Abstract: A clock signal correction circuit which corrects duty cycle distortions of a clock signal in a simple and accurate way. A frequency divider divides the frequency of a given input clock signal by a natural number n, thereby producing a divided clock signal. The phase of this divided clock signal is identified by a phase detector. By adding an appropriate delay to the divided clock signal according to the identified signal phase, a delay unit produces a delayed divided clock signal. A logical operator creates an output clock signal by performing a logical operation on the original divided clock signal and the delayed divided clock signal.

Abstract: A semiconductor device producing method carries out an etching process during a time between a start and an end of a plasma etching, and carries out a plasma etching with respect to a specific metal as a pre-processing prior to the etching process. The etching process is selected from a group consisting of an etching process which includes no exposing of a specific metal which affects variation of an etching rate, an etching process which includes no positioning of the specific metal exposed from an etching mask, an etching process which includes exposing of the specific metal located at a surface other than an etching target surface of a semiconductor substrate, and an etching process which includes exposing the specific metal having a thickness smaller than a thickness of other etching targets regardless of an existence of the etching mask.

Abstract: A semiconductor integrated circuit device comprises an active device and a resistance element formed monolithically on a common substrate wherein the resistance element includes a dummy pattern having a layered structure identical with a layered structure of the active device, and first and second electrodes are provided inside a mesa structure provided for the resistance element with a separation from a sidewall of the mesa structure, the first and second electrodes being formed in correspondence to openings formed in the dummy pattern.

Abstract: A semiconductor device includes a gate electrode on a semiconductor substrate, a source electrode and a drain electrode that are provided on the semiconductor substrate, the gate electrode being interposed between the source electrode and the drain electrode, an insulating layer covering the gate electrode, and a source wall that extends from the source electrode and passes over the gate electrode, an end surface of the source wall being interposed between the gate electrode and the drain electrode and being located in a position lower than a top surface of the gate electrode.

Abstract: A compound semiconductor device includes a gate electrode, a drain electrode, and a source electrode, and a p-type semiconductor layer provided between the gate electrode and the drain electrode. The p-type semiconductor layer has a lower acceptor concentration on a drain side thereof than that on a gate side thereof.

Abstract: An optical semiconductor device includes an element in which a laser diode and an optical modulator are integrated, and a circuit that sets a common node of the laser diode and the optical modulator at a reference potential different from a ground potential and drives the laser diode and the optical modulator in opposite directions with respect to the reference potential.

Abstract: An optical semiconductor device includes a laminated layer structure, an intermediate film formed on an end surface of the laminated layer structure, and a passivation film formed on the intermediate film. The passivation film has a quantity of ion projection than that of the intermediate film.

Abstract: An interdigital capacitor includes a semiconductor substrate, and a pair of comb-like electrodes formed on the semiconductor substrate. At least one of the pair of comb-like electrodes includes a cutting target portion.

Abstract: A hetero-junction bipolar transistor includes a collector layer, a base layer and an emitter layer, an emitter electrode containing Au being provided for the emitter layer, and an Au-diffusion barrier layer of InP or InGaP interposed between the emitter electrode and the base layer.