Patents Assigned to Fujitsu Quantum Devices Limited
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Publication number: 20030014980Abstract: A device and method for controlling the temperature of a semiconductor module in which the semiconductor module is sandwiched by a first supporting unit and a second supporting unit. An area of the second supporting unit with which the semiconductor module comes into contact is shielded from heat of external ambient atmosphere, and has a temperature sensor provided thereat. The temperature of the first supporting unit is controlled so that the temperature of this area becomes equal to a predetermined temperature. The amount of heat moving from the heat-shielded area to the semiconductor module is small, so that the difference between the temperatures in the region extending from the heat-shielded area and the semiconductor module is small. The first and second supporting units may be separately controlled at different predetermined temperatures. By this, changes in the temperature of the semiconductor module caused by changes in outside air temperature are reduced.Type: ApplicationFiled: June 26, 2002Publication date: January 23, 2003Applicant: Fujitsu Quantum Devices LimitedInventor: Haruyoshi Ono
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Patent number: 6504190Abstract: A gate electrode is in Schottky contact with the surface of a semiconductor substrate and extends in a first direction. A drain electrode is disposed on one side of the gate electrode, spaced apart from the gate electrode by some distance, and is in ohmic contact with the semiconductor substrate. A source electrode is constituted of a main part, an overhanging part and a shielding part. The main part is in ohmic contact with the semiconductor substrate in the region across the gate electrode from the drain electrode. The shielding part is disposed between the gate electrode and the drain electrode and extends in the first direction. The overhanging part passes over the gate electrode and connects the shielding part with main part. The size of the overhanging part along the first direction is smaller than the side of the shielding part.Type: GrantFiled: July 31, 2001Date of Patent: January 7, 2003Assignee: Fujitsu Quantum Devices LimitedInventor: Hitoshi Haematsu
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Patent number: 6504189Abstract: A microstrip line includes a first conductor pattern formed on a substrate, a second conductor pattern formed on the first conductor pattern with a width substantially identical with a width of the first conductor pattern, and a third conductor pattern formed on the second conductor pattern with a width smaller than the width of the second conductor pattern.Type: GrantFiled: June 30, 1999Date of Patent: January 7, 2003Assignee: Fujitsu Quantum Devices LimitedInventors: Hajime Matsuda, Norikazu Iwagami
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Wavelength inspection method of a semiconductor laser diode and a wavelength inspection unit thereof
Publication number: 20030002546Abstract: In order to tune an oscillation wavelength of a semiconductor laser diode to a target wavelength, the amount of change of a wavelength to the amount of change of a wavelength varying item is determined by actual measurement and a basic wavelength coefficient is renewed by using the ratio of both amounts of change as a corrective wavelength coefficient, and thus the characteristic when the wavelength of an actual device is made closer to a target wavelength is utilized.Type: ApplicationFiled: June 27, 2002Publication date: January 2, 2003Applicant: Fujitsu Quantum Devices LimitedInventors: Haruyoshi Ono, Isao Baba -
Publication number: 20030001678Abstract: A semiconductor amplifier circuit comprises a transimpedance amplifier for amplifying an input signal; a by-pass transistor connected between an input terminal of the transimpedance amplifier and the ground potential; a first resistor, one end of the first resistor being connected to an output terminal of the transimpedance amplifier; a capacitor connected between the other end of the first resistor and the ground potential; a second resistor connected between the other end of the first resistor and the gate of the by-pass transistor via an inverter; and a differential amplifier having a signal input terminal connected to the output terminal of the transimpedance amplifier and a reference-voltage input terminal connected to the other end of the first resistor.Type: ApplicationFiled: June 20, 2002Publication date: January 2, 2003Applicant: Fujitsu Quantum Devices Limited.Inventor: Shigemi Miyazawa
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Patent number: 6501090Abstract: In the S3-type semiconductor laser, when an angle of a first growth profile line to the first principal plane, the first growth profile line connecting respective lower side lines of an upper inclined plane and a lower inclined plane of the first layer of the first conduction type cladding layer is &thgr;1, an angle of a second growth profile line to the first principal plane, the second growth profile line connecting respective lower side lines of an upper inclined plane and a lower inclined plane of the second layer of the first conduction type cladding layer is &thgr;2, an angle of a third growth profile line to the first principal plane, the third growth profile line connecting respective lower side lines of an upper inclined plane and a lower inclined plane of the third layer of the first conduction type cladding layer is &thgr;3, and an angle of a fourth growth profile line to the first principal plane, the fourth growth profile line connecting respective lower side lines of an upper inclined plane andType: GrantFiled: January 15, 2002Date of Patent: December 31, 2002Assignee: Fujitsu Quantum Devices LimitedInventors: Akira Furuya, Chikashi Anayama, Katsumi Sugiura, Kensei Nakao, Taro Hasegawa
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Patent number: 6498294Abstract: The present invention relates to a package for a high-frequency device, in which the characteristic impedance can be matched while a gap between the casing and each terminal is maintained wide enough to avoid contact. In the package for a high-frequency device, each metallic terminal is hermetically fixed to a conductive casing and is electrically insulated from the conductive casing by glass. Each metallic terminal extends in parallel with a side wall of the conductive casing while it is separated from the side wall. Each metallic terminal is also flanked by a pair of conductive protruding portions that are formed on a side wall of the conductive casing and extend in the longitudinal direction of each metallic terminal. The conductive protruding portions are formed on either side of each metallic terminal and serve to match the characteristic impedance.Type: GrantFiled: April 20, 2000Date of Patent: December 24, 2002Assignee: Fujitsu Quantum Devices LimitedInventors: Ryo Kuwahara, Kouichi Iwaida
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Patent number: 6496070Abstract: An input buffer circuit 11X is a source follower circuit and comprises a load 114 and enhancement FETs 111 and 112A connected in series between power supply lines VDD and VSS. A DC bias VB1 is applied to the gate of the FET 112A to act it as a current source, and an AC current component of the drain potential VD of the FET 111 is provided through a capacitor 113 to the gate of the FET 112A. If an inductor as an matching circuit is connected in series to the capacitor 113, a band pass filter is constructed, and the gain of the circuit 11X becomes especially high at the resonance frequency thereof. At high frequencies, the interconnection coupled to the capacitor 113 has a parasitic inductance, and the output waveform of the circuit 11X has a high frequency noise. In this case, a damping transistor is connected between the capacitor 113 and the gate of the FET 112A to obtain a flat gain by adjusting the gate potential thereof.Type: GrantFiled: June 4, 2001Date of Patent: December 17, 2002Assignee: Fujitsu Quantum Devices LimitedInventor: Miki Kubota
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Patent number: 6492950Abstract: A dielectric member 27 with a thickness of from 0.1&lgr; to 2&lgr; is disposed opposite to a patch plane 17 of a patch antenna 10A apart from the patch plane 17 by a distance of from 0.1&lgr;0 to 2&lgr;0, where &lgr;0 and &lgr; are the wavelengths of a radiated radio wave in free space and in the dielectric member, respectively. The dielectric constant of the dielectric member 27 may be lower in an outer portion thereof than a middle portion thereof. When the antenna is incorporated into the communication module, the dielectric member 27 is attached to the cover of the communication module.Type: GrantFiled: September 21, 2001Date of Patent: December 10, 2002Assignee: Fujitsu Quantum Devices LimitedInventors: Hiroshi Nakano, Yasutake Hirachi
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Publication number: 20020180005Abstract: A source electrode, a gate electrode, and a drain electrode formed on a front face active region of a semiconductor substrate in a shape of teeth of a comb are covered with an insulating film such as polyimede etc., as well as all of the upper surface and the side surfaces of the insulating film are covered with a metal protective film. Via hole receiving pads connected to the source electrode, the gate electrode, and the drain electrode are respectively connected to bonding pads on a reveres face of the semiconductor substrate through via holes.Type: ApplicationFiled: May 30, 2002Publication date: December 5, 2002Applicant: Fujitsu Quantum Devices LimitedInventor: Hitoshi Haematsu
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Patent number: 6489671Abstract: A semiconductor integrated circuit has a 3-dimmensional interconnection line structure for high-speed operation. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a 3-dimmensional tournament tree shaped multilayer interconnection lines, wherein a single electric feeding point on a top surface of the MMIC is divided, layer by layer, into plural electrodes on the semiconductor substrate of the MMIC via a plurality of laminated interconnection layers and vertical interconnection layers therebetween shaped like a tournament tree.Type: GrantFiled: March 1, 2002Date of Patent: December 3, 2002Assignee: Fujitsu Quantum Devices LimitedInventors: Yoshio Aoki, Yutaka Mimino, Osamu Baba, Muneharu Gotoh
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Patent number: 6487027Abstract: An optical semiconductor device includes a package body, a laser diode accommodated in the package body, a temperature regulation block connected thermally to the laser diode, an optical filter connected thermally to the temperature regulation block, a photodetector receiving the laser beam from the laser diode via the optical filter, a feeder feeding a driving power to the laser diode, and a thermal conducting body provided separately to the feeder, wherein the thermal conducting body transmits the temperature of the package body to the laser diode.Type: GrantFiled: April 19, 2001Date of Patent: November 26, 2002Assignee: Fujitsu Quantum Devices LimitedInventors: Yasuyuki Yamauchi, Toyotoshi Machida, Nobuhiro Ninomiya
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Publication number: 20020172243Abstract: In the semiconductor laser module testing device, a temperature control power source changes a temperature of a wavelength locker module, and a wavelength monitoring bias circuit detects an output of a wavelength monitor in the changed temperature range and computes a correlation between a temperature of a semiconductor laser and a wavelength of light output therefrom. Moreover, the wavelength of the output light is locked by controlling the temperature of the wavelength locker module while feeding back the output of the wavelength monitor by a wavelength feedback circuit based on the obtained correlation between the temperature and the wavelength.Type: ApplicationFiled: May 14, 2002Publication date: November 21, 2002Applicant: Fujitsu Quantum Devices LimitedInventors: Haruyoshi Ono, Isao Baba
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Patent number: 6476692Abstract: A branching section provides a fundamental input wave signal SI of a frequency f to the gate of a FET 15A having a grounded source and the source of a FET 15B having an AC grounded gate, and a signal joining section synthesizes the output signals of the FETs 15A and 15B. An open stub 24 as an amplitude attenuating element is connected to a transmission line 19B of the signal joining section. The length of the open stub 24 is not an integral multiple of &lgr;/4, where &lgr; denotes the wavelength of the fundamental signal SI, and adjusted in simulation such that an amplitude difference between second harmonics included in the drain voltage signals SD1 and SD2 of the respective FETs 15A and 15B is reduced to almost zero. Although the open stub 24 itself is a phase compensating element, since the transfer characteristic of the FET 15B changes by connecting the open stub 24 to the transmission line 19B, the open stub 24 works as an amplitude attenuating element.Type: GrantFiled: July 13, 2001Date of Patent: November 5, 2002Assignee: Fujitsu Quantum Devices LimitedInventor: Hideyuki Uchino
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Patent number: 6476427Abstract: A microwave monolithic integrated circuit comprises a T-shaped gate electrode including a Schottky gate electrode formed on a first region of a compound semiconductor substrate, a pair of ohmic electrodes making an ohmic contact with a surface of the substrate in the first region at respective sides of the T-shaped gate electrode, a lower capacitor electrode pattern formed on a second region of the compound semiconductor substrate with a composition substantially identical with a low-resistance, top electrode constituting the T-shaped gate electrode on the Schottky gate electrode, a dielectric film formed on the lower electrode pattern, and an upper electrode pattern formed on the dielectric film.Type: GrantFiled: February 6, 2001Date of Patent: November 5, 2002Assignee: Fujitsu Quantum Devices LimitedInventor: Hajime Matsuda
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Patent number: 6472738Abstract: Active elements are formed only on a first surface of a semiconductor substrate, and signal connections of the active elements are leaded to terminals formed on a second surface side of the semiconductor substrate. Accordingly, there can be provided a compound semiconductor device such as MMIC, that is capable of reducing the restriction on the arrangement of elements constituting the integrated circuit and also suppressing variation in an inductance component in the high frequency transmission system.Type: GrantFiled: September 5, 2001Date of Patent: October 29, 2002Assignee: Fujitsu Quantum Devices LimitedInventor: Yoji Suzuki
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Publication number: 20020140089Abstract: A multilayer wiring structure for MMICs includes a power-supply wiring formed of a multilayer wiring (a plurality of power-supply lines). The wires are interconnected by throughholes. A power-supply current is divided and supplied to the lines. A large current can be supplied to the entirety of the multilayer wiring, even when the width of each of the lines is reduced. The multilayer wiring structure has an improved degree of freedom in the layout of wiring.Type: ApplicationFiled: March 6, 2002Publication date: October 3, 2002Applicant: Fujitsu Quantum Devices LimitedInventors: Yutaka Mimino, Osamu Baba, Yoshio Aoki, Muneharu Gotoh
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Publication number: 20020140024Abstract: A high-frequency semiconductor device for power amplification has a comb-teeth electrode on each of active regions formed on the front surface of the semiconductor substrate. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a plurality of rectangular-shaped active regions arranged side by side on the front surface of the semiconductor substrate, each of the active regions having interdigited gate, drain and source electrodes thereon which are connected to the respective pads by multilayer interconnection technique. Additionally, the source potential is fed from the back surface of the substrate through a metal plugged via-hole.Type: ApplicationFiled: March 14, 2002Publication date: October 3, 2002Applicant: FUJITSU QUANTUM DEVICES LIMITEDInventors: Yoshio Aoki, Yutaka Mimino, Osamu Baba, Muneharu Gotoh
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Publication number: 20020140609Abstract: A structure for eliminating the influence of an antenna line connected to the patch electrode on the antenna characteristics of a patch antenna built in an MMIC is disclosed. A through-hole is formed in the antenna ground plane which is provided under the patch electrode with an interlayer insulation film therebetween, the antena line is provided in the side opposite to the patch electrode with respect to the antena ground plane, and the patch electrode and antenna line are connected to each other with a conductor passing through the trough-hole.Type: ApplicationFiled: March 6, 2002Publication date: October 3, 2002Applicant: Fujitsu Quantum Devices LimitedInventors: Yoshio Aoki, Yutaka Mimino, Osamu Baba, Muneharu Gotoh
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Publication number: 20020140041Abstract: An edge of a passivation film is positioned inside an edge of an overhanging emitter structure by a distance L so that a base electrode layer is formed at an interval not to overlap the edge of the passivation film even when the base electrode layer is formed by etching with the emitter structure as a mask.Type: ApplicationFiled: March 7, 2002Publication date: October 3, 2002Applicant: Fujitsu Quantum Devices LimitedInventor: Hiroshi Endoh