Patents Assigned to Fujitsu
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Patent number: 6218281Abstract: A semiconductor substrate is prepared which has a principal surface, an exposed pad made of conductive material being formed in a partial area of the principal surface, and the other area of the principal surface being covered with a first insulating film. A base conductive film is formed on the first insulating film and the pad. A photoresist film having a thickness of 50 &mgr;m or thicker is formed on the base conductive film. An opening is formed through the photoresist film in an area corresponding to the pad to expose a partial surface area of the base conductive film. A conductive bump electrode is deposited on the base conductive film exposed on a bottom of the opening. The photoresist film is removed. This method is suitable for making a fine pitch between bump electrodes.Type: GrantFiled: November 16, 1998Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Eiji Watanabe, Hirohisa Matsuki, Kenichi Kado, Kenichi Nagashige, Masanori Onodera, Kunio Kodama, Hiroyuki Yoda, Joji Fujimori, Minoru Nakada, Yutaka Makino
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Patent number: 6216953Abstract: An optical read is capable of reading a bar code in a mounted state when an article carrying the bar code passes and of reading bar codes set in an array format on a menu sheet in a hand-held state. The optical reader comprises a light source, a scanner that is driven by a drive and scans light emanating from the light source, a plurality of reflection mirrors that reflect scanning light scanned by the scanner and create a scanning pattern composed of a plurality of scan trajectories, a read window through which scanning light reflected from the reflection mirrors is emitted, and a light receiver for receiving light reflected from a mark. The optical reader further comprises a mode changer (or control unit) for changing a plurality of operation modes among which one or ones of the plurality of scan trajectories to be validated for reading are different.Type: GrantFiled: July 9, 1996Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Toshimitsu Kumagai, Mitsuharu Ishii, Yuichirou Takashima, Hiroaki Katoh, Toshitaka Aoki
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Patent number: 6219801Abstract: When a fault occurs, a hot-standby cluster takes over the job of the cluster which is at fault, and the load distribution for each job of load-sharing clusters is changed, simplifying the processing for dealing with the fault. Thus the clusters are efficiently used and arranged freely. The system is provided with a plurality of clusters which are operated by one or more of an in-use hot-standby system, a hot-standby waiting system, and a load sharing system for each job according to a table, and of the cluster is provided with a means which instructs a hot-standby waiting cluster to take over the job of a faulty cluster when the job is of the in-use hot-standby system, or instructs another load-sharing cluster to take over the job in a case the job is of the load-sharing system, referring to the table for dealing with a fault at any one of the clusters.Type: GrantFiled: July 2, 1998Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Toshimichi Yuge, Toshihiro Amemiya, Satoshi Matsumoto, Yasuhiro Suzuki
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Patent number: 6216342Abstract: A method for fabricating a matrix switch board used for connecting and disconnecting a switching-system line and a subscriber line. The matrix switch board is formed to include a board made of an insulating material, first and second wiring patterns respectively formed on front and back sides of the board so as to cross each other, and through holes provided at cross points of the first and second wiring patterns. A connection pin inserted into at least one of the through holes, electrically connects at least one of the first wiring patterns on the front side and at least one of the second wiring patterns on the back side.Type: GrantFiled: December 11, 1998Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Masao Hosogai, Setuo Kojima, Hitoshi Yokemura, Rie Takada, Hiroyuki Otaguro, Takayuki Ashida, Toshio Abe
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Patent number: 6217204Abstract: A light amplification coupler includes a glass pipe, a first optical fiber having, at one end thereof, an input port to which signal light is inputted and having an output port at the other end thereof, the first optical fiber having an intermediate portion inserted in the glass pipe, a second optical fiber having one end portion adapted to receive pump light, the second optical fiber being inserted in the glass pipe and fused to the first optical fiber, and a third optical fiber having an output port at one end thereof, the other end of the third optical fiber being inserted in the glass pipe from the output port side of the first optical fiber and fused to the first and second optical fibers.Type: GrantFiled: June 20, 1997Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventor: Tadao Arima
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Patent number: 6219496Abstract: An image-forming device such as a full color printer is provided which is designed to correct the speed of a conveyer belt on which print sheets are transported or intervals between image-transferring units for compensating for a shift between colors. The image-forming device has a timer which measures an elapsed time from turning on of the device or release of a sleep mode, a print-off time and a print time and determines a correction value as a function of the times measured by the timer by look-up using a table.Type: GrantFiled: December 16, 1999Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Takeo Kojima, Susumu Imado, Ryouhei Iwasaki, Hirofumi Nakayasu
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Patent number: 6219629Abstract: A simulator apparatus for a combined simulation of electromagnetic wave analysis and circuit analysis, which is configured to produce stable solutions with a smaller amount of processing loads. An electromagnetic wave analyzer calculates magnetic field at a simulation time tem01 and then electric field at another simulation time tem02 thereby performing a transient analysis of electromagnetic waves. A circuit analyzer solves the given circuit equation at still another simulation time tcs that is incremented by a variable time step size &Dgr;tcs determined in accordance with the circumstances. A current source data transfer unit compares tem01 and tcs, and if their difference falls below a time difference threshold &lgr;1, it calculates current source data for the equivalent circuit, based on the magnetic field obtained by the electromagnetic wave analyzer. The current source data transfer unit then transfers the resultant current source data to the circuit analyzer.Type: GrantFiled: May 12, 1998Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventor: Takefumi Namiki
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Patent number: 6219053Abstract: In monitoring a network in which nodes such as a host, a hub, rooter, etc. are interconnected, each node is indicated by an icon, and the connection between the nodes is indicated by a line. A node to be regarded is positioned in the center of the map as a root, and a node directly connected to the root is arranged as a node at the second hierarchical level on the circumference of the circle with the root centered. The node connected to the node at the second hierarchical level is arranged as a node at the third hierarchical level on the circumference of the concentric circle, with the root centered, having a larger radius than the node at the second hierarchical level. Similarly, the network configuration is assumed to be a hierarchical structure with the root centered, and an icon indicating an object at a higher hierarchical level is arranged on the circumference of a concentric circle having a larger radius.Type: GrantFiled: June 30, 1998Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Shoichi Tachibana, Kouji Ishibashi, Kazutaka Sasaki, Kenichi Shimazaki, Kazuaki Sasaki
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Patent number: 6218227Abstract: A process for fabricating an ONO structure for a MONOS type Flash cell includes growing a first silicon oxide layer over a semiconductor substrate. Thereafter, a silicon nitride layer is formed to overlie the first silicon oxide layer, and a polycrystalline silicon layer is deposited to overlie the silicon nitride layer. By utilizing the polycrystalline silicon layer as the top layer of the ONO structure, a resist layer can be cleaned more aggressively than if the top layer of the ONO structure were an oxide layer. A second silicon oxide layer overlies the polycrystalline layer, of the ONO structure. Since the second silicon oxide layer is deposited on top of polycrystalline silicon after the resist material is cleaned, some resist material can remain on the polycrystalline layer without degrading the performance of the MONOS type cell.Type: GrantFiled: October 25, 1999Date of Patent: April 17, 2001Assignees: Advanced Micro Devices, Inc., Fujitsu LimitedInventors: Steven K. Park, Arvind Halliyal, Hideki Komori
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Patent number: 6217231Abstract: An optical fiber assembly includes a substrate carrying an optical device and a ferrule having a cutout surface, wherein the substrate is mounted on the ferrule such that a principal surface of the substrate engages a corresponding flat cutout surface of the ferrule. Further, an optical module that uses such an optical fiber assembly is disclosed.Type: GrantFiled: March 11, 1998Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Akitoshi Mesaki, Takashi Yamane
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Patent number: 6219508Abstract: An image forming apparatus includes a frame, a closing cover mounted to said frame so as to be opened and closed, a plurality of printing assemblies each comprising a developing device for developing an image, a fixing device, and a paper conveyer belt for conveying paper through said plurality of printing assemblies. The apparatus further includes an optical sensor having a light-emitting element and a light receiving element to read marks readably formed on the paper conveyer belt. A movable cover is provided which is operatively connected to the closing cover to open an optical passage of the optical sensor when the apparatus is in operation and shut off the optical passage of the optical sensor when the apparatus is not in operation.Type: GrantFiled: February 2, 2000Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Tsutomu Nagatomi, Hirofumi Nakayasu, Youji Houki
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Patent number: 6219036Abstract: Disclosed herein is electronic equipment including a housing and a joystick unit. The housing accommodates an electronic circuit. The joystick unit is provided on the housing and electrically connected to the electronic circuit. The joystick unit includes a base member and a joystick displaceably provided to the base member for inputting coordinates (e.g., two-dimensional coordinates) according to a relative positional relation to the base member. The base member is supported rotatably between a first condition and a second condition. In the first condition, the base member and the joystick respectively face the inside and the outside of the housing, whereas in the second condition, the base member and the joystick respectively face the outside and the inside of the housing. In the case of using the joystick, the first condition is intended to be selected, whereas in the case of not using the joystick, the second condition is intended to be selected.Type: GrantFiled: January 27, 1999Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventor: Kenji Urita
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Patent number: 6219068Abstract: An editor in a CAD system, which assigns different command functions to each of a plurality of buttons, enables commands for editing processing such as “movement”, “deletion”, and copying” to be issued by the corresponding buttons, and adds one polygon and another polygon by a first button or subtracts them from each other by a second button and, further, even when one of the commands of editing processing is being executed, makes it possible to perform a “change”, “cancellation”, “confirmation”, etc. of the mode of processing by operation of the corresponding buttons, thereby enabling change of a once input parameter or initialization of once input information, whereby the efficiency of work in pattern design using a pointing device can be improved.Type: GrantFiled: January 22, 1998Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Touru Kumada, Eiichi Konno, Isamu Maejima, Kazunori Kumagai, Akihiko Suehiro
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Patent number: 6219406Abstract: A back wiring board which connects a printed board package to testers and an aggregated device of back wiring boards. A receiving portion receives a test demand signal from an external controller, a selector selects and connects one of the testers connected to adapter connectors for the connection to the printed board package based on the test demand signal. Group connectors connect a plurality of the back wiring boards to form a board group. The selector selects and connects one of the testers only to the printed board package connected to one of the back wiring boards within the board group based on the test demand signal.Type: GrantFiled: July 22, 1998Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Naoyuki Nakashima, Toshitsugu Kobayashi, Naoto Hamanaka, Kazuyoshi Maruyama, Masahiro Tanaka
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Patent number: 6219756Abstract: The present invention discloses a register file in which a read access time is reduced, a data bus width is made expandable, more rapid decoding can be given at a time of data readout, and the whole logic unit is made higher in performance. For these purposes, in the register file of the invention, register arrays are classified into a plurality of banks, and a sense amplifier is provided for each of the banks. Further, the register file includes a decoder to select a word corresponding to a result of decoding of partial bits of a read address so as to read the word from the register array in each of the banks, a decoder to specify a bank corresponding to a result of decoding of remaining bits of the read address, and a multiplexer to select the word from the bank specified by the decoder so as to output the word to the read port.Type: GrantFiled: August 11, 1998Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventor: Masayoshi Kasamizugami
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Patent number: 6219027Abstract: An image display system, provided with a plurality of display units and a pointing device for moving a cursor between the plurality of display units, includes a cursor position detecting unit for detecting a desired cursor movement that corresponds to an operation of the pointing device and a cursor movement control unit for moving the cursor commensurate with the operation of the pointing device such that the cursor is moved differently from one display unit to another.Type: GrantFiled: January 16, 1998Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Masayoshi Shimizu, Shoji Suzuki, Tsugio Noda
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Patent number: 6219236Abstract: It is an object of the present invention to provide a cooling system capable of simultaneously cooling the electronic parts on a multichip module that is arranged so as to provide a predetermined function, wherein the cooling system can be easily and quickly attached to and detached from the module when necessary.Type: GrantFiled: November 24, 1999Date of Patent: April 17, 2001Assignee: Fujitsu, Ltd.Inventors: Minoru Hirano, Masumi Suzuki
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Publication number: 20010000247Abstract: In a method of manufacturing a semiconductor device, there are comprised the steps of forming an oxidation preventing layer on a surface of a semiconductor substrate, forming a first window in the oxidation preventing layer, placing the semiconductor substrate in a first atmosphere in which an oxygen gas and a first amount of a chlorine gas are flown through and then heating the semiconductor substrate at a first temperature such that a first selective oxide film is to grown by thermally oxidizing the surface of the semiconductor substrate exposed from the first window, forming a second window by patterning the oxidation preventing layer, and placing the semiconductor substrate in a second atmosphere in which the oxygen gas and a second amount, which is larger than the first amount, of the chlorine gas are flown through and then heating the semiconductor substrate at a second temperature such that a second selective oxide film is formed and that a thickness of the first selective oxide film formed below the fType: ApplicationFiled: December 1, 2000Publication date: April 12, 2001Applicant: FUJITSU LIMITED, ADVANCED MICRO DEVICES, INC.Inventors: Hiroyuki Shimada, Masaaki Higashitani, Hideo Kurihara, Hideki Komori, Satoshi Takahashi
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Patent number: 6215582Abstract: A light amplifier device includes a module body to which an exciting light source, an optical multiplexer and an optical isolator are attached, and an optical fiber having a light amplifying function, the optical fiber being wound around the module body.Type: GrantFiled: March 3, 1997Date of Patent: April 10, 2001Assignee: Fujitsu LimitedInventors: Satoshi Sudo, Takaharu Tomita
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Patent number: 6216255Abstract: A computer-aided logic circuit designing apparatus in which data on a plurality of circuits is stored in a database, the data on a plurality of circuits is read out therefrom and combined by a net list-RTL description combining section, a clock system portion is analyzed based on the logic circuit obtained by combining the data by a clock system analyzing section, and a result of the analysis is displayed by an analysis result display section correlating each type of clock system to a corresponding clock input element.Type: GrantFiled: February 26, 1998Date of Patent: April 10, 2001Assignee: Fujitsu LimitedInventors: Yasushi Ito, Shinpei Komatsu, Tatsushi Tobita, Chika Kubono, Masaki Kirinaka