Abstract: A data processing apparatus includes a first circuit unit operating with first clocks of a predetermined cycle, a second circuit unit operating with second clocks of a predetermined cycle different from the first clock cycle, and a first circuit block which generates and outputs a train of pulses in accordance with the first clock cycle.

Abstract: A semiconductor integrated circuit producing a given output voltage includes first and second operational amplifiers, and first and second transistors. The first and second operational amplifiers detect a voltage difference between a voltage applied to an input terminal and at least one reference voltage. The first and second transistors are turned ON or turned OFF according to the levels of voltages output from the first and second operational amplifiers. The first operational amplifier receives the output voltage at the input terminal. When the level of the output voltage becomes lower than the reference voltage, the first operational amplifier allows the first transistor to operate so as to raise the output voltage. In contrast, the second operational amplifier receives the output voltage at the input terminal. When the level of the output voltage exceeds the reference voltage, the second operational amplifier allows the second transistor to operate so as to lower the output voltage.

Abstract: Alkali-developable, chemically amplified resist composition which comprises an alkali-insoluble compound having a structural unit containing a protected alkali-soluble group in which unit a protective moiety of said protected alkali-soluble group contains an alicyclic hydrocarbon group having bonded to a carbon atom thereof a —CH2—R1′ group wherein R1′ is methyl, ethyl, propyl or isopropyl, and said alkali-soluble group is cleaved upon action of an acid generated from a photoacid generator used in combination with said compound, thereby releasing said protective moiety from the alkali-soluble group and converting said compound to an alkali-soluble one, and a photoacid generator capable of being decomposed upon exposure to a patterning radiation to thereby produce an acid capable of causing cleavage of said protective moiety.

Abstract: A circuit that prevents illegal transformation of data in a non-volatile memory comprises a three circuits which generate three reference currents of different amplitude, there comparison circuits which respectively compare the three reference currents with a cell current, a writing/deletion circuit which writes data in or deletes data from the cells. A control circuit is provided which outputs a corresponding information based on the result of comparison by the comparison circuit, and makes said writing/deletion circuit execute writing data in or deletion of data from a target cell once more when the cell current is greater than the second reference current or the cell current is not greater than the third reference current.

Abstract: A distortion compensating device provided in a receiver for compensating distortion which is added to a signal in a transmission path. The signal is generated in a multi-level modulator of a transmitter of which a digital signal is mapped to one of a plurality of specified signal points in a signal space diagram. The device includes discrimination circuits for discriminating a received signal according to threshold lines partitioning the signal space diagram into discrimination areas, the threshold lines being defined so that the discrimination areas on an outer side of the signal space diagram having each an area greater than an area of each of the discrimination areas on an inner side of the signal space diagram and a selection circuit for selecting one of a plurality of threshold line patterns based on a level of the received signal which is discriminated according to a selected threshold line pattern.

Abstract: A CODEC has a DSP which can consecutively execute a plurality of algorithms without restriction of a memory capacity. The DSP performs an encoding/decoding operation on a digital signal. A program memory stores a program divided into a plurality of block programs, the program being stored on an individual block program basis. A data memory stores a set of data used for executing each block program stored in the program memory, the set of data being divided into a plurality of data blocks and stored on an individual data block basis. A program executing unit executes each block program stored in the program memory by using a corresponding data block stored in the data memory. A program changing unit obtains a new block program from an external device each time execution of one of the block programs by the program executing unit is completed so as to store the obtained new block program in the program memory.

Abstract: The light intensity converter comprises a transparent body including opposite first and second curved surfaces. The body is surrounded by an outer peripheral surface extending between the first and second curved surfaces. The body of the converter is arranged such that the incident light is made incident to the body at the first curved surface and emerges from the second curved surface. The incident light diverges in a certain area and converges in another area, by refraction, so that the light intensity distribution of the incident, first curved surface is converted into a different light intensity distribution while the light travels through the converter, and thus exits from the second curved surface.

Abstract: According to the present invention, a flash memory, having a plurality of non-volatile memory cells, comprises: a plurality of cell blocks CBL having the plurality of non-volatile memory cells, a data latch circuit 20, connected to said cell blocks, for storing data that is read from or written to a selected cell block. The flash memory further includes a control circuit 16 for, in response to an external copy command, erasing a copy destination cell block, reading data from a copy source cell block to store the data in said data latch circuit, and writing the stored data to said copy destination cell block. In the flash memory, when the system gives the address of the copy source cell block and the address of the copy destination cell block, checking and erasing of the copy destination cell block required for copying, reading of data from the copy source cell block and writing that data to the copy destination cell block are performed automatically inside the memory.

Abstract: A stabilized gain temperature compensated optical amplifier having automatic gain control and automatic level control. An optical amplifier with a temperature dependent gain wavelength characteristic is disposed along an optical transmission line and compensated with a temperature sensitive gain controller cascade connected with the temperature sensitive optical amplifier. The temperature sensitive gain controller has a temperature sensitive loss wavelength characteristic which complements the temperature sensitivity of the amplifier gain wavelength characteristic. The gain controller includes a plurality of grating portions provided with mutually different loss wavelength characteristics, the loss wavelength characteristics having mutually different temperature dependencies. An automatic gain control, independent of the gain controller maintains the gain of the temperature sensitive optical amplifier at a constant level.

Abstract: A transmission device includes a channel allocation part which groups channels defined on a transmission line into groups and allocate, for each of the groups, the channels in one of predetermined transmission modes which can be defined on a dual link formation of a network to which the transmission device can be connected.

Abstract: The invention relates to an optical amplifier; more particularly, the invention provides an optical amplifier that contains a front-end optical amplifier and a back-end optical amplifier, and that is equipped with an automatic compensation function for automatically detecting and compensating for signal loss caused by a dispersion compensator inserted between the front-end and back-end optical amplifiers. The optical amplifier, which contains a front-end optical amplifier 31 and a back-end optical amplifier 32, comprises: a loss detection means 36 for detecting optical signal loss occurring between the front-end optical amplifier and the back-end optical amplifier; and a gain control means 37 for compensating, based on the loss detected by the loss detection means, for a variation in optical output power of the entire optical amplifier including the front-end optical amplifier and back-end optical amplifier.

Abstract: A novel chemical amplification resist composition which comprises an alkali-soluble base resin, a photoacid generator and a dissolution inhibitor and in which a cyclic or acyclic structure constituting a matrix portion of the molecule of said dissolution inhibitor contains at least one lone pair-containing portion which can provide a hydrogen bond sufficient to shift and gather an alkali-soluble moiety of said base resin to and on a side of said molecule of the dissolution inhibitor compound. The resist composition can exhibit both excellent sensitivity and resolution and accordingly can be utilized in the formation of very fine resist patterns in a lithographic process. A method for forming such resist patterns is also disclosed.

Abstract: A memory unit having a plurality of heads performing at least one of recording or reproducing operations on a storage medium is disclosed. The memory unit includes a first converter circuit for receiving head-selection signals as first parallel data and converting the head-selection signals to first serial data to be transmitted, and a second converter circuit for receiving the first serial data from the first converter circuit and converting the first serial data to second parallel data to be transmitted. The memory unit further includes a head control circuit for receiving the second parallel data from the second converter circuit and selectively driving the heads on the basis of the second parallel data.

Abstract: A magnetic disk drive having an electrical connection structure capable of supplying/recalling a reliable magnetic head signal. The magnetic disk drive includes an actuator arm rotatably mounted on a base, a spring arm whose basal end portion is secured to a distal end portion of the actuator arm, and a magnetic head supported by the distal end portion of the spring arm. The spring arm has a first conductor pattern one end of which is connected to the magnetic head. The magnetic disk drive further includes a main FPC having a second conductor pattern, and a relaying FPC for interconnecting the conductor pattern of the spring arm and the conductor pattern of the main FPC. The relaying FPC includes a third conductor pattern and terminals. Each terminal is constituted of a convex metal and a solder formed on the convex metal.

Abstract: In a compound semiconductor device constituting a field effect transistor having a buried p region 3, a channel region 4 is formed thin and highly doped by n-type impurity, and the buried p region 3 is formed shallowly and highly doped by p-type impurity to compensate the highly doped channel region 4. In order to prevent a leakage current between the highly doped buried p region 3 and a gate electrode 5, a low concentration p-type impurity region 2 is formed on both sides of the highly doped buried p region 3 to thus prevent a current flow via a portion other than a channel region. Accordingly, there can be provided the compound semiconductor device including an FET which is able to suppress both the deterioration in the pinch-off characteristic and the leakage current between neighboring elements due to p-type impurity conduction other than a channel in an FET which has a high concentration and thin active layer, while suppressing the short channel effect.

Abstract: Based on the importance of object portions, a three-dimensional polygon display apparatus adjusts the extent to which the amount of polygon data is reduced by progressive polygon data reduction. An object is divided into object portions, which are magnified and adjusted depending on their importance or conspicuity, or the extent to which polygon reduction processing is performed is set individually. Object portions hidden inside the object are rearranged on the outside, or the enclosing object portions are deformed to expose the internal object portions on the outside. After this adjustment, polygon reduction processing is performed. One set of texture information is assigned to each vertex in the case of a development into two dimensions. If polygon vertices have been moved, the used texture information is that of the closest vertex, or an intrapolation of the texture information of surrounding vertices.

Abstract: A surface discharge type plasma display panel (PDP) includes a pair of front and rear substrates (11, 21) with a discharge space (30) therebetween and a plurality of pair display electrodes on internal surface of either the front or rear substrate. The display electrodes are extending along each display line L. The PDP further includes a light shielding film (45), having a belt shape extending along the display line direction, formed on either internal or outer surface of the front substrate (11) to overlap each area S2 between the adjacent display lines L and sandwiched between the display electrodes X and Y.

Abstract: Disclosed is a semiconductor device for outputting an output signal with a given phase held relative to an external clock despite a difference in characteristic, a change in temperature, and a fluctuation in supply voltage. The semiconductor device comprises an input circuit for inputting the external clock and outputting a reference signal, an output circuit for receiving an output timing signal and outputting an output signal according to the timing of the output timing signal, and an output timing control circuit for controlling the output timing so that the output signal exhibits a given phase relative to the external clock.

Abstract: A method for plating conductive material in through apertures and blind apertures of a substrate which has a conductive material on its upper and lower surfaces. In a typical configuration for plating a via, there is a first region of conductive material adjacent to, but outside of, the aperture which forms the via and a second region of conductive material inside of the aperture. The second conductive region is selected to be the cathode of the plating process. The structure is placed in a plating bath, a first potential is applied to the first region of conductive material, and a second potential is applied to the second region of conductive material, with the second potential being different from the first potential. Under these conditions, material will plate onto the second region of conductive material to fill the aperture.

Abstract: A motor 51 is attached on the bottom surface side of a motor base 52 with a pinion gear 54 and an output gear 55 housed in a gear housing portion 521 thereof, and an output shaft 553 of the output gear 55 is inserted through a side plate 25L of an air outlet and is coupled to a flap 30 while the output shaft 553 is supported by a bearing hole 526 formed on the bottom portion of the motor base 52, and by a burring hole 251 formed at the side plate 25L. Therefore, the configuration of a flap driving means is simplified, the size is reduced, and the backlash of driving gears is controlled to smoothly drive the flap without rattling.