Abstract: The present invention is for the purpose of allowing a transferring mechanism to certainly carry out the direct insertion/extraction of a cartridge into/from a recording/reproduction unit. For this purpose, in a structure according to this invention, introduction guides (a guide member) for guiding the cartridge to be inserted from the external through an accessor (the transferring mechanism) toward the interior of a deck (the recording/reproduction unit) is provided in a cartridge insertion/discharge opening section of the deck. The introduction guides are formed to have tapered surfaces broadening out from the deck to the external. Further, this invention is applicable to a large-capacity external storage memory storing a large number of cartridges such as magnetic tape cartridges and optical disk cartridges.
Abstract: A phase comparator compares the phases of first and second signals with each other. The phase comparator has a first control circuit, a second control circuit, and a phase comparator unit. The first control circuit divides the frequency of the first signal by n in response to a third signal where n is an integer equal to or larger than 2. The second control circuit divides the frequency of the second signal by n in response to the third signal. The phase comparator unit compares the phases of signals provided by the first and second control circuits with each other. The phase comparator unit is capable of correctly comparing the phases of even high-speed signals with each other, and therefore, is applicable to a DLL circuit that operates on high-speed clock signals.
Abstract: A computer system which operates by means of a plurality of programs and which controls the giving and receiving of data between programs in memory, the computer system including: a data storage area for storage of data which includes data having differing data formats, such as numeric data or character strings; and a data driver which controls the giving and receiving of data between the plurality of programs and the data storage area, wherein in the case in which data is to be passed from a first program to a second program of the plurality of programs, the data driver storing data from the first program into the data storage area, and in accessing the stored data, converting it to a format specified by the second program and passing the data to the second program. In this configuration, it is possible to give and receive data between programs without either considering the differences between systems or platforms, or having to change the common interface between programs.
Abstract: A remote resource management system for maintaining resources shared in a distributed computing system, which downloads only such resources that are the most suitable for an application requested by a user. When a user selects an application at a terminal computer, an application server computer providing the selected application will determine the most suitable resources for the selected application by consulting a resource linkage manager disposed therein. The application server transfers information advising the suitable resources, together with a download agent, to the terminal computer. In the terminal computer, the download agent determines whether the resources should be newly downloaded or not, referring to local resource management information that describes what resources exist in the terminal computer. If downloading is necessary, the resource management system locates the necessary resource files by using a downloadable resource management directory in a resource server computer.
Abstract: A disk-cartridge-type adapter is capable of preventing damage to a head of the adapter and a head of a disk cartridge drive into which the adapter is inserted, even if these heads are deviated from each other. The adapter is also capable of effectively using the functions of the disk cartridge drive.
The head of the adapter has a gap width and a head length that are sufficiently large to cover a setting error between the heads of the adapter and disk cartridge drive. The head of the adapter is covered with protective films having grooves. The head of the adapter has reinforcing supports each having a hollow in which the head of the disk cartridge drive moves. The head and supports of the adapter have holes for passing a shaft fixed to the adapter. The diameter of the holes is greater than that of the shaft. The adapter has a write-protect mechanism and a double-density detecting mechanism. The adapter has a card slot provided with a stepped part, and a hole used to extract an IC card from the adapter.
Abstract: A data processing system which is able to execute, decode and encode process variable length code (VLC) data in a finite number of programming steps and thereby reduce the time required to manipulate VLC data. This is accomplished by using buffer registers to store VLC data loaded from memory and VLC data to be stored to memory. Offset registers are used to indicate the size of the blank region within the buffer registers provided. Using these offset registers load and store processing between the memory and buffer registers and shift processing within the buffer registers can easily be accomplished.
Abstract: Image data from an upper apparatus is compressed by a compressing unit, the compressed image data is transferred to a display apparatus by a printer interface of a low speed, and the original image data is reconstructed by a decoding unit and displayed. The display apparatus is a projector and auxiliarily displays a second picture plane into a first picture plane for presentation by an independent liquid crystal panel. A phase transition type liquid crystal panel of a number of pixels and a high resolution is used to display the first picture plane and the image data is compressed and transferred and is displayed. As a second picture plane, a personal computer picture plane is transferred and displayed as it is.
Abstract: A method of manufacturing an electronic device including an oxide film of perovskite-type, said method comprising the steps of forming on a base substrate a first conductive oxide film of perovskite type in an atmosphere of reduced pressure at a first temperature, and performing heat treatment on the first conductive oxide film in an oxidizing atmosphere containing oxygen at a second temperature which is higher than the first temperature.
Type:
Grant
Filed:
October 21, 1998
Date of Patent:
February 27, 2001
Assignee:
Fujitsu Limited
Inventors:
Mitsushi Fujiki, Jeffrey S. Cross, Mineharu Tsukada
Abstract: An encoder/decoder is disclosed which is operative to convert an 8 bit value to a ten bit serial run length limited code for transmission over a serial data link. The encoding technique maintains DC balance within 2 bits over a single ten bit word and compensates for DC imbalance by inverting selected words in the transmission sequence to correct for a DC imbalance resulting from the transmission of a prior unbalanced word. One or more encoding lookup tables are employed at the encoder to map each byte into a ten bit run length limited code for serialization and transmission over the serial data link. A second decoding lookup table is employed at the decoder to map the received 10 bit run length limited code into the original 8 bit value.
Abstract: The invention provides a portable terminal apparatus for use to read information from an object of reading such as a bar code and process the information, which is improved in that a trigger key of an optical reading unit is located so as to be used readily by an operator to assure a high degree of operability. The portable terminal apparatus includes an apparatus body, an inputting section provided on the apparatus body for inputting processing information including data and an operation instruction, and an optical reading unit mounted on the apparatus body for irradiating light upon a reading object and receiving reflected light from the reading object to obtain read information of the reading object. The portable terminal apparatus is additionally provided with a reading function as the optical reading unit is mounted integrally on the apparatus body.
Abstract: A coolant for cooling a semiconductor element by direct immersion, cooling, which has an improved cooling capability, is disclosed. The coolant comprises a low boiling point fluorocarbon having a boiling point of 30° C. to 100° C. and a high boiling point fluorocarbon having a boiling point higher than that of the low boiling point fluorocarbon by at least 100° C.; an amount of the high boiling point fluorocarbon being less than 20% by volume, based on the volume of the low boiling point fluorocarbon.
Abstract: An input circuit for use in a semiconductor integrated circuit decreases a phase lag between a clock signal and an input signal. The input circuit includes a first amplifier that receives an external clock signal at a first input and a reference voltage signal at a second input, and generates an amplified clock signal, and a second amplifier that receives an external input signal at a first input and the reference voltage at a second input, and generates an amplified input signal. A latch circuit is connected to the first and second amplifiers and receives the amplified clock signal at its clock input and the amplified input signal at its data input. The first and second amplifiers receive a high voltage supply signal from a common a high potential power supply and a low voltage supply signal from a common low potential power supply.
Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.
Abstract: A current source switch circuit has at least one transistor forming part of a current source, and one switch for controlling the supply of an electric current from the transistor to a load. A voltage application unit applies a voltage having a value in an operation state as a current source to a transistor forming part of the current source while no electric current is provided from the switch to the load.
Abstract: A tuning-fork vibration gyro includes a tuning-fork vibrator having two arms and a base portion, and a supporting portion located in a center of a rotational motion of the base portion caused by a vibration resulting from a Coriolis force. The supporting portion protrudes from two surfaces of the base portion opposite each other in a direction in which the vibration resulting from the Coriolis force occurs.
Abstract: A magnetic head assembly including a carriage arm and a spring arm having at least one magnetic head attached thereto. The spring aim is provided with a cylindrical member including a thin plate member having a trapezoidal cross-section provided at one end thereof. The structure of the spring arm enables the spring arm to be removably attached to a carriage arm of the magnetic head assembly.
Abstract: Flow shaping is executed at each ATM device in a virtual circuit formed in an ATM network. More particularly, the flow of data units through the virtual circuit is controlled at each ATM switch such that the variable transmission delay remains substantially constant from hop to hop. Flow shaping at each device causes variable transmission delay to remain substantially constant throughout the virtual circuit, thereby allowing formation of an ATM virtual circuit having an arbitrarily large number of ATM switch “hops” without constraints imposed by required playout buffer size. Further, the invention minimizes end-to-end delay.
Abstract: This invention is characterized in that a load resistor is constituted of a tunneling junction element(12), and a single-electron tunneling junction element(10) and the tunneling junction element(12) for load resistor are laminated to design a phase-locked circuit compact. Further, the load resistor(12) is comprised of a plurality of laminated tunneling junctions for load resistor so that the load resistor can have the proper resistance. A DC bias voltage is applied to the electrode(37) of the tunneling junction element for load resistor, and an AC pump voltage to one electrode(20) of the single-electron tunneling junction element. In the case of a plurality of phase-locked circuit gates, one electrodes of the single-electron tunneling junction elements are designed into a common electrode to which the AC pump voltage is applied, and the other electrodes are formed apart from one another two-dimensionally.
Abstract: The DC output of a power conversion unit is controlled based on a pulse signal generated by a PWM unit. An operations unit detects an output current Iout, and determines the operation mode of a load based on the detected current value. When the output current Iout is weak, a value smaller than usual is written to a cycle register. The PWM unit generates a pulse signal according to the data stored in the cycle register and an on-time register.
Abstract: One end of a resistor R1 is connected to a charger detection terminal OCV and the other end of the resistor R1 is connected to a base terminal of an NPN type bipolar transistor Q2 of open collector structure to thereby supply a driving bias current. An emitter terminal of the transistor Q2 is connected to a reference potential and a collector terminal of the transistor Q2 is connected to a gate terminal COUT of a charge control P type FET 204. Not only the resistor R1 but also a collector terminal of an NPN type bipolar transistor Q1 of an open collector structure is connected to the base terminal of the transistor Q2. An emitter terminal of the transistor Q1 is connected to the reference potential and an overcharge control signal from an overcharge control circuit 231 is connected to a base terminal of the transistor Q1.