Abstract: A positioning method using music pieces continuously provides positioning service. At each signature burst (i.e., a highly unique short musical segment suitable for positioning), sounds of a music piece are used for positioning. Between signature bursts, dead reckoning (DR) is used.
Type:
Grant
Filed:
July 26, 2018
Date of Patent:
July 7, 2020
Assignees:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: A configurable computing array comprises at least an array of configurable interconnects, at least an array of configurable logic elements and at least an array of configurable computing elements. Each configurable computing element comprises at least a programmable memory for storing a look-up table (LUT) for a math function.
Type:
Grant
Filed:
November 11, 2018
Date of Patent:
June 30, 2020
Assignees:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: A discrete 3-D processor comprises first and second dice. The first die comprises three-dimensional memory (3D-M) arrays, whereas the second die comprises logic circuits and at least an off-die peripheral-circuit component of the 3D-M array(s). The first die does not comprise the off-die peripheral-circuit component. The first and second dice are communicatively coupled by a plurality of inter-die connections. The preferred discrete 3-D processor can be applied to mathematical computing, computer simulation, configurable gate array, pattern processing and neural network.
Type:
Application
Filed:
January 16, 2019
Publication date:
June 11, 2020
Applicant:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: A configurable processor comprises at least an array of configurable computing elements (CCE's). Each CCE comprises at least a three-dimensional (3-D) memory (3D-M) array; an arithmetic logic circuit (ALC); and, a plurality of inter-storage-processor (ISP) connections. Not penetrating through any semiconductor substrate, the ISP-connections are short, small and numerous.
Type:
Application
Filed:
November 24, 2019
Publication date:
April 23, 2020
Applicant:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: In a shared three-dimensional vertical memory (3D-MV), each horizontal address line comprises at least two regions: a lightly-doped region and a low-resistivity region. The lightly-doped region is formed around selected memory holes and shared by a plurality of low-leakage memory cells. The low-resistivity region forms a conductive network to reduce the resistance of the horizontal address line.
Type:
Application
Filed:
November 22, 2019
Publication date:
March 19, 2020
Applicant:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: A multi-bit-per-cell three-dimensional read-only memory (3D-OTPMB) comprises a plurality of dummy bit lines. It comprises a plurality of OTP cells stacked above a semiconductor substrate. Each OTP array comprises at least four dummy bit lines.
Type:
Grant
Filed:
August 7, 2018
Date of Patent:
February 25, 2020
Assignees:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: A coordinated parking-monitoring system comprises a plurality of camera-based parking-monitoring devices. Each camera in the coordinated parking-monitoring system can effectively monitor more parking areas than a single camera-based parking-monitoring device.
Type:
Grant
Filed:
September 8, 2019
Date of Patent:
February 25, 2020
Assignees:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: In a shared three-dimensional vertical memory (3D-MV), each horizontal address line comprises at least two regions: a lightly-doped region and a low-resistivity region. The lightly-doped region is formed around selected memory holes and shared by a plurality of low-leakage memory cells. The low-resistivity region forms a conductive network to reduce the resistance of the horizontal address line.
Type:
Grant
Filed:
September 20, 2018
Date of Patent:
February 18, 2020
Assignees:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: A preferred IR-bicycle comprises an infrared (IR) sensor and non-IR electronics. The IR sensor detects a person in the proximity of the IR-bicycle (i.e. a nearby person). Once the IR sensor detects a nearby person, the non-IR electronics switches from a first mode to a second mode, wherein the power consumption in the first mode is substantially lower than that in the second mode.
Type:
Grant
Filed:
September 8, 2019
Date of Patent:
February 18, 2020
Assignees:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: To achieve a better overall performance, a preferred pattern processor offsets large latency with massive parallelism. The preferred pattern processor could be either a pattern-processor die comprising 3-D non-volatile memory (3D-NVM) arrays, or a pattern-processor doublet comprising a 3D-NVM die and a pattern-processing die bonded face-to-face. A searchable storage comprises a plurality of storage-like pattern processors, each of which not only stores data but also has in-situ searching capabilities.
Type:
Application
Filed:
October 7, 2019
Publication date:
February 13, 2020
Applicant:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: The present invention discloses a three-dimensional vertical read-only memory (3D-OTPV) comprising Schottky diodes. It comprises a plurality of vertical OTP strings formed side-by-side on a substrate circuit. Each OTP string is vertical to the substrate and comprises a plurality of vertically stacked OTP cells. Each OTP cell comprises an antifuse layer. A plurality of Schottky diodes are formed between the horizontal address lines and the vertical address lines.
Type:
Grant
Filed:
April 8, 2018
Date of Patent:
February 11, 2020
Assignees:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: A coordinated parking-monitoring system comprises a plurality of camera-based parking-monitoring devices. Each camera in the coordinated parking-monitoring system can effectively monitor more parking areas than a single camera-based parking-monitoring device.
Type:
Application
Filed:
September 8, 2019
Publication date:
January 30, 2020
Applicant:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: To achieve a better overall performance, a preferred pattern processor offsets large latency with massive parallelism. It comprises a plurality of storage-processing units (SPU's), each of which comprises a single pattern-processing circuit, at least a three-dimensional memory (3D-M) array and a plurality of inter-storage-processor (ISP) connections. The ISP-connections do not penetrate through any semiconductor substrate.
Type:
Application
Filed:
October 6, 2019
Publication date:
January 30, 2020
Applicant:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: A preferred IR-bicycle comprises an infrared (IR) sensor and non-IR electronics. The IR sensor detects a person in the proximity of the IR-bicycle (i.e. a nearby person). Once the IR sensor detects a nearby person, the non-IR electronics switches from a first mode to a second mode, wherein the power consumption in the first mode is substantially lower than that in the second mode.
Type:
Application
Filed:
September 8, 2019
Publication date:
December 26, 2019
Applicant:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: To detect front-parked vehicles at night (i.e. a vehicle is parked with its head facing the inside of a parking space), a detection device uses the light beam from a passing-by vehicle to extract at least a reflection of at least a tail light or at least a portion of a back bumper from an image captured for a parking space.
Type:
Application
Filed:
September 8, 2019
Publication date:
December 26, 2019
Applicant:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: In a shared three-dimensional vertical memory (3D-Mv), each horizontal address line comprises at least two regions: a lightly-doped region and a low-resistivity region. The lightly-doped region is formed around selected memory holes and shared by a plurality of low-leakage memory cells. The low-resistivity region forms a conductive network to reduce the resistance of the horizontal address line.
Type:
Application
Filed:
September 20, 2018
Publication date:
November 28, 2019
Applicant:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: The present invention discloses a three-dimensional vertical one-time-programmable memory (3D-OTPV). It comprises horizontal address lines and memory holes there-through, an antifuse layer and vertical address lines in said memory holes. The antifuse layer comprises at least first and second sub-layers with different antifuse materials. The 3D-OTPV comprises no separate diode layer.
Type:
Grant
Filed:
March 13, 2018
Date of Patent:
November 26, 2019
Assignees:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: To detect front-parked vehicles at night (i.e. a vehicle is parked with its head facing the inside of a parking space), the present invention discloses a night-detection device. It comprises a moving-vehicle sensor and a parked-vehicle sensor. It uses the light beam from a passing-by vehicle to extract at least a reflection of at least a tail light or at least a portion of a back bumper.
Type:
Grant
Filed:
July 25, 2018
Date of Patent:
November 5, 2019
Assignees:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: To implement a complex math function, i.e. a math function with multiple input variables, a configurable computing array comprises at least an array of configurable computing elements. Each configurable computing element comprises at least a memory which stores a look-up table (LUT) for a math function with a single input variable.
Type:
Grant
Filed:
September 5, 2018
Date of Patent:
October 29, 2019
Assignees:
HangZhou HaiCun Information Technology Co., Ltd.
Abstract: A three-dimensional processor (3D-processor) for calculating mathematical functions in parallel, comprises a larger number (e.g. at least one thousand) of computing elements, with each computing element comprising at least one three-dimensional memory (3D-M) array for storing at least a portion of a look-up table (LUT) for a mathematical function and an arithmetic logic circuit (ALC) for performing arithmetic operations on the LUT data. Even though each individual 3D-M cell is slower than a conventional two-dimensional memory (2D-M) cell, this deficiency in speed is offset by a significantly larger scale of parallelism.
Type:
Application
Filed:
June 30, 2019
Publication date:
October 24, 2019
Applicant:
HangZhou HaiCun Information Technology Co., Ltd.