Patents Assigned to Hitachi Device Engineering Co., Ltd.
  • Patent number: 6555882
    Abstract: A field-effect semiconductor element implemented with a fewer number of elements and a reduced area and capable of storing data by itself without need for cooling at a cryogenic temperature, and a memory device employing the same. Gate-channel capacitance is set so small that whether or not a trap captures one electron or hole can definitely and distinctively be detected in terms of changes of a current of the semiconductor FET element. By detecting a change in a threshold voltage of the semiconductor element brought about by trapping of electron or hole in the trap, data storage can be realized at a room temperature.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: April 29, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Kazuo Yano, Tomoyuki Ishii, Takashi Hashimoto, Koichi Seki, Masakazu Aoki, Takeshi Sakata, Yoshinobu Nakagome, Kan Takeuchi
  • Patent number: 6556499
    Abstract: In a nonvolatile semiconductor memory in which multiple-value information is stored in one memory cell by setting a plurality of threshold values, data is successively read from word lines while continuously changing the word-line read level from a lowest level to a highest level, and the next bit line is selectively precharged in accordance with the data stored in latch means for storing read data.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: April 29, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp., Hitachi Device Engineering Co., Ltd.
    Inventors: Hiroshi Sato, Shoji Kubono, Toshinori Harada, Takayuki Kawahara, Naoki Miyamoto
  • Patent number: 6556474
    Abstract: In a nonvolatile semiconductor memory device capable of the storage of multivalued data, fast writing can be realized with high reliability. In such a nonvolatile semiconductor memory device for storing multivalued information in one memory cell by setting a plurality of threshold voltages of data, writing of data having one threshold voltage that is the remotest to an erased state is performed prior to writing of the data having the other threshold voltages (write #1). Writing of the data having the other threshold voltages is then sequentially performed within groups of threshold voltages, starting from the nearer threshold voltage to the erased state within each group. When writing each of the data having the other threshold voltages, writing of the data is performed to a memory cell beginning with those groups having the remoter threshold voltages from the erased state.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: April 29, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Naoki Kobayashi, Hideaki Kurata, Katsutaka Kimura, Takashi Kobayashi, Shunichi Saeki
  • Patent number: 6556182
    Abstract: A liquid crystal display element having pixels, video signal lines applying a video signal voltage to the pixels and a video signal line driver supplying the video signal voltages to the video signal lines. The video signal line driver circuit includes a gray-scale voltage generating circuit provided with a resistor circuit dividing voltages between plural gray-scale reference voltages to generate plural gray-scale voltages, and selector circuits selecting one gray-scale voltage in accordance with the display data. The resistor circuit includes a resistive element provided with plural Intermediate taps for dividing voltages to generate the gray-scale voltages, gray-scale voltage lines corresponding to the gray-scale voltages, an interlayer insulating film insulating the gray-scale lines from the resistive element, and connections connecting the gray-scale voltage lines to corresponding ones of the intermediate taps through a hole in the interlayer insulating film.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: April 29, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Mitsuru Goto, Yozo Nakayasu, Shinji Yasukawa, Kentaro Agata, Yuji Yamashita, Koichi Kotera
  • Patent number: 6535189
    Abstract: A liquid crystal display device includes a liquid crystal panel having plural pixels and a video signal line driver circuit for supplying a video signal voltage to each of the pixels via a corresponding one of plural video lines in accordance with a P-bit display data.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: March 18, 2003
    Assignees: Hitachi ULSI Systems Co., Ltd., Hitachi Device Engineering Co., Ltd., Hitachi, Ltd.
    Inventors: Kenichi Akiyama, Yuji Yamashita, Hironobu Isami, Mitsuru Goto, Shinji Yasukawa, Koichi Kotera
  • Patent number: 6529180
    Abstract: A liquid crystal display device constituted by a liquid crystal display element and at least a single piece of semiconductor integrated circuit device and having image signal line driving means for supplying grayscale voltages in correspondence with display data to respective image signal lines of the liquid crystal display element the semiconductor integrated circuit device includes a plurality of grayscales voltage selecting means for selecting grayscale voltages in correspondence with display data inputted from a plurality of grayscale voltages, a plurality of amplifiers for amplifying the grayscale voltages selected by the respective grayscale voltage selecting means and outputting the grayscale voltages to respective image signal lines and a precharge control circuit provided between the respective grayscale voltage selecting means and the respective amplifiers.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: March 4, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Shigeru Ito, Noboru Kataoka, Akira Ogura
  • Patent number: 6525968
    Abstract: In a nonvolatile semiconductor memory device, in which programming operation of data is conducted by injecting hot electron generated between a source layer and a drain layer of a memory cell into a floating gate between the both layers on an upper potion of surface of a semiconductor, while verification of the data programmed is conducted by making discrimination on whether voltage applied to the drain is kept or not, depending upon a height of a threshold voltage of the memory cell.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: February 25, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Shunichi Saeki, Hideakii Kurata, Naoki Kobayashi
  • Patent number: 6521974
    Abstract: A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si—Ge and a base leading-out electrode are connected via a link base made of polycrystal Si—Ge by doping at high concentration, further, a part immediately under the intrinsic base has the same conductive type as that of a collector and in a peripheral part, a single crystal Si—Ge layer having the same conductive type as that of a base is provided between the intrinsic base and a collector layer. Hereby, the reduction of the resistance of the link base between the intrinsic base and the base leading-out electrode and the reduction of capacitance between the collector and the base are simultaneously realized, and a self-aligned bipolar transistor wherein capacitance between an emitter and the base and capacitance between the collector and the base are respectively small, power consumption is small and high speed operation is enabled is acquired.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: February 18, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Katsuya Oda, Eiji Ohue, Masao Kondo, Katsuyoshi Washio, Masamichi Tanabe, Hiromi Shimamoto
  • Patent number: 6518946
    Abstract: A liquid crystal display device including a liquid crystal panel having a plurality of pixels, a driving circuit applying a video signal voltage to each of the pixels in accordance with display data. The driving circuit has a first circuit, a second circuit, and a switching circuit which connects an output terminal of the first circuit with an input terminal of the second circuit. The first circuit outputs a first voltage and a second voltage in accordance with first display data, and outputs the second voltage and a third voltage in accordance with second display data. The second voltage is lower than the first voltage, and the third voltage is lower than the second voltage.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: February 11, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yukihide Ode, Akira Ogura, Kentaro Agata, Kazunari Kurokawa, Takahiro Fujioka, Hiroshi Katayanagi, Mitsuru Goto
  • Patent number: 6515410
    Abstract: The present invention provides a flat-panel type color cathode ray tube which has the favorable focusing characteristics and can shorten the total length thereof. The color cathode ray tube includes an evacuated envelope which is constituted of a panel 1 which has a diagonal effective diameter of approximately 51 cm, a neck 3 which houses an electron gun 10 and a funnel 3 which connects the panel and the neck. The electron gun 10 includes a cathode, a first electrode, a second electrode, a focusing electrode and an anode electrode. Assuming the equivalent radius of curvature in the X direction of an inner surface of the panel 1 as Rix and the equivalent radius of curvature in the Y direction of an inner surface of the panel 1 as Riy, the distance Lm between the cathode and a screen-side end portion of the focusing electrode is set to 37 mm≦Lm≦45 mm.
    Type: Grant
    Filed: May 3, 2001
    Date of Patent: February 4, 2003
    Assignees: Hitachi Ltd., Hitachi Device Engineering Co. Ltd
    Inventors: Hirotsugu Sakamoto, Tomoki Nakamura, Shinichi Kato
  • Patent number: 6515721
    Abstract: In a liquid crystal display device including a pair of substrates between which a liquid crystal layer is interposed, a semiconductor integrated circuit device provided at a periphery of a liquid crystal layer side surface of one substrate of the pair of substrates, a frame member having a display window and covering the substrates, and a spacer provided between the frame member and the periphery of the liquid crystal side surface of the one substrate, the present invention prevents the substrate from being cracked during assembly processes thereof and improves product quality thereof by protruding one side of the spacer toward another substrate of the pair of substrates partly, disposing the semiconductor integrated circuit device along a concave part of the spacer with respect to the another substrate, and providing an adhesive at a surface of the protruded part of the spacer opposite to the liquid crystal layer side surface.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: February 4, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Nobutaka Jin, Atsushi Nemoto
  • Patent number: 6501153
    Abstract: A high-speed bipolar transistor is provided which is improved in the effect of heat radiation without increasing the substrate capacitance. The heat radiation connection between a base region and a silicon substrate includes a p+ extrinsic base polysilicon electrode and a polysilicon layer buried in an isolation groove with a very thin silicon dioxide side wall. Accordingly, the heat generated at the base is radiated through this path to the silicon substrate. Further, the film thickness of the silicon dioxide on the inner wall of the isolation groove is sufficiently increased compared with previous structures to prevent an increase in the substrate capacitance. Consequently, there can be obtained a bipolar transistor which operates at high speed, and is improved in the effect of heat radiation without increasing the substrate capacitance.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: December 31, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Eiji Oue, Katsuyoshi Washio, Masao Kondo, Hiromi Shimamoto
  • Patent number: 6501456
    Abstract: A liquid crystal display apparatus has horizontal and vertical scanning circuits for scanning an array of pixels. An image signal applied to an image signal supply circuit in the form of series of pixel signals is transferred to pixels in the array of pixels designated by the horizontal and vertical scanning circuits. Each of the horizontal and vertical scanning circuits have a series connection of bidirectional shift register stages and are capable of bidirectional scanning. Each of the bidirectional shift register stages includes a pair of latches connected in tandem and is capable of providing an intermediate output and a shift register stage output.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: December 31, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Katsutoshi Saito, Hideo Sato, Iwao Takemoto, Katsumi Matsumoto
  • Publication number: 20020191131
    Abstract: In a liquid crystal display device comprising a pair of substrates between which a liquid crystal layer is interposed, a display surface provided on one of the substrates, and a lighting device arranged at a side of another of the substrates, the present invention forms a light shielding film on at least one of side surfaces of the substrates along a direction perpendicular to the display surface and prevents light leak leaking from the lighting device through the at least one of side surfaces.
    Type: Application
    Filed: May 9, 2002
    Publication date: December 19, 2002
    Applicant: Hitachi, Ltd. and Hitachi Device Engineering Co. Ltd.
    Inventors: Yoko Ota, Shigeki Nishizawa, Norihisa Fukayama, Naoto Kobayashi
  • Patent number: 6492766
    Abstract: A color cathode ray tube has excellent focusing characteristics over the whole screen thereof, as well as a total length which is short, thus providing a compact monitoring device. The Cathode ray tube has an electron gun in which the ratio between the diagonal size De of a phosphor screen and the distance Lg from the center of the phosphor screen to an end portion of a focusing electrode which forms a main lens portion of the electron gun and faces an anode electrode in an opposed manner is set to De/Lg>1.5. The focusing electrode and the anode electrode have single opening portions whose opening size in the horizontal direction is not less than 68% of the outer diameter of a neck portion and end surfaces of the opening portions face each other in an opposed manner in the tube axis direction along which the electron beams pass.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: December 10, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Mamoru Tsuzurahara, Kenichi Watanabe, Syouji Shirai, Shinichi Kato, Go Uchida, Hirotsugu Sakamoto
  • Patent number: 6482710
    Abstract: A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si—Ge and a base leading-out electrode are connected via a link base made of polycrystal Si—Ge by doping at high concentration, further, a part immediately under the intrinsic base has the same conductive type as that of a collector and in a peripheral part, a single crystal Si—Ge layer having the same conductive type as that of a base is provided between the intrinsic base and a collector layer. Hereby, the reduction of the resistance of the link base between the intrinsic base and the base leading-out electrode and the reduction of capacitance between the collector and the base are simultaneously realized, and a self-aligned bipolar transistor wherein capacitance between an emitter and the base and capacitance between the collector and the base are respectively small, power consumption is small and high speed operation is enabled is acquired.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: November 19, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Katsuya Oda, Eiji Ohue, Masao Kondo, Katsuyoshi Washio, Masamichi Tanabe, Hiromi Shimamoto
  • Patent number: 6476450
    Abstract: Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor, wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: November 5, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Masao Kondo, Katsuyoshi Washio, Eiji Oue, Hiromi Shimamoto
  • Patent number: 6472753
    Abstract: Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor, wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: October 29, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Masao Kondo, Katsuyoshi Washio, Eiji Oue, Hiromi Shimamoto
  • Patent number: 6466282
    Abstract: A liquid crystal display device including a liquid crystal display panel, a first driver circuit substrate, a second driver unit substrate and a flexible connector. The first driver circuit substrate provides electrical connection for at least one driver chip for the liquid crystal display panel with the first driver circuit being disposed at a peripheral portion of the liquid crystal display panel. The second driver circuit substrate has at least a connector to be connected with an external circuit with the second driver circuit substrate being disposed in superposed relation to at least a portion of the first driver circuit substrate. The flexible connector electrically connects at least a part of the first driver circuit substrate to at least a part of the second driver substrate.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: October 15, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Masumi Sasuga, Junichi Ohwada, Akira Kobayashi, Masaru Fujita, Hiroshi Nakamoto, Ryu Ono, Tsutomu Isono
  • Patent number: 6465947
    Abstract: A panel has a flat external surface and has a curvature on an inner surface thereof. A coating having light absorption characteristics is formed on the external surface of the panel. To the top of the coating, a film which has light absorbing characteristics and contains an adhesive is adhered. The light absorption by the coating is large at the central portion of the panel and is small at the peripheral portion of the panel. The light absorption characteristics of the film is approximately uniform on the entire surface of the panel. Due to such a constitution, a color picture tube having a flat external surface, the least brightness difference and an excellent contrast can be realized.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: October 15, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Toshio Tojo, Nobuhiko Hosotani, Masahiro Nishizawa, Norikazu Uchiyama, Maki Taniguchi