Patents Assigned to Hitachi Device Engineering Co., Ltd.
  • Patent number: 6456279
    Abstract: A liquid crystal display device has a position information input device over an image-displaying surface of liquid crystal panel. The position information input device is formed by a first substrate and a second substrate more easily deformable than the first substrate. A transparent insulation film is provided over a surface of the first substrate opposed to the second substrate. By providing a first transparent electrode on the transparent insulation film, the flatness of the first transparent electrode is improved and a connection failure of the position information input device is prevented.
    Type: Grant
    Filed: July 13, 1999
    Date of Patent: September 24, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Kiichiro Kubo, Yoshikuni Nagashima, Masaru Suzuki, Terunori Saito
  • Patent number: 6456344
    Abstract: The present invention provides a liquid crystal display device which is capable of suppressing wavy brightness irregularity which occurs in a display screen edge portion in the vicinity of drivers or tape carrier packages (TCPs) on which the drivers are mounted, owing to the mounting of the drivers or the TCPs. In one example of the present invention, a wavy pattern for preventing brightness irregularity is partially formed along one edge of a light guide plate in the vicinity of drivers mounted on a substrate which constitutes a liquid crystal display panel. Similar effects and advantages are obtained even if this wavy pattern for preventing brightness irregularity is formed on a reflecting sheet arranged on the side of the liquid guide plate opposite to the liquid crystal display panel, or on a diffusion sheet inserted between the light guide plate and the liquid crystal display panel.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: September 24, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Atsushi Nemoto, Masumi Sasuga, Katsuhiko Shibata
  • Patent number: 6445615
    Abstract: A non-volatile semiconductor memory device is capable of having its individual banks controlled separately from the outside, and a semiconductor disk device is capable of proceeding immediately to the next writing to a bank of non-volatile semiconductor memory device which has become ready. Each bank has the independent write operation of data from its data register to memory cells, enabling the transfer of data from the outside to the data register of the bank even during the write operation of other bank from the data register to memory cells thereof.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: September 3, 2002
    Assignees: Hitachi Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Naoki Kobayashi, Shunichi Saeki, Hideaki Kurata
  • Patent number: 6445214
    Abstract: The I/O terminal positions of a pass transistor logic circuit cell are distributed in the cell, an output amplifier is provided on the end part of the cell, the pass transistor circuit is arranged in the direction in which a potential supply line extends, a signal polarity inverting circuit is laid out in the cell and the arrangement of wells is different from the arrangement of a conventional CMOS logic circuit.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: September 3, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yasuhiko Sasaki, Kunihito Rikino, Kazuo Yano, Shunzo Yamashita
  • Patent number: 6438028
    Abstract: In a semiconductor integrated circuit device including a third gate, the present invention improves miniaturization and operation speed and reduces a defect density of an insulator film. In a semiconductor integrated circuit device including a well of a first conductivity type formed in a semiconductor substrate, a source/drain diffusion layer of a second conductivity type inside the well, a floating gate formed over the semiconductor substrate through an insulator film, a control gate formed and isolated from the floating gate through an insulator film, word lines formed by connecting the control gates and a third gate formed and isolated from the semiconductor substrate, the floating gate and the control gate through an insulator film and different from the floating gate and the control gate, the third gate is buried into a space of the floating gates existing in a direction vertical to the word line and a channel.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: August 20, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Takashi Kobayashi, Hideaki Kurata, Naoki Kobayashi, Hitoshi Kume, Katsutaka Kimura, Shunichi Saeki
  • Patent number: 6437619
    Abstract: A DLL circuit or the like is configured so as to be capable of measuring the optimum number of cycles for a delay amount from the input of an external clock to the output of data through the use of a variable delay circuit and performing lock according to the measured number of cycles, whereby a clock generation circuit having a wide lock range can be implemented regardless of the performance of the variable delay circuit and a clock access time.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: August 20, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yuichi Okuda, Hideo Chigasaki, Hiroki Miyashita
  • Patent number: 6424590
    Abstract: In a semiconductor device having a data input buffer capable of inputting write data to each of memory units, the data input buffer is changed from an inactive state to an active state after the reception of instruction for a write operation effected on the memory unit. The data input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by the turning on of a power switch to thereby cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instructions for the memory unit is provided, the data input buffer is rendered active in advance before the instructions for the write operation is provided, whereby wastefully consumed power is reduced.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: July 23, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Binhaku Taruishi, Hiroki Miyashita, Ken Shibata, Masashi Horiguchi
  • Patent number: 6424086
    Abstract: A color cathode-ray tube providing a nonglare effect which can be regenerated without degradation of its nonglare function and which can be inexpensively formed. A light scattering film composed of metal containing compound micro-particles having a high index of refraction and a particle size of 0.1 &mgr;m to 2 &mgr;m is formed in contact with the internal surface of a faceplate of the color cathode-ray tube, and a black matrix having a multiplicity of holes is formed on the light scattering film. A red phosphor layer, a green phosphor layer and a blue phosphor-layer are formed in the holes of the black matrix on the light scattering film in such a manner that the phosphor layers of red, green and blue are disposed cyclically in that order. External light incident on the faceplate is partly reflected by the external surface of the faceplate, and the remainder of the external light passes through the faceplate and is made incident on the light scattering film.
    Type: Grant
    Filed: October 26, 1995
    Date of Patent: July 23, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yoshiyuki Odaka, Masahiro Nishizawa, Toshimasa Ishigaki
  • Patent number: 6417827
    Abstract: A MOS transistor (M1) which is arranged in the highest order of a low Vth MOS transistor grayscale group of a decoder circuit of a drain driver is formed of a CMOS transistor, to prevent a current from flowing from an output side into the low Vth MOS transistor portion owing to a grayscale voltage applied to another portion.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: July 9, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Shoji Nagao, Takahiro Fujioka, Mitsuru Goto, Kazunari Saito, Shinji Yasukawa, Yozo Nakayasu, Kentaro Agata
  • Patent number: 6411359
    Abstract: A frame area of a liquid crystal display device is reduced by improving the layouts of extraction lines DTM of drain wiring of a TFT liquid crystal display device, a driving IC of the TFT liquid crystal display device and a flexible board FPC2 for a drain driving circuit of the TFT liquid crystal display device.
    Type: Grant
    Filed: April 13, 1999
    Date of Patent: June 25, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Kengo Kobayashi, Kaoru Hasegawa, Katsuhiko Yarita, Yoshio Toriyama
  • Patent number: 6407518
    Abstract: A color display device includes a color cathode ray tube having a phosphor screen, a color selection electrode and an electron gun for projecting plural in-line electron beams toward the phosphor screen, a deflection device for deflecting the electron beams horizontally and vertically, an electron beam correction apparatus including a correction coil wound around the tube axis, a deflection circuit for driving the deflection device, and an electron beam correction circuit for supplying to the electron beam correction apparatus a generally rectangular-wave signal having a period equal to two times a period of the vertical deflection of the electron beams and in synchronism with the vertical deflection of the electron beams.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: June 18, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Hirotsugu Sakamoto, Hiroshi Sasaki, Kenichi Watanabe, Shinichi Kato
  • Patent number: 6396464
    Abstract: The liquid-crystal display control apparatus provided by the present invention comprises a display RAM unit 21 for storing character codes, character-generator RAM and ROM units 22 and 23 for storing character font patterns and a segment RAM unit 24 for storing picture patterns such as marks and icons. When displaying a character, the following display control is carried out. First of all, a character code is read out from the display RAM unit 21 at a display address generated by a display-address counter 25. The character code is then used in conjunction with a raster address output by a line-address counter 26 for reading out a character font pattern from the character-generator RAM unit 22 or the character-generator ROM unit 23. When displaying a picture pattern such as a mark or an icon, on the other hand, the following display control is carried out. Display control information is read out from the segment RAM unit 24 at an address generated by the display-address counter 25.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: May 28, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yoshikazu Yokota, Satoru Tsunekawa, Kimihiko Sugiyama
  • Patent number: 6392729
    Abstract: Disclosed are a liquid crystal display device capable of obtaining preferable display images, whose manufacturing cost is low, and which does not deteriorate the environment at the time of fabrication and a method for fabricating the same.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: May 21, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Akiya Izumi, Masao Yoshioka, Tatsuo Hamamoto, Norimasa Akiyama
  • Patent number: 6392619
    Abstract: In a data transfer circuit, a hold signal generating circuit generates and outputs a hold signal Hold when transmission data is equal to transmission data one cycle before, and sets a 3-state output buffer for transmission data to high-impedance state, while, in a data reception circuit, when the hold signal Hold is valid, a data reception circuit outputs the reception data held, thereby power consumption in a data bus which is terminated with a terminal resistor is reduced.
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: May 21, 2002
    Assignees: Hitachi, Ltd., Hitachi Video and Information System, Inc., Hitachi Device Engineering Co., Ltd.
    Inventors: Hiroyuki Nitta, Atsuhiro Higa, Masashi Nakamura, Satoru Tsunekawa, Hirobumi Koshi
  • Patent number: 6389180
    Abstract: There is disclosed a resolution conversion apparatus for converting an original digital image into a digital image having a different number of pixels in accordance with an instructed conversion magnification factor. In the apparatus, a determination circuit determines the number of pixels to be interpolated in each block of the original image and positions where they are interpolated in accordance with the conversion magnification factor. The block includes a predetermined number of pixels of the original image. A converted image generation circuit generates pixel data for the interpolation pixels at the positions where they are interpolated in accordance with a predetermined interpolation equation whose coefficients are determined with the positions and data values of the pixels in the block, and combines the pixel data for the digital original image and the generated pixel data to output a converted digital image. The interpolation equation includes spline functions and Bezier functions.
    Type: Grant
    Filed: August 10, 2000
    Date of Patent: May 14, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Shinji Wakisawa, Naruhiko Kasai, Hiroko Sato, Youichi Watanabe, Hiroyuki Koizumi
  • Patent number: 6388653
    Abstract: A liquid crystal display device includes plural pixels supplied with video signal voltages via video signal lines, and a video signal line driver circuit for supplying the video signals voltage to the video signal lines. The video signal line driver circuit includes plural differential amplifiers each having a pair of a first input terminal and a second input terminal and amplifying inputted video signals and supplying the amplified video signal to the video signal lines, a plurality of pairs of an inverting input terminal and a noninverting input terminal each pair corresponding to each of the differential amplifiers.
    Type: Grant
    Filed: March 2, 1999
    Date of Patent: May 14, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Mitsuru Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
  • Patent number: 6388722
    Abstract: A liquid crystal display device having a liquid crystal display element, a backlight for supplying light to the liquid crystal display element and a case for accommodating the liquid crystal display element and the backlight. The backlight has a light guide plate and a lamp unit, wherein the lamp unit providing a fluorescent tube, bushings made of an insulating material, a lamp reflector and a lamp cable and the lamp reflector holds the fluorescent tube through the bushings, and made by bending a stiff metal plates.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: May 14, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yoshiomi Yoshii, Masahiko Suzuki, Kenichi Iwamoto, Tustomu Isono, Yuji Yamakawa
  • Patent number: 6385085
    Abstract: In a nonvolatile semiconductor memory in which multiple-value information is stored in one memory cell by setting a plurality of threshold values, data is successively read from word lines while continuously changing the word-line read level from a lowest level to a highest level, and the next bit line is selectively precharged in accordance with the data stored in latch means for storing read data.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: May 7, 2002
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp., Hitachi Device Engineering Co., Ltd.
    Inventors: Hiroshi Sato, Shoji Kubono, Toshinori Harada, Takayuki Kawahara, Naoki Miyamoto
  • Patent number: 6385118
    Abstract: In a semiconductor integrated circuit in which an internal voltage generation circuit operating on a power supply voltage supplied through an external terminal forms either or both of a low voltage and a boosted voltage to operate internal circuits, a first internal circuit operating on the power supply voltage supplied through the external terminal or the boosted voltage formed by the internal voltage generation circuit is constituted by a first MOSFET with a gate insulation film having a large thickness adapted to the power supply voltage or boosted voltage, and a second internal circuit operating on the low voltage is constituted by a second MOSFET with a gate insulation film having a small thickness adapted to the low voltage.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: May 7, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Hiroki Fujisawa, Kazuhiko Kajigaya, Kenichi Fukui, Toshikazu Tachibana
  • Patent number: 6373547
    Abstract: A method for forming a liquid crystal display device includes forming a metal film over a drive substrate, and patterning the metal film to form at least one pixel electrode and an optical shield film. The optical shield film is provided outside of a pixel electrode area and has a width greater than a width of each of the pixel electrode. A resin is deposited over the patterned metal film, and the resin is patterned to form at least one pole spacer and strip spacer. The strip spacer surrounds the pixel electrode area and has a width greater than a diameter of each of pole spacer. Liquid crystal material is supplied into an inside space which is surrounded by the strip spacer, and a sealing material is filled at outer edges of the strip spacer for fixing the drive substrate and a common substrate.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: April 16, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Katsutoshi Saito, Syoichi Hirota, Iwao Takemoto, Toshio Miyazawa, Katsumi Matsumoto