Patents Assigned to Hynix Semiconductor
  • Precharging circuit and semiconductor memory device including the same
    Patent number: 8559254
    Abstract: A semiconductor memory device includes a write driver for transmitting data loaded on a global line to a local line pair, a read driver for transmitting data loaded on the local line pair to the global line, a core region for storing data loaded on the local line pair or provide stored data to the local line pair, and a precharging circuit configured to precharge the local line pair by selectively using a first voltage and a second voltage in response to a precharge control signal and an operation mode signal, wherein the second voltage is lower than the first voltage.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: October 15, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seung-Bong Kim
  • Method for fabricating side contact in semiconductor device using double trench process
    Patent number: 8557662
    Abstract: A method for fabricating a semiconductor device is provided, the method includes forming a double trench including a first trench and a second trench formed below the first trench and having surfaces covered with insulation layers, and removing portions of the insulation layers to form a side contact exposing one sidewall of the second trench.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: October 15, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sang-Oh Lee
  • Data output circuit and method
    Patent number: 8559242
    Abstract: A data output circuit includes a strobe signal controlling block configured to generate a first delayed strobe signal by delaying a first strobe signal by a certain delay amount, an input/output sense amplifying block configured to amplify first parallel data signals to generate second parallel data signals having the same number of bits as that of the first parallel data signals in response to the first strobe signal and the first delayed strobe signal, a storing block configured to latch the second parallel data signals in response to a second strobe signal and a second delayed strobe signal, and a parallel-to-serial converting block configured to sequentially output the second parallel data signals latched in the storing block, wherein the first strobe signal is used to generate a data signal that is outputted first among the second parallel data signals.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: October 15, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kang-Youl Lee
  • Method for manufacturing semiconductor device with vertical gate transistor
    Patent number: 8557663
    Abstract: A method for manufacturing a semiconductor device includes forming a plurality of pillars by etching a semiconductor substrate, forming a gate dielectric layer on sidewalls of the pillars and on surfaces of the semiconductor substrate between the pillars, forming an implant damage in a portion of the gate dielectric layer between two pillars by implanting ions into the portion of the gate dielectric layer, forming vertical gates to cover the sidewalls of the pillars, and removing the implant damage.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: October 15, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Heung-Jae Cho
  • Semiconductor device and method of manufacturing the same
    Patent number: 8558306
    Abstract: A technology is a semiconductor device and a method of manufacturing the same, capable of reducing capacitance with a storage node contact plug while maintaining a height and resistance of a bit line, by thickly forming a spacer between a bit line and the storage node contact plug. A semiconductor device includes a device isolation layer defining a plurality of active regions formed in a semiconductor substrate, a storage node contact hole exposing two neighboring active regions, a storage node contact plug material provided in the storage node contact hole, a bit line region that divides the storage node contact plug material into two parts and that has a convex portion at a lower portion of a sidewall, a spacer formed over a sidewall of the bit line region including the convex portion and a bit line formed in the bit line region.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: October 15, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Suk Min Kim
  • Non-volatile memory device and sensing method thereof
    Patent number: 8559256
    Abstract: A non-volatile memory device and a sensing method thereof are disclosed, which can sense multi-level data using resistance variation. The non-volatile memory device includes a cell array and a sensing unit. The cell array includes a plurality of unit cells where data is read out or written. The sensing unit compares a sensing voltage corresponding to data stored in the unit cell with a reference voltage, amplifies/outputs the compared result, measures a difference in discharge time where the sensing voltage is discharged in response to a resistance value of the unit cell during an activation period of a sensing enable signal after a bit line is precharged, and senses the data in response to the measured result.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: October 15, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Dong Keun Kim
  • Semiconductor memory device
    Patent number: 8559233
    Abstract: A semiconductor memory device includes even page buffers coupled to even memory cells through respective even bit lines, odd page buffers coupled to odd memory cells through respective odd bit lines, first BL selectors, each configured to couple each of the even bit lines to the respective even page buffers and to couple each of the even page buffers to respective odd bit lines so that the even and odd page buffers precharge the odd bit lines in a precharge operation for the odd bit lines, and second BL selectors, each configured to couple each of the odd bit lines to the respective odd page buffers and to couple each of the odd page buffers to respective even bit lines so that the even and odd page buffers precharge the even bit lines in a precharge operation for the even bit lines.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: October 15, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hwang Huh
  • Nonvolatile memory device
    Patent number: 8559227
    Abstract: A nonvolatile memory device includes a plurality of global word lines, a plurality of transistors configured to transfer voltages of the global word lines to a plurality of local word lines inside a cell block, and a voltage control unit configured to supply a first negative voltage to a global word line of the plurality of global word lines and configured to charge a bulk region of the plurality of transistors with a second negative voltage.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: October 15, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Lee-Hyun Kwon, In-Sou Wang, Myung-Jin Park
  • Semiconductor device and method for forming the same
    Patent number: 8557660
    Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a pad insulating layer on a semiconductor substrate, forming a recess by etching the pad insulating layer and the semiconductor substrate, forming a buried gate buried in the recess, forming an insulating layer for defining a bit line contact hole over the buried gate and the pad insulating layer, forming a bit line over a bit line contact for filling the bit line contact hole, and forming a storage electrode contact hole by etching the insulating layer and the pad insulating layer to expose the semiconductor substrate. As a result, the method increases the size of an overlap area between a storage electrode contact and an active region without an additional mask process, resulting in a reduction in cell resistance.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: October 15, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sung Hyun Kim
  • Semiconductor device and method for manufacturing the same
    Patent number: 8551861
    Abstract: A semiconductor device and a method for manufacturing the same are disclosed. A method for manufacturing a semiconductor device includes forming a trench for defining an active region over a semiconductor substrate, forming a doped region by implanting impurities into the trench, forming an oxide film in the trench by performing an oxidation process, forming a nitride film at inner sidewalls of the trench, and forming a device isolation film in the trench.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: October 8, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Ki Bong Nam
  • Data interface circuit, nonvolatile memory device including the same and operating method thereof
    Patent number: 8553477
    Abstract: A data interface unit is used in a semiconductor memory device and includes a data alignment unit configured to separate consecutive input data into rising data and falling data, and a data transfer unit configured to selectively transfer the rising data and falling data to an even column line and an odd column line in response to a start column address.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: October 8, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Byoung-Sung Yoo
  • Fuse part of semiconductor device and method of fabricating the same
    Patent number: 8552427
    Abstract: A fuse part of a semiconductor device includes an insulation layer over a substrate, and a fuse over the insulation layer, wherein the fuse includes a plurality of blowing pads for irradiating a laser beam and the plurality of blowing pads have laser coordinates different from one another.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: October 8, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sang-Yun Nam
  • Semiconductor memory device
    Patent number: 8553479
    Abstract: A semiconductor memory device includes a main word line signal generator configured to generate a main word line signal having a first swing width, a sub-word line signal generator configured to generate a first sub-word line signal and a second sub-word line signal having a second swing width and a third swing width, respectively, a first sub-word line driver configured to drive a corresponding sub-word line with the first sub-word line signal or a negative word line voltage in response to the main word line signal, and a second sub-word line driver configured to drive the corresponding sub-word line with the negative word line voltage in response to the second sub-word line signal.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: October 8, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Dong-Geun Lee, Chang-Ho Do
  • Method for fabricating semiconductor device with buried word line
    Patent number: 8546218
    Abstract: A method for fabricating a semiconductor device includes etching a substrate to form a plurality of bodies isolated by a first trench, forming a buried bit line gap-filling a portion of the first trench, etching the top portions of the bodies to form a plurality of pillars isolated by a plurality of second trenches extending across the first trench, forming a passivation layer gap-filling a portion of the second trenches, forming an isolation layer that divides each of the second trenches into isolation trenches over the passivation layer, and filling a portion of the isolation trenches to form a buried word line extending in a direction crossing over the buried bit line.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: October 1, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Uk Kim, Kyung-Bo Ko
  • Semiconductor memory device and method of operating the same
    Patent number: 8547758
    Abstract: A semiconductor memory device includes a page buffer configured to store data received from selected memory cells in response to a read command, a first register configured to store first data received from the page buffer in response to a first control signal, a second register configured to store second data received from the page buffer in response to a second control signal, a data I/O circuit configured to, while the first or second data is outputted from the first register or the second register, respectively, input third data received from the page buffer to the other one of the first and second registers, and a control logic configured to sequentially supply the first control signal and the second control signal in outputting the first and second data.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: October 1, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Bo Kyeom Kim
  • Temperature sensing circuit and semiconductor memory device using the same
    Patent number: 8545095
    Abstract: A temperature sensing circuit comprises a temperature sensing unit for generating a reference voltage having a constant level, regardless of a temperature fluctuation, and a variable voltage to be changed according to the temperature fluctuation, and a comparison unit for comparing the reference voltage to the variable voltage, detecting an ambient temperature and generating a temperature detecting signal.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: October 1, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Gyo Soo Chu
  • Nonvolatile memory device having dielectric layer formed on control gate sidewall along lateral direction
    Patent number: 8546788
    Abstract: Patterns of a nonvolatile memory device include a semiconductor substrate including active regions extending in a longitudinal direction, an isolation structure formed between the active regions, a tunnel insulating layer formed on the active regions, a charge trap layer formed on the tunnel insulating layer, a first dielectric layer formed on the charge trap layer and the isolation structure, wherein the first dielectric layer is extended along a lateral direction, a control gate layer formed on the first dielectric layer, wherein the control gate layer is extended along the lateral direction, and a second dielectric layer formed on a sidewall of the control gate layer along the lateral direction and coupled to the first dielectric layer.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: October 1, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Yun Kyoung Lee
  • Semiconductor memory device and method for performing data compression test of the same
    Patent number: 8547764
    Abstract: A semiconductor memory device includes a plurality of data transmission lines, a plurality of parallel-to-serial conversion sections configured to receive, serially align, and output data from at least two of the plurality of data transmission lines, a plurality of data compression circuits configured to receive, compress, and output outputs of at least two of the plurality of parallel-to-serial conversion sections, and a plurality of data output circuits configured to output respective compression results of the plurality of data compression circuits to an outside of a chip.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: October 1, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae-Woong Yun, Jong-Chern Lee, Hee-Jin Byun
  • Methods of manufacturing phase-change memory device and semiconductor device
    Patent number: 8546177
    Abstract: Methods of manufacturing a phase-change memory device and a semiconductor device are provided. The method of manufacturing the phase-change memory device includes forming a switching device layer, an ohmic contact layer, and a hard mask layer on a semiconductor substrate, patterning the hard mask layer to form a hard mask pattern, etching the ohmic layer and the switching layer using the hard mask pattern to form a pattern structure including an ohmic contact pattern, a switching device pattern, and the hard mask pattern, selectively oxidizing a surface of the pattern structure, forming an insulating layer to bury the pattern structure, and selectively removing the hard mask pattern other than the oxidized surface thereof to form a contact hole.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: October 1, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hye Jin Seo, Keum Bum Lee
  • Semiconductor device and method for manufacturing the same
    Patent number: 8546858
    Abstract: The present invention relates to a semiconductor device and a method for manufacturing the same. According to the present invention, a method of manufacturing a semiconductor device includes: forming a recess on a semiconductor substrate; forming a first gate electrode material and a hard mask layer on an entire surface including the recess; etching the hard mask layer and the first gate electrode material to form the first gate electrode pattern on a lower portion of inside of the recess; forming a second gate electrode material on an entire surface including the recess; and etching the second gate electrode material and separating the second gate electrode material.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: October 1, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kyoung Chul Jang