Abstract: A semiconductor memory device for performing highspeed address access and highspeed data access is provided by controlling a control/address block in synchronization with a delay locked loop (DLL) clock. The semiconductor memory device includes a clock buffer for buffering an external clock; a delay locked loop (DLL) for generating a DLL clock in synchronization with the external clock; a control signal buffer for receiving and buffering an external control signal to generate an internal control signal in synchronization with the DLL clock; and an address buffer for receiving and buffering an external address signal to generate an internal address signal in synchronization with the DLL clock.

Abstract: A PLL (phase locked loop) using a lock detecting circuit includes a phase frequency detector detecting the phase of an input signal and outputting an up signal and a down signal, a lock detecting circuit detecting whether the PLL is locked using the up and down signals, a charge pump pumping the up signal and the down signal, first and second voltage dividers respectively receiving the output signal of the charge pump, first and second switches controlling the output signals of the first and second voltage dividers using the output signal of the lock detecting circuit and selectively outputting the result values, a capacitor connected between an output terminal connected in common to the first and second transmission gates and ground voltage, and a voltage controlled oscillator feeding back the output signals of the first and second switches to the phase frequency detector.

Abstract: A sense amplifier drive circuit has a sense amplifier amplifying data carried on a bit line and a bit line bar, a sense amplifier drive unit selectively applying an overdrive voltage or an internal power supply voltage to the sense amplifier, and a control signal generator combining a sense amplifier enable bar signal and a refresh enable signal, and generating control signals to control the sense amplifier drive unit. With the construction, an overdrive voltage is not supplied to the bit line and bit line bar during a refresh operation, and current consumption inevitably occurring during the refresh operation is much reduced.

Abstract: A semiconductor device for use in a memory cell including an active matrix provided with a silicon substrate, at least one transistor formed on the silicon substrate, a number of bottom electrodes formed over the transistors, a plurality of conductive plugs to electrically connect the bottom electrodes to the transistors, respectively, and an insulating layer formed around the conductive plugs. In the device, by carrying out a carbon treatment to top surface portions of the bottom electrode structure, it is possible to secure enough space to prevent the formation of bridges between the bottom electrodes.

Abstract: A semiconductor memory device includes a trench type SRAM(Static Random Access Memory) cell having a higher integration than a stack type SRAM. The SRAM cell memory device is provided with a trench formed in a semiconductor substrate and having four side walls therein, wherein a source region and a drain region of each of first and second drive transistors are formed in two of the four side walls. A pair of active layers respectively having a source region and a drain region of a first load transistor and a second load transistor, respectively, are formed on the substrate adjacent to the side walls. A gate electrode common to the first drive transistor and the first load transistor is formed on a gate oxide film. A gate electrode of an access transistor is vertically formed in a direction vertical to the semiconductor substrate instead of being formed on the substrate for thereby decreasing an area to be occupied by the transistor.

Abstract: A method for preparing a slurry for a chemical mechanical polishing process for a semiconductor device includes putting an organic matter in a solvent, preparing a solution by adding a dispersant to the solvent having the organic matter, hydrolyzing the solution, stirring the solution, and heating the solution. A slurry embodying the present invention has relatively small hydrate particles having a hardness lower than oxide particles, and the particles will remain dispersed in a solution for a longer period of time than background art slurries.

Abstract: A ferroelectric memory device, e.g., nonvolatile, has an effective layout by eliminating a separate cell plate line. The ferroelectric memory device includes first and second split word lines formed over first and second active regions of a semiconductor substrate, and the first and second active regions are isolated from each other. Source and drain regions are formed in the first active region on both sides of the first split word line and the second active region on both sides of the second split word line. A conductive barrier layer, a first capacitor electrode and a ferroelectric layer are sequentially formed on the first and second split word lines. Two second capacitor electrodes with one connected to one of the source and drain regions of the second active region is formed over the first split word line. The other one is connected to one of the source and drain regions of the first active region and is formed over the second split word line.

Abstract: A capacitor and a method of manufacturing the same are disclosed. The BST dielectric film is disposed between the lower electrode by coating a sidewall of the upper electrode and then forming the lower electrode in a second contact hole defined by the upper electrode and BST film. As such, degradation in the step coverage characteristic caused by forming a BST dielectric film having a desired composition ratio is avoided.

Abstract: A bi-directional high-voltage RESURF EDMOS (REduced SURface Extended Drain MOS) transistor which can endure a high voltage at its source by providing drift regions at both sides, i.e., the source and drain of the conventional RESURF LDMOS (Lateral DMOS) transistor, and exchanging the drain and the source when an analog signal of high voltage is inputted. Further, the bi-directional high-voltage RESURF EDMOS transistor provides a high-voltage analog multiplexer circuit employing a RESURF EDMOS transistor which is capable of reducing the number of necessary high-voltage elements and performing a stable operation, by constructing a high-voltage analog multiplexer having at least three inputs and a multistage high-voltage multiplexer circuit of push-pull type, pass transistor type, and combined form of push-pull type and pass transistor type by using the bi-directional high-voltage, RESURF EDMOS transistor.

Abstract: The present invention provides a method for forming a storage electrode on a semiconductor substrate, and in particular to a storage electrode formation method which can prevent formation of a sharp upper edged cylindrical storage electrode, thereby improving a dielectric property and reliability of a capacitor.

Abstract: The present invention relates to a semiconductor device, and more particularly, to a test pattern for evaluating a process of silicide film formation. The test pattern in accordance with the present invention includes: a silicon substrate having an active region and a field region; a first pattern composed of a cross resistor pattern of a polycide layer formed on the field region; and a second pattern composed of polycide layer and a silicide layer formed on the active region. The second pattern includes: a pair of polycide patterns composed of a first polycide strip and a second polycide strip extended in parallel, being spaced from each other a predetermined interval on an insulating film formed on the active region; and an active silicide strip formed between the first polycide strip and the second polycide strip.

Abstract: An apparatus and method for reducing a pattern jitter is provided that uses a local symmetry forcing wave signal. Pattern jitter is generated when a timing phase of a symbol signal is recovered. The apparatus can include a demultiplexer receiving a preamble and data signal. A nonlinear operation unit preferably only receives the preamble signal from the demultiplexer, and a locally symmetric wave generator preferably only receives the data signal from the demultiplexer. A buffer memory selects from an output signal of the nonlinear operation unit and an output signal of the locally symmetric wave generator. An input signal controller receives a control signal and outputs an input control signal to control the buffer memory and the demultiplexer. The apparatus and method that reduces pattern jitter is a system with reduced complexity and reduced cost to advantageously embody a very large scale integration VLSI or the like.

Abstract: There is a vinyl 4-hydroxybenzal-vinylalcohol-vinyl acetate copolymer, a 4-t-butoxycarbonyloxybenzal-vinyl alcohol-vinyl acetate copolymer and a vinyl 4-t-butoxycarbonyloxybenzal-vinyl 4-hydroxybenzal-vinyl alcohol-vinyl acetate copolymer suitable for photoresist and methods for preparing the same. The latter two polymers contain 4-hydroxybenzal groups all or parts of which are protected with t-butoxycarbonyl group. Superior in transparency, thermal stability, mechanical strength, and adhesiveness to silicon wafer, the photoresists prepared from the protected copolymers can enhance the resolution of fine circuit by virtue of low weight loss upon the thermal treatment after exposure.

Abstract: An active pixel sensor (APS) with an electronic shutter is provided that performs an auto exposure function so that all pixels have substantially equal photosensitive time by controlling a photo-electric charge that is generated in accordance with light transmitted to a photo-diode. The APS includes a switching unit that throughputs the photo-electric charge for a prescribed time based on an externally inputted shutter control signal, and an electric charge storing unit that stores the photo-electric-charge from the switching unit for the prescribed time. The electric charge storing unit outputs the stored photo-electric charge to an electric charge amplifying and outputting unit based on an externally inputted electric charge resetting signal. The APS provides uniform screen brightness for a display apparatus by allowing all pixels to use a substantially identical photosensitive (e.g., exposure) time.

Abstract: Disclosed is a method and apparatus for searching a human three-dimensional (3D) posture which can rapidly and accurately search a human 3D posture by effectively representing the human 3D posture with a small amount of data. According to the method, a posture database is established by extracting posture descriptors using relation among respective joints of a body, and a feature of a query 3D posture is simultaneously extracted in the same manner. Then, the similarity is calculated by comparing the posture descriptor of the query 3D posture with the posture descriptors of postures in the posture database, and then outputted to search the human 3D posture.

Abstract: The present invention relates to a semiconductor technology and more specifically to a method of fabricating a gate electrode of a semiconductor device, where a re-oxidation process that may cause an abnormal oxidation can be eliminated. In a polysilicon/silicide structure or polysilicon/metal structure of gate electrode, a step of etching side parts of gate electrode is performed without any etch mask after gate patterning. Here, the etch can be made by wet or dry etch using an etchant having high selectivity of polysilicon film to a gate oxide film, so that the damaged gate oxide part during the gate patterning is allowed not to make a role of the gate insulating film itself, thereby eliminating the re-oxidation process.

Abstract: A radio frequency transmission control apparatus for preventing an oscillation in a wideband wireless local loop terminal has a radio frequency transmitting unit for modulating a baseband transmitting signal to a WLL radio frequency band signal and transmitting the modulated signal via an antenna, and the radio frequency transmitting unit is divided into a radio frequency converting unit and a power amplifier unit in accordance with characteristics of each active element constituting the radio frequency transmitting unit. When a power is supplied to the radio frequency transmitting unit, the power is first supplied to the radio frequency converting unit so as to maintain the same at an operating state. After a predetermined time period has elapsed, the power is supplied to the power amplifier unit.

Abstract: A method of forming wires for semiconductor devices can restrict increase of a wires resistance and a contact resistance of the semiconductor device by forming a plug without generating a void or keyhole, and includes a step of forming an insulation film on lower wires, a step of forming a contact hole on the lower wires by selectively etching the insulation film, a step of performing a precleaning process by using an argon sputtering method until the lower wires at the lower portion of the contact hole are etched at a predetermined depth, a step of forming a plug by depositing a tungsten in the contact hole, and a step of forming upper wires on the plug and the second insulation film. A re-deposition layer consisting of a material of the lower wires is formed at the inner walls of the contact hole in the precleaning process, and thus a whole process is simplified by omitting a step of forming a glue layer or adhesion layer.

Abstract: A method of fabricating a semiconductor capacitor is disclosed. An impurity layer is formed on a semiconductor substrate. An interlayer insulating film is disposed on an upper surface of the impurity layer and the semiconductor substrate. A contact hole is selectively etched through the interlayer insulating film to the impurity layer. A conductive plug is formed in the contact hole. A metal film pattern having an irregular surface area is disposed on the conductive plug. A dielectric substance film is located directly on the irregular surface of the metal film pattern. A metal electrode is formed on the dielectric substance film.

Abstract: A pixel structure with an electronic shutter function using an active pixel sensor (APS) capable of overcoming a disadvantage of conventional pixel structures using the active pixel sensor that reset the pixels not in pixel units but in line units, and thus an electronic shutter cannot be provided, includes a plurality of pixels arrayed in a lattice pattern, a row selection decoder outputting a row selection signal to each pixel, a first line counter counting a number of lines of the pixels selected by the row selection decoder, a line reset selection decoder outputting a line reset signal to each pixel, a second line counter counting a number of lines of the pixel selected by the line reset selection decoder, a column reset selection decoder outputting a column reset signal to each pixel, a first pixel counter counting a number of the pixels selected by the column reset selection decoder, a pixel reading unit reading the pixels in pixel units, and a second pixel counter counting a number of the pixels which