Abstract: The present invention relates to a semiconductor device using a copolymer-containing photoresist, and a process for manufacturing the same. As a norbornene derivative (monomer) having a hydrophilic group is synthesized and introduced to the backbone chain of a polymer, the polymer according to the present invention has excellent etching resistance and heat resistance, which are the characteristic points of alicyclic olefin structure, and provide excellent resolution due to prominent enhancement of adhesiveness resulted from introducing a hydrophilic group (—OH).

Abstract: The present invention relates to a picture display using CMOS (Complementary Metal Oxide Semiconductor) image sensor; and, more particularly, to a CMOS image sensor having a testing circuit embedded therein and a method for verifying operation of the CMOS image sensor using the testing circuit. The CMOS image sensor according to the present invention includes a control/interface unit for controlling its operation sensor using a state machine and for interfacing the CMOS image sensor with an external system; a pixel array including a plurality of pixels sensing images from an object and generating analogue signals according to an amount of incident light; a converter for converting the analogue signals into digital signals to be processed in a digital logic circuit; and a testing circuit for verifying operations of the converter and the control/interface unit, by controlling the converter.

Abstract: A method for fabricating a color image sensor for scanning and converting an optical image into electrical signals, includes the steps of: (a) forming a P-type semiconductor layer on a substrate; (b) forming field oxide layers on the P-type semiconductor layer to define regions for red, green and blue photodiodes; (c) providing an ion implantation mask having different mask patterns for the red, the green and the blue photodiodes; (d) implanting impurity ions into the P-type semiconductor layer through the use of said ion implantation mask to form N-type diffusion regions in the P-type semiconductor layer; and (e) applying a thermal process to the resulting structure to form different first, second and third depletion regions corresponding to the red, the green and the blue photodiodes.

Abstract: The present invention relates to photoresist monomers, polymers formed therefrom and photoresist compositions suitable for photolithography processes employing a DUV light source, such as KrF (249 nm) and ArF(193 nm); EUV; VUV; E-beam; ion-beam; and X-ray.

Abstract: A multi-level EEPROM cell and a method of manufacture thereof are provided so as to improve a program characteristic of the multi-level cell. For the purpose, the multi-level flash EEPROM cell includes a floating gate formed as being electrically separated from a silicon substrate by an underlying tunnel oxide layer, a first dielectric layer formed over the top of the floating gate, a first control gate formed on the floating gate as being electrically separated from the floating gate by the first dielectric layer, a second dielectric layer formed on the sidewall and top of the first control gate, a second control gate formed on the sidewall and top of the first control gate as being electrically separated from the first control gate by the second dielectric layer, and a source and drain formed in the substrate as being self-aligned with both edges of the second control gate.

Abstract: ESD protection circuit which can effectively protect a product with three or two leveled electrodes in any cases when an external (+) or (−) ESD charge flows into the product, including, in case of the ESD protection circuit for a product with three leveled electrodes(VP, VDD and GND), a first conduction type bipolar transistor and a second conduction type bipolar transistor connected in parallel between an input terminal and a GND, wherein the first conduction type bipolar transistor has a base terminal with a VP voltage applied thereto and the second conduction type bipolar transistor having a base terminal with a VDD voltage applied thereto, and collectors and emitters thereof connected to the input terminal or the GND.

Abstract: A method for forming a multilayer metal thin film capable of improving electromigration reliability. The method includes steps of forming a Ti film having an <002> crystal orientation by using an ionized physical vapor deposition method, forming a TiN film on the Ti film in order to form a multilayer stack, wherein the TiN film has an <111> crystal orientation, and forming an aluminum film on the multilayer stack in an <111> crystal orientation. Accordingly, the aluminum metal interconnection increases the <002> orientation of the Ti film and improves the <111> orientation of the aluminum to control electromigration resistance, by using the IPVD method in forming the Ti film as an underlayer of the aluminum film.

Abstract: A method of manufacturing an insulating film in a semiconductor device is disclosed. The method comprises the steps of forming a SOD film on the entire structure to fill any distance between conductive layer patterns and after performing a curing process, forming a hard mask film on the SOD film, wherein the silicon oxide film is deposited by plasma deposition method using SiH4 and N2O as a reaction gas at a low-temperature and at a low-pressure and wherein in a stabilization step, the supply amount of SiH4 is greater than that of N2O and in a deposition step, the supply amount of N2O is greater than that of SiH4.

Abstract: The present invention provides photoresist compositions for a Top-surface Imaging Process by Silylation (TIPS) and processes for using the same. The photoresist composition comprising a photoresist resin, a photoacid generator, an organic compound, and an amphoteric compound. The amphoteric compound prevents or reduces the amount of acid diffusion into the unexposed area and improves the contrast between the exposed and the unexposed areas. This reduction or prevention of acid diffusion into the unexposed areas reduces line edge roughness (LER).

Abstract: A DC stress supply circuit for a semiconductor circuit having a plurality of DC stress supply terminals and a plurality of switches in which the DC stress terminals are connected to some nodes of the unit elements included in the semiconductor circuit, respectively. The switches allow a DC stress to be applied selectively, to the nodes from the DC stress terminals according to a control signal.

Abstract: The present invention relates to photoresist compositions for resist flow process and processes for forming a contact hole pattern using the same. In particular, the present invention relates to photoresist composition comprising a thermal curing agent which cures photoresist composition at an elevated temperature. In one embodiment, the thermal curing agent comprises a thermal acid generator and a curing compound. Preferably, the curing compound comprises a cross-linking moiety which is capable of curing the photoresist composition when reacted with the acid that is generated by the thermal acid generator. Photoresist compositions of the present invention reduces or eliminate overflow of photoresist during a resist flow process, thereby preventing a contact hole pattern from being destroyed. In addition, photoresist compositions of the present invention allow formation of uniform sized patterns and increase in etching selection rate.

Abstract: A stacked semiconductor package is formed by forming a semiconductor wafer having a plurality of semiconductor chips with chip pads on their upper sides, where the chips are arranged in pairs; sawing the wafer along edges of the semiconductor chips; adhering a bonding tape to adjacent pairs of the semiconductor chips, wherein conductive interconnections on the bonding tape electrically couple corresponding chip pads of adjacent chips; cutting the bonding tape so that only adjacent pairs of the chips remain attached to one another; and stacking the adjacent pairs of semiconductor chips so that the upper sides of the chips are substantially parallel. The method may include an additional step of adhering a plurality of solder balls on the bonding tape to serve as external leads of the package. Further, the adjacent pairs of semiconductor chips may be attached to opposite sides of a heat conducting plate which serves to dissipate heat generated by the chips.

Abstract: A semiconductor device for use in a memory cell includes an active matrix provided with a silicon substrate, a transistor formed on the silicon substrate, a capacitor structure formed over the transistor, a metal interconnection for electrically connecting the capacitor structure to the transistor, a barrier layer formed on top of the metal interconnection and an inter-metal dielectric (IMD) layer formed on top of the barrier layer, wherein the barrier layer is made of a material such as A12O3 or the like. The IMD layer is formed by using a plasma chemical vapor deposition (CVD) in a hydrogen rich atmosphere, wherein the barrier layer is used for preventing the capacitor structure from the hydrogen.

Abstract: A backward closed loop power control apparatus for a mobile communication system is disclosed.

Abstract: There is provided a method for fabricating a CMOS image sensor having enhanced reliability and light sensitivity, which comprises the steps of providing a substrate including photosensitive elements and metal wire; forming a first protecting film for protecting the elements over the substrate, covering the metal wire; forming a flattened spin-on-glass film on the first protecting film; forming a second protecting film for protecting the elements on the spin-on-glass film; forming color filter patterns on the second protecting film; forming a photoresist film for flattening on the color filter patterns and the second protecting film; and forming microlenses on the photoresist film. By using the flattened SOG film and a photoresist for flattening and pad opening, the present invention can accomplish the thickness uniformity of the color filter corresponding to each unit pixel, the wire-bonding pad devoid of the residuals of the color filter materials and the figure uniformity of the microlenses.

Abstract: Nonvolatile ferroelectric memory and method for fabricating the same can reduce fatigue caused by repetitive switching, drop an operation voltage, and increase an operation speed of the nonvolatile ferroelectric memory. The nonvolatile ferroelectric memory includes a plurality of wordlines formed in one direction, and a plurality of a control line and a sensing line pairs formed in a direction crossing the wordlines at fixed intervals. Unit cells of the memory formed at intersections of the wordlines and the control and signal line pairs each have first transistors formed between the control line and the sensing line with a drain coupled to a prescribed voltage. Second transistors in the unit cells have a drain coupled to the sensing line, a source coupled to a source of the first transistor, and a gate coupled to the wordline, and third transistors in the unit cells have a drain coupled to the control line, a source coupled to a gate of the first transistor, and a gate coupled to the wordline.

Abstract: A semiconductor device for use in a memory cell including an active matrix provided with a transistor and a first insulating layer formed around the transistor; a capacitor structure, formed on top of the first insulating layer and composed of a bottom electrode, a capacitor thin film placed on top of the bottom electrode and a top electrode formed on top of the capacitor thin film; a second insulating layer formed on top of the transistor and the capacitor structure; a metal interconnection formed on top of the second insulating layer and the active matrix to electrically connect the transistor to the capacitor structure; and a hydrogen barrier layer formed on top of the metal interconnection, wherein the hydrogen barrier layer is made of an aluminum oxide (AlxOy) layer.

Abstract: A charge coupled device includes a plurality of photoelectric conversion regions; a plurality of vertical charge coupled devices (VCCDs) provided between the photoelectric conversion regions for transmission of charges generated at the photoelectric conversion regions in a first direction; and a horizontal charge coupled device (HCCD) coupled to the VCCDs and having a channel region including a plurality of channels for transmission of the charges previously transmitted through the VCCDs in a second direction. The channel region is formed such that one of the plurality of channels has a higher potential than the remaining channels. The remaining channels have potentials that gradually become lower than the highest potential moving in a direction away from the channel with the highest potential. The channel region transmits the charges within the HCCD so that the charges are gathered together centered around the channel having the highest potential during transmission of the charges.

Abstract: A method for controlling an automatic guide vehicle (AGV) in a semiconductor factory automation (FA) system, includes the steps of: a) receiving operating mode information of a process equipment changed by an operator; b) storing the operating mode information of the process equipment changed in a real-time database; c) carrying out a predetermined semiconductor process at an operating mode having a full automation mode and sending a process completion signal after the predetermined semiconductor process has been completed, wherein the predetermined semiconductor process is applied to a lot of semiconductor wafers; d) creating a queue in response to the process completion signal; e) checking the operating mode information of the process equipment stored in the real-time database in response to the queue; f) inactivating the AGV by interrupting a transmission of the queue to the AGV if the operating mode information of the process equipment stored in the real-time database is not the full automation mode; and

Abstract: A base transceiver station of a digital mobile telecommunication system comprising a master base transceiver station device (master BTS device) and a plurality of remote radio frequency units separated from the master BTS device and installed at a remote site therefrom for processing radio frequency signals. The master BTS device and the radio frequency units are interconnected via a remote interfacing unit. Therefore, the base transceiver station can become so much smaller in size and lighter in weight that it can be readily installed in a place effecting the optimum propagation. Furthermore, the remote interfacing unit can remotely control and monitor the status of the remote radio frequency units via a radio frequency cable without using a separate control cable.