Abstract: A memory controller includes an address queue with address queue locations that may expand to store address commands that point to consecutive locations in memory. In this manner, multiple address commands may combine together in a common expanded address queue location. In one embodiment, each address queue location includes a main information portion and a supplemental information portion. The supplemental information portion is smaller than the main information portion. The main information portion stores the target address information of a first address command. When the address queue receives an address command with a target address that is consecutive to the target address of the first command, then the supplemental address portion stores a subset of the target address of the second command.
Type:
Application
Filed:
October 13, 2006
Publication date:
April 17, 2008
Applicant:
IBM Corporation
Inventors:
Mark Andrew Brittain, Warren Edward Maule, Eric Eugene Retter
Abstract: Novel methods and systems for the privacy preserving mining of string data with the use of simple template based models. Such template based models are effective in practice, and preserve important statistical characteristics of the strings such as intra-record distances. Discussed herein is the condensation model for anonymization of string data. Summary statistics are created for groups of strings, and use these statistics are used to generate pseudo-strings. It will be seen that the aggregate behavior of a new set of strings maintains key characteristics such as composition, the order of the intra-string distances, and the accuracy of data mining algorithms such as classification. The preservation of intra-string distances is a key goal in many string and biological applications which are deeply dependent upon the computation of such distances, while it can be shown that the accuracy of applications such as classification are not affected by the anonymization process.
Abstract: A system and method are provided for enabling a user to search for documents that the user has previously viewed on its local machine. The system includes three main components: the desktop integration module, the index module, and the graphical user interface module. The desktop integration module is an application which monitors documents with which the user interacts for predetermined events, and obtains content data and metadata from the monitored documents. The index module indexes the content data and metadata received from the desktop integration module. The graphical user interface module then permits a user to utilize the desktop integration module and index module by allowing a user to search for a document.
Type:
Application
Filed:
December 5, 2007
Publication date:
April 3, 2008
Applicant:
IBM CORPORATION
Inventors:
Tolga ORAL, David Newbold, Martin Wattenberg, Michael Bolin
Abstract: A simplification of the process of deploying public services for mobile users Particular refinements in this vein involve the dynamic configuration of client software using available context information and the optimization of software provisioning based on historical usage information, which includes services accessed together with the location and time of access.
Type:
Application
Filed:
August 21, 2006
Publication date:
February 21, 2008
Applicant:
IBM Corporation
Inventors:
Chandrasekhar Narayanaswami, Mandayam T. Raghunath, Marcel C. Rosu
Abstract: In the realm of managing relational databases, a system that uses both the data in a relational database and domain knowledge in ontologies to return semantically relevant results to a user's query. Broadly contemplated herein, in essence, is a system that bridges a semantic gap between queries users want to express and queries that can be answered by the database using domain knowledge contained in ontologies. In accordance with a preferred embodiment of the present invention, such a system extends relational databases with the ability to answer semantic queries that are represented in SPARQL, an emerging Semantic Web query language. Particularly, users may express their queries in SPARQL, based on a semantic model of the data, and they get back semantically relevant results. Also broadly contemplated herein is the definition of different categories of results that are semantically relevant to a user's query and an effective retrieval of such results.
Abstract: In the context of screens, windows and like media, arrangements for automatically detecting when a recipient has entered or left a public setting so that privacy configuration changes can be automatically invoked. Also broadly contemplated herein is an arrangement for selectively displaying messages on the recipient's screen but deferring the messages from being visible on a remote hardware device or software display which is publicly visible. Furthermore, there is broadly contemplated herein a secure arrangement for revealing and responding to deferred messages. More generally, there is broadly contemplated herein a new approach to the provision of application notifications and to alarm control during a desktop screen sharing mode, based on the automatic detection of a screen sharing state and on notifying registered applications of the screen sharing in a unified, consistent manner.
Type:
Application
Filed:
August 3, 2006
Publication date:
February 7, 2008
Applicant:
IBM Corporation
Inventors:
Genady Grabarnik, Nagui Balim, Neal M. Keller, Lev Kozakov, Larisa Shwartz, Clifford A. Pickover, Robert W. Wisniewski
Abstract: An information handling system (IHS) employs a compiler methodology that seeks to improve the efficiency of code that executes in a multi-core processor. The compiler receives source code and converts the source code for execution using data parallel select operations that perform well in a single instruction multiple data (SIMD) environment. The compiler of the IHS may apply one or several optimization processes to the code to increase execution efficiency in a parallel processing environment.
Abstract: An information handling system (IHS) employs a compiler methodology that seeks to improve the efficiency of code that executes in a multi-core processor. The compiler receives source code and converts the source code for execution using data parallel select operations that perform well in a single instruction multiple data (SIMD) environment. The compiler of the IHS may apply one or several optimization processes to the code to increase execution efficiency in a parallel processing environment.
Abstract: A test system is disclosed wherein a device under test (DUT) includes a trace logic analyzer (TLA) that receives and stores test data. The test system includes both a master tester and a slave tester. The slave tester operates at a high speed data rate substantially faster than that of the master tester. The master tester instructs the TLA to monitor data that the DUT receives from the slave tester to detect a predetermined data pattern within the data. The slave tester transmits data including the predetermined data pattern to the DUT. The DUT receives the data. When the TLA in the DUT detects the predetermined data pattern in the received data, the TLA stores that data pattern as a stored data pattern. The master tester retrieves the stored data pattern and compares the stored data pattern with the original predetermined data pattern. If the master tester determines that the stored data pattern is the same as the original predetermined data pattern, then the master tester generates a pass result.
Type:
Application
Filed:
July 27, 2006
Publication date:
January 31, 2008
Applicant:
IBM Corporation
Inventors:
KERRY CHRISTOPHER IMMING, RESHAM RAJENDRA KULKARNI, TO DIEU LIANG, SARAH SABRA PETTENGILL
Abstract: To prevent current inrush from exceeding power limitations of a power supply or a power domain in a multiple disk drive system the drives are powered-on in a controlled sequence. In a multi-drive blade storage subsystem, a subsystem control module inventories the locations of the hard drives in one or more drive enclosure blades and maintains information about the boundaries of one or more power domains. The subsystem control module may direct one of several drive power-on sequences, none of which allow current inrush to exceed the allowable current of each power domain.
Type:
Application
Filed:
July 30, 2006
Publication date:
January 31, 2008
Applicant:
IBM CORPORATION
Inventors:
GREGG S. LUCAS, ROBERT A. KUBO, TOHRU SUMIYOSHI, Yoshihiko TERASHITA, Yutaka KAWAI
Abstract: A method and apparatus for detecting the endpoint in a dry plasma etching system comprising a first electrode (e.g., upper electrode) and a second electrode (e.g., lower electrode) upon which a substrate rests is described. A direct current (DC) voltage is applied between the first electrode and a ring electrode surrounding the second electrode, and the DC current is monitored to determine the endpoint of the etching process. The DC current is affected by the impedance of the plasma, and therefore responds to many variations including, for example, the plasma density, electron/ion flux to exposed surfaces, the electron temperature, etc.
Type:
Application
Filed:
July 31, 2006
Publication date:
January 31, 2008
Applicants:
IBM Corporation, TOKYO ELECTRON LIMITED
Inventors:
Siddhartha Panda, Richard Wise, Lee Chen, Michael Sievers
Abstract: The disclosed methodology and apparatus may control heat generation in a multi-core processor. In one embodiment, each processor core includes a temperature sensor that reports temperature information to a processor controller. If a particular processor core exceeds a predetermined temperature, the processor core disables that processor core to allow it to cool. The processor core enables the previously disabled processor when the previously disabled processor core cools sufficiently to a normal operating temperature. The disclosed multi-core processor may avoid undesirable hot spots that impact processor life.
Type:
Application
Filed:
July 26, 2006
Publication date:
January 31, 2008
Applicant:
IBM Corporation
Inventors:
Louis Bennie Capps, Warren D. Dyckman, Michael Jay Shapiro
Abstract: The disclosed methodology and apparatus may reduce heat generation in a multi-core processor. In one embodiment, a multi-core processor cycles selected processor cores off in a predetermined pattern across the processor die over time to reduce the average heat generation by the processor. The disclosed multi-core processor may reduce or avoid undesirable hot spots that impact processor life.
Type:
Application
Filed:
July 26, 2006
Publication date:
January 31, 2008
Applicant:
IBM Corporation
Inventors:
Louis Bennie Capps, Warren D. Dyckman, Michael Jay Shapiro
Abstract: A memory system including a memory array with redundant wordlines is disclosed. The memory system includes a memory wordline tester that determines if any of the wordlines exhibits a defect. The memory system also includes decoder redundancy logic that efficiently couples to wordline shift logic using a reduced number of control signal lines therebetween. The shift logic shifts defective wordlines to upstream wordlines in the array to bypass the defective wordlines.
Type:
Application
Filed:
July 14, 2006
Publication date:
January 17, 2008
Applicant:
IBM Corporation
Inventors:
Toru Asano, Sang H. Dhong, Takaaki Nakazato, Osamu Takahashi
Abstract: A representation of a markup language data such as XML expressed as a sequence of encoded items provides a data format including a type field containing i) a construct type identifying a type of markup language data construct to which the encoded item corresponds or, ii) a directive type identifying directive information concerning a processing characteristic associated with the sequence of encoded items. If the type field contains a construct type, the encoded item includes i) a length field containing a size of construct data associated with the markup language data construct to which the encoded item corresponds and ii) a value field identifying construct data associated with the markup language data construct to which the encoded item corresponds. For a directive type, the encoded item includes a directive value supplementing the directive information concerning a processing characteristic associated with the sequence of encoded items.
Type:
Grant
Filed:
December 16, 2004
Date of Patent:
January 8, 2008
Assignee:
International Business Machines Corporation (IBM)
Inventors:
Heather D. Achilles, Steven R. Willis, Charles Robert Morgan, Kenneth R. Ballou, Jan-Christian Nelson, Eugene Kuznetsov
Abstract: Method, apparatus and program product are provided for the invalidation of faulty metadata in a storage controller coupled to a host device. Faulty metadata may include metadata which no longer matches the associated customer data tracks stored on a DASD or other storage device. When faulty metadata is detected, metadata tracks are selected to be invalidated. A command is received through a host interface, without the controller being taken off-line from the host, and the specified metadata tracks are invalidated. Subsequently, the invalidated metadata tracks are rebuilt. The disclosed method, apparatus and program product invalidate the faulty metadata with reduced impact on normal host/controller I/O operations.
Abstract: A method and apparatus for the formation of coplanar electrical interconnectors. Solder material is deposited onto a wafer, substrate, or other component of an electrical package using a complaint mold such that the terminal ends of the solder material being deposited, i.e., the ends opposite to those forming an attachment to the wafer, substrate, or other component of an electrical package are coplanar with one another. A complaint mold is used having one or more conduits for receiving solder material and having a compliant side and a planar side. The compliant side of the mold is positioned adjacent to the wafer, substrate, or other component of an electrical package allowing solder material to be deposited onto the surface thereof such that the planar side of the compliant mold provides coplanar interconnectors. An Injection Molded Solder (IMS) head can be used as the means for filling the conduits of the compliant mold of the present invention.
Abstract: In one embodiment, the disclosed methodology and apparatus measure relative duty cycle information of a clock signal with respect to an input node as the clock signal travels to selected nodes of a clock distribution network on an electronic circuit.
Type:
Application
Filed:
October 31, 2006
Publication date:
November 22, 2007
Applicant:
IBM Corporation
Inventors:
David William Boerstler, Eskinder Hailu, Jieming Qi, Bin Wan
Abstract: The disclosed methodology and apparatus measures the duty cycle of a clock signal. A variable duty cycle circuit receives a clock signal from a clock signal generator. The variable duty cycle circuit adjusts the duty cycle of the clock signal by an amount dependent on a duty cycle index value that it receives. The variable duty cycle circuit supplies a duty-cycle adjusted clock signal to a divider circuit. The apparatus sweeps the frequency of the clock signal from a starting value up to a maximum frequency above which the divider circuit fails. The apparatus then determines the duty cycle of the duty-cycle adjusted clock signal from the maximum frequency.
Type:
Application
Filed:
May 16, 2006
Publication date:
November 22, 2007
Applicant:
IBM Corporation
Inventors:
David Boerstler, Eskinder Hailu, Jieming Qi
Abstract: The disclosed methodology and apparatus measure the duty cycle of a reference clock signal that a clock circuit supplies to a duty cycle measurement (DCM) circuit. In one embodiment, the DCM circuit includes a capacitor driven by a charge pump. The reference clock signal drives the charge pump. The clock circuit varies the duty cycle of the reference clock signal among a number of known duty cycle values. The DCM circuit stores resultant capacitor voltage values corresponding to each of the known duty cycle values in a data store. The DCM circuit applies a test clock signal having an unknown duty cycle to the capacitor via the charge pump, thus charging the capacitor to a new voltage value that corresponds to the duty cycle of the test clock signal. Control software accesses the data store to determine the duty cycle to which the test clock signal corresponds.
Type:
Application
Filed:
May 1, 2006
Publication date:
November 15, 2007
Applicant:
IBM Corporation
Inventors:
David Boerstler, Eskinder Hailu, Jieming Qi