Patents Assigned to IMEC
  • Patent number: 6602760
    Abstract: A method of producing a semiconductor layer onto a semiconductor substrate. The method comprises providing a first semiconductor substrate, and providing a second semiconductor substrate. The method also comprises producing a porous layer, which has a porosity profile, on top of the first semiconductor substrate, and producing a porous layer, which has a porosity profile, on top of the second semiconductor substrate. The method further comprises bringing the porous layer of the second substrate into contact with the porous layer of the first substrate, so as to form a bond between the two substrates, performing a thermal annealing step, and lifting off of the second substrate, leaving a layer of the second substrate's semiconductor material attached to the first substrate.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: August 5, 2003
    Assignees: Interuniversitair Microelektronica Centrum (IMEC), Umicore
    Inventors: Jef Poortmans, Giovanni Flamand, Renat Bilyalov
  • Patent number: 6599814
    Abstract: The present invention is related to a method for removal of silicon carbide layers and in particular amorphous SiC of a substrate. Initially, the exposed part of a carbide-silicon layer is at least partly converted into an oxide-silicon layer by exposing the carbide-silicon layer to an oxygen containing plasma. The oxide-silicon layer is then removed from the substrate.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: July 29, 2003
    Assignees: Interuniversitair Microelektronica Centrum (IMEC), Dow3Corning corporation
    Inventors: Serge Vanhaelemeersch, Herman Meynen, Philip D. Dembowski
  • Patent number: 6597727
    Abstract: The programmable modem for digital data of the present invention provides a highly programmable, digital modem implemented in an integrated circuit which can be customized to specific applications. The programmable modem uses spread spectrum techniques and is specifically programmable to alter the parameters of the modem to improve performance. The present invention also provides a systematic method and development kit to provide rapid customization of a modem for a particular application or for rapid specification of a high-performance application specific integrated circuit mode.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: July 22, 2003
    Assignees: IMEC vzw, SAIT Systems
    Inventors: Lieven Philips, Jan Vanhoof, Maryse Wouters, Rik De Wulf, Veerle Derudder, Carl Van Himbeeck, Ivo Bolsens, Hugo De Man, Bert Gyselinckx
  • Patent number: 6598204
    Abstract: Methods and architectures for turbo decoding are presented. The methods are such that low energy consumption is obtained with reduced memory requirements. Moreover the methods show improved performance with respect to latency.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: July 22, 2003
    Assignee: IMEC vzw
    Inventors: Jochen Uwe Giese, Curt Schurgers, Liesbet Van der Perre, Bert Gyselinckx, Francky Catthoor, Marc Engels
  • Publication number: 20030134469
    Abstract: The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate in the shape of a slice, the method comprising the steps of: step 1) selectively applying a pattern of a solids-based dopant source to a first major surface of said semiconducting substrate; step 2) diffusing the dopant atoms from said solids-based dopant source into said substrate by a controlled heat treatment step in a gaseous environment surrounding said semi-conducting substrate, the dopant from said solids-based dopant source diffusing directly into said substrate to form a first diffusion region and, at the same time, diffusing said dopant from said solids-based dopant source indirectly via said gaseous environment into said substrate to form a second diffusion region in at least some areas of said substrate to form a second diffusion region in at least some areas of said substrate not covered by said pattern; and step 3) forming a metal contact pattern substantially in alignment with
    Type: Application
    Filed: January 27, 2003
    Publication date: July 17, 2003
    Applicant: IMEC vzw, a research center in the country of Belgium
    Inventors: Jorg Horzel, Jozef Szlufcik, Mia Honore, Johan Nijs
  • Patent number: 6593251
    Abstract: The present invention concerns a method to produce a porous oxygen-silicon insulating layer comprising following steps: applying a silicon oxygen layer to a substrate exposing the said substrate to a HF ambient.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: July 15, 2003
    Assignee: Interuniversitair Microelektronica Centrum (IMEC)
    Inventors: Mikhail Baklanov, Denis Shamiryan, Karen Maex, Serge Vanhaelemeersch
  • Publication number: 20030128724
    Abstract: A widely tunable laser structure with at least two different sampled or superstructure gratings is provided. The widely tunable laser only requires as much tuning currents as gratings. In the case of two gratings, two tuning currents, instead of 3 tuning currents in a typical laser, are needed. Alternatively, the laser structure can be denoted a sampled or superstructure grating tunable laser with wide tunability characteristics, with a limited amount of needed tuning parameters, e.g., two currents.
    Type: Application
    Filed: September 9, 2002
    Publication date: July 10, 2003
    Applicant: IMEC vzw
    Inventor: Geert Morthier
  • Patent number: 6585811
    Abstract: The present invention is related to the fabrication of at least a part of a Cu-containing layers or a Cu-containing pattern used for the electrical connection of active or passive devices as well as integrated circuits. Such Cu-containing patterns and/or layers are formed on an activated surface of a substrate by means of immersion of said substrate in an electro less Cu plating solution. Such a solution typically comprises: a source of copper Cu (II) ions; a reducing agent; an additive to adjust the pH of said aqueous solution to a predetermined value; and a chemical compound for complexing said Cu ions, said chemical compound having at least one part with chemical structure COOR1—COHR2, R1 being a first organic group covalently bound to the carboxylate group (COO), R2 being either hydrogen or a second organic group. Further disclosed is a method for depositing Cu on an activated surface and particularly on an activated surface of a Cu diffusion barrier layer.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: July 1, 2003
    Assignee: IMEC vzw
    Inventors: Roger Palmans, Yuri Lantasov
  • Patent number: 6584147
    Abstract: A receiver is disclosed at the head-end or a centralizing unit side in a communications system or network for signals in the upstream direction which is the direction from user to head-end or a centralizing unit that is linked to a number of users, the number being equal to or larger than one. The receiver is suited for the reception of burst mode signals. The receiver performs a channel estimation on a per-burst basis in real time or essentially immediate. The channel estimation is necessary to do successful data detection of modulated data. The receiver of the invention performs the channel estimation and data detection in one compact all-digital mechanism that has no tuning parts. The reception method works in an aspect according to the principle of a matched filter receiver, but stores no local copy of the required matched waveform. Rather, a copy of the matched waveform is included in the preamble of the signals.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: June 24, 2003
    Assignee: IMEC
    Inventors: Patrick Schaumont, Serge Vernalde, Marc Engels, Willy Petrus Elisa Trog, Karel Stefaan Martha Maria De Meyer, Bart Jozef Maria De Ceulaer, Marc Suzanne Paul Moonen, Piet Michel Albert Vandaele
  • Patent number: 6580120
    Abstract: A planar high-density EEPROM split gate memory structure, is formed using two poly-layers and chemical-mechanical-polishing processes. Stripes of contiguous poly lines, alternately formed in one of the two poly-layers, constitute the memory structure. Source and drain regions are formed self-aligned to the outer borders of this memory structure. Depending on the biasing scheme a poly line is used as the select gate of the memory cell while an adjacent poly line is used as program gate, so to have charge stored underneath this adjacent poly line using source-side-injection of charge carriers. The other poly lines are biased to form conductive channels between the select and program gate to the source and drain regions. These conductive channels form soft source and drain regions next to the select and program gate in use.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: June 17, 2003
    Assignee: Interuniversitair Microelektronica Centrum (IMEC VZW)
    Inventor: Luc Haspeslagh
  • Patent number: 6578129
    Abstract: The present invention proposes effective solutions for the design of Virtual Memory Management for applications with dynamic data types in an embedded (HW or SW) processor context. A structured search space for VMM mechanisms with orthogonal decision trees is presented. Based on said representation a systematic power exploration methodology is proposed that takes into account characteristics of the applications to prune the search space and guide the choices of a VMM for data dominated applications. A parameterizable model, called Flexible Pools, is proposed. This model limits the exploration of the Virtual Memory organization considerably without limiting the optimization possibilities.
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: June 10, 2003
    Assignee: IMEC vzw
    Inventors: Julio L. da Silva Junior, Francky Catthoor, Diederik Verkest
  • Patent number: 6576505
    Abstract: A method is presented in which an active element, e.g. a semiconductor device, is embedded in a passive circuitry formed on a low-cost substrate, having good dielectric properties. After forming the active element on a first substrate, the active elements are singulated and transferred to a second substrate. The active element is bonded to this second substrate and the portion of the first substrate, on which this active element is created, is removed selectively to the active element and the low-cost substrate. On this second substrate passive circuitry may be present or it can be formed after the attachment of the active element. The passive circuitry is interconnected to the active element or other components or dies present on the low-cost substrate.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: June 10, 2003
    Assignees: Imec, VZW, Umicore
    Inventors: Staf Borghs, Eric Beyne, Raf Vandersmissen
  • Patent number: 6568408
    Abstract: A method and an apparatus for removing a liquid, i.e a wet processing liquid, from a surface of at least one substrate is disclosed. A liquid is supplied on a surface of substrate. Simultaneously or thereafter besides the liquid also a gaseous substance can be supplied thereby creating at least locally a sharply defined liquid-vapor boundary. The gaseous substance and the liquid can be selected such that the gaseous substance is miscible with the liquid and when mixed with the liquid yields a mixture having a surface tension lower than that of the liquid. According to the invention, the substrate is subjected to a rotary movement at a speed to guide said liquid-vapor boundary over said substrate thereby removing said liquid from said substrate.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: May 27, 2003
    Assignee: Interuniversitair Microelektronica Centrum (IMEC, vzw)
    Inventors: Paul Mertens, Mark Meuris, Marc Heyns
  • Patent number: 6570226
    Abstract: The present invention is related to a semiconductor device for electrostatic discharge or overvoltage protection applications, said device comprising means for absorbing an electrostatic discharge pulse or an overvoltage level, said means being triggered at intermediate voltages and said means including a series configuration of at least two trigger components. Said means can further be extended with a third trigger component and possibly further trigger components in said series configuration, the addition of said third and further trigger components extending sequentially the range of the intermediate trigger voltages. Said trigger components can comprise components, preferably diodes, with a specific breakdown voltage, the sum of the breakdown voltages of said diodes defining the specific intermediate trigger voltage of said device.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: May 27, 2003
    Assignees: Interuniversitair Microelektronia Centrum (IMEC), STMicroelectronics NV
    Inventors: Guido Groeseneken, Christian Russ
  • Patent number: 6566745
    Abstract: The present invention is related to an image sensor packaging technique based on a Ball Grid Array (BGA) IC packaging technique, further referred to as image sensor ball grid array (ISBGA). A transparent cover is attached to a semiconductor substrate. Depending on the method of attaching the cover to the substrate a hermetic or non-hermitic sealing is obtained. The obtained structure can be connected trough wire-bonding or flip chip connection.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: May 20, 2003
    Assignee: IMEC vzw
    Inventors: Eric Beyne, Steve Lerner
  • Patent number: 6552414
    Abstract: The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate (2) in the shape of a slice, the method comprising the steps of: step 1) selectively applying a pattern of a solids-based dopant source to a first major surface of said semiconducting substrate (2); step 2) diffusing the dopant atoms from said solids-based dopant source into said substrate (2) by a controlled heat treatment step in a gaseous environment surrounding said semi-conducting substrate (2), the dopant from said solids-based dopant source diffusing directly into said substrate (2) to form a first diffusion region (12) and, at the time, diffusing said dopant from said solids-based dopant source indirectly via said gaseous environment into said substrate (2) to form a second diffusion region (15) in at least some areas of said substrate (2) not covered by said pattern; and step 3) forming a metal contact pattern (20) substantially in alignment with said first diffusion region (12) with
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: April 22, 2003
    Assignee: IMEC vzw
    Inventors: Jörg Horzel, Jozef Szlufcik, Mia Honoré, Johan Nijs
  • Patent number: 6545856
    Abstract: The present invention is related to a method, wherein a PZT layer includes a first PZT sub-layer and a second PZT sub-layer, the Ti-concentration of the first PZT sub-layer being higher than the Ti-concentration of the second PZT sub-layer.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: April 8, 2003
    Assignee: Interuniversitair Microelectronica Centrum (IMEC)
    Inventors: Gerd Norga, Dirk Wouters
  • Patent number: 6545334
    Abstract: A device for thermal sensing is disclosed based on only one thermopile. The cold junctions of said thermopile are coupled thermally to a first channel comprising a first substance while the hot junctions of said thermopile are coupled thermally to a second channel comprising a second substance, said first and said second channel are separated and thermally isolated one from another. Said device can further comprise a membrane to thermally and electrically isolate said thermopile and to mechanically support said thermopile. Particularly a liquid rubber, i.e. ELASTOSIL LR3003/10A, B can be used as a membrane material. Further disclosed is a method for fabricating such a device using micromachining techniques.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: April 8, 2003
    Assignee: Imec VZW
    Inventor: Katarina Verhaegen
  • Publication number: 20030060034
    Abstract: The present invention provides a method of transfer of a first planar substrate with two major surfaces to a second substrate, comprising the steps of forming the first planar substrate, attaching one of the major surfaces of the first planar substrate to a carrier by means of a release layer attaching the other major surface of the first substrate to the second substrate with a curable polymer adhesive layer partly curing the polymer adhesive layer, disconnecting the release layer from the first substrate to separate the first substrate from the carrier, followed by curing the polymer adhesive layer.
    Type: Application
    Filed: July 25, 2002
    Publication date: March 27, 2003
    Applicant: IMEC vzw, a research center in the country of Belgium
    Inventors: Eric Beyne, Augustin Coello-Vera, Olivier Vendier
  • Patent number: 6530385
    Abstract: An apparatus for wet cleaning or etching of flat substrates comprising a tank with an inlet opening and outlet opening for said substrates. Said tank contains a cleaning liquid and is installed in a gaseous environment. At least one of the openings is a slice in a sidewall of the tank and is present below the liquid-surface. In the tank there may be a portion above the liquid filled with a gas with a pressure being lower than the pressure within said environment. The method comprises the step of transferring a substrate through the cleaning or etching liquid at a level underneath the surface of said liquid making use of said apparatus.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: March 11, 2003
    Assignee: Interuniversitair Microelektronica Centrum (IMEC)
    Inventors: Marc Meuris, Paul Mertens, Marc Heyns