Abstract: A method for manufacturing a stretchable electronic device is disclosed. In one aspect, the device comprises at least one electrically conductive channel connecting at least two components of the device. The method comprises forming the channel by laser-cutting a flexible substrate into a predetermined geometric shape.

Abstract: A method for producing one or more nMOSFET devices and one or more pMOSFET devices on the same semiconductor substrate is disclosed. In one aspect, the method relates to the use of a single activation anneal that serves for both Si nMOS and Ge pMOS. By use of a solid phase epitaxial regrowth (SPER) process for the Si nMOS, the thermal budget for the Si nMOS can be lowered to be compatible with Ge pMOS.

Abstract: A method for manufacturing a resistive switching memory device comprises providing a substrate comprising an electrical contact, providing on the substrate a dielectric layer comprising a trench exposing the electrical contact, and providing in the trench at least the bottom electrode and the resistive switching element of the resistive memory device. The method may furthermore comprise providing a top electrode at least on or in the trench, in contact with the resistive switching element. The present invention also provides corresponding resistive switching memory devices.

Abstract: A method of providing a metal interconnect to second structures embedded in organic dielectric material is disclosed. In one aspect, the method includes obtaining a first structure with second structures, e.g., metal pillars, embedded in organic dielectric material. The method further includes, at least at some locations of the first structure, providing a stiffening layer on top of the organic dielectric material, the stiffening layer having a stiffness higher than the stiffness of the organic dielectric material. The method provides an interconnect structure free from cracks at the interface between the second structures and the organic dielectric material.

Abstract: A method of making an electrically conductive structure in a surface portion of a dielectric material is disclosed. In one aspect, the method includes creating vacancies at at least part of an exposed surface of the dielectric material by removing atoms from a plurality of molecules of the dielectric material.

Abstract: Methods and apparatus for creating and controlling transient cavitation are disclosed. An example method includes selecting a range of bubble sizes to be created in a liquid and selecting characteristics for an acoustic field to be applied to the liquid. The method further includes creating gas bubbles of the selected range of bubble sizes in the liquid, creating an acoustic field with the selected characteristics and subjecting the liquid to the acoustic field. In the example method, at least one of the range of bubble sizes and the characteristics of the acoustic field is selected in correspondence with the other so as to control transient cavitation in the liquid for the selected range of bubble sizes. Particularly, the methods and apparatus may be used for the cleaning of a surface, such as a semiconductor substrate.

Abstract: An analog-to-digital converter that uses a comparator based asynchronous binary search is described. The architecture includes a self-clocked (asynchronous) hierarchical binary tree of comparators, each arranged for being provided with a predetermined threshold. The input signal is applied in parallel to all comparators as is the case with flash converters, but the clock is applied to (at least) one comparator only, for example to the first or root comparator. The at least one comparator is further arranged for controlling at least one other comparator of the plurality of comparators.

Abstract: A water soluble functional polyethylene glycol-grafted polysiloxane polymer comprising a polysiloxane backbone and polyethylene glycol side chains is provided having the general formula: wherein A is selected from the group consisting of hydrogen, methyl, methoxy and functional polyethylene glycol based chains, B is a functional group for binding biologically-sensitive materials, D is a functional group for binding to a substrate, m is from 3 to 5, v is from 0 to 5, w is from 4 to 11, x is from 0 to 35 and z is from 1 to 33. In order to be water soluble, the polysiloxane polymer h the following properties: x+y+z is from 8 to 40, n is from 8 to 30, and y is from 7 to 35.

Abstract: Methods and apparatuses for cleaning a surface of a substrate are presented. The method comprises positioning a substrate at a controllable distance from a piezoelectric transducer, supplying a cleaning liquid between the substrate and the transducer, applying an oscillating acoustic force to the cleaning liquid by actuating the transducer, and moving the transducer relative to the substrate. The method further comprises, while moving the transducer relative to the substrate, measuring a value that indicates a distance between a surface of the substrate and the transducer, comparing the measured value to a desired value, and adjusting the distance between the surface and the transducer so that the measured value is maintained substantially equal to the desired value. The measured value may be the distance between the surface of the substrate and the transducer or a phase shift between an alternating current and voltage applied to the transducer.

Abstract: Disclosed are methods for manufacturing semiconductor devices and the devices thus obtained. In one embodiment, the method comprises obtaining a semiconductor substrate comprising a germanium region doped with n-type dopants at a first doping level and forming an interfacial silicon layer overlying the germanium region, where the interfacial silicon layer is doped with n-type dopants at a second doping level and has a thickness higher than a critical thickness of silicon on germanium, such that the interfacial layer is at least partially relaxed. The method further includes forming over the interfacial silicon layer a layer of material having an electrical resistivity smaller than 1×10?2 ?cm, thereby forming an electrical contact between the germanium region and the layer of material, wherein the electrical contact has a specific contact resistivity below 10?4 ?cm2.

Abstract: A method is provided for forming at least one TSV interconnect structure surrounded by at least one isolating trench-like structure having at least one airgap. The method comprises at least the steps of providing a substrate having a first main surface and producing simultaneous at least one a TSV hole and a trench-like structure surrounding the TSV hole and separated by remaining substrate material. The method also comprises thereafter depositing a dielectric liner in order to smoothen the sidewalls of the etched TSV hole and to pinch-off the opening of the trench-like structure at the first main surface of the substrate in order to create at least one airgap in said trench-like structure and depositing a conductive material in said TSV hole in order to create a TSV interconnect. A corresponding substrate is also provided.

Abstract: The present invention is related to a pipelined analog-to-digital converter, ADC, for converting an analog input signal into a digital signal comprising—a plurality of comparing means having tuneable thresholds for comparing an input signal with; at least two of said given thresholds being different and—a plurality of amplifying circuits,—wherein said plurality of comparing means is configured to form a hierarchical tree structure, said hierarchical tree structure having a plurality of hierarchical levels, wherein at least one of said hierarchical levels is associated with at least one amplifying circuit of said plurality of amplifying circuits, said at least one amplifying circuit generating the input of at least one comparing means at the next hierarchical level and—wherein said plurality of hierarchical levels comprises means for setting said tuneable thresholds in accordance to the output of previous hierarchical level so that non-linear distortion of the preceding hierarchical level is removed.

Abstract: The present invention is related to a method for masked anodization of an anodizable layer on a substrate, for example an aluminum layer present on a sacrificial layer, wherein the sacrificial layer needs to be removed from a cavity comprising a Micro or Nano Electromechanical System (MEMS or NEMS). Anodization of an Al layer leads to the formation of elongate pores, through which the sacrificial layer can be removed. According to the method of the invention, the anodization of the Al layer is done with the help of a first mask which defines the area to be anodized, and a second mask which defines a second area to be anodized, said second area surrounding the first area. Anodization of the areas defined by the first and second mask leads to the formation of an anodized structure in the form of a closed ring around the first area, which forms a barrier against unwanted lateral anodization in the first area.

Abstract: A method for frequency domain equalization of a cyclic CPM signal received via a channel is disclosed. In one aspect, the method includes representing the received cyclic CPM signal as a matrix model comprising a channel matrix representing influence of the channel, separate from a Laurent pulse matrix and a pseudocoefficient matrix respectively representing Laurent pulses and pseudocoefficients determined by Laurent decomposition of the received cyclic CPM signal. The method may further include applying a channel equalizer on the separate channel matrix and after the equalization. It may further include demodulating the received cyclic CPM signal by the matrix model, the demodulation exploiting known correlation properties of the Laurent pulses and the pseudocoefficients.

Abstract: Method of producing a semiconductor device, comprising: a) providing a semiconductor substrate, b) making a first amorphous layer in a top layer of the semiconductor substrate by a suitable implant, the first amorphous layer having a first depth, c) implanting a first dopant into the semiconductor substrate to provide the first amorphous layer with a first doping profile, d) applying a first solid phase epitaxial regrowth action to partially regrow the first amorphous layer and form a second amorphous layer having a second depth that is less than the first depth and activate the first dopant, e) implanting a second dopant into the semiconductor substrate to provide the second amorphous layer with a second doping profile with a higher doping concentration than the first doping profile, f) applying a second solid phase epitaxial regrowth action to regrow the second amorphous layer and activate the second dopant.

Abstract: A DND device is disclosed. In one aspect, the device includes a nano-mirror (21), and an actuating module configured to move the nano-mirror in an upward and/or downward position. The actuating module has a cantilever mounted to a fixed structure, and at least one first electrode for moving the cantilever in an upward and/or downward position. Such DND devices may be arranged in a 2D array.

Abstract: A method for forming an organic material layer on a substrate in an in-line deposition system is disclosed. In one aspect, the organic material is deposited with a predetermined non-constant deposition rate profile, which includes a first predetermined deposition rate range provided to deposit at least a first monolayer of the organic material layer with a first predetermined average deposition rate and a second predetermined deposition rate range provided to deposit at least a second monolayer of the organic material layer with a second predetermined average deposition rate. The injection of organic material through the openings of the injector is controlled for realizing the predetermined deposition rate profile.

Abstract: A DND chip is disclosed. In one aspect, the chip includes a 2D DND array of DND elements logically arranged in rows and columns, and a DND driver architecture for actuating the DND elements. The DND driver has a set of first drive lines along the rows and a set of second drive lines along the columns, a set of first line drivers for each biasing one line from the set of first drive lines and a set of second line drivers for each biasing a line from the set of second drive lines. A plurality of second line drivers are spatially grouped together to serve a block of DND elements, and that plurality of second line drivers are spatially covered substantially completely by at least some DND elements of the block of DND elements. A holographic visualization system including the DND chip is provided.

Abstract: Disclosed are methods for forming semiconductor devices and the semiconductor devices thus obtained. In one embodiment, the method may include providing a semiconductor wafer comprising a surface, forming on the surface at least one device, forming a release layer at least in an area of the surface that encircles the at least one device, forming on the release layer at least one wall structure around the at least one device, and forming at least one cap on the at least one wall structure. In one embodiment, the device may include a substrate comprising a surface, at least one device formed on the surface, a release layer formed at least in an area of the surface that encircles the at least one device, at least one wall structure formed around the at least one device, and at least one removable cap formed on the at least one wall structure.

Abstract: A device and method for exchanging data frames are disclosed. In one aspect, the device exchanges data between a WAN and one or more LAN segments in an optimized way leading to a better quality of experience for the user. The device comprises an interface exchanging data frames over an access network, at least a first and second subnet interface exchanging data frames and arranged for being coupled to a network, a memory storing classification rules, a classification agent extracting information from an incoming data frame and applying the rules to the extracted information to determine the interface via which the incoming data frame is to be forwarded, and a Quality of Service monitoring agent for retrieving Quality of Service information from the subnet interfaces and dynamically updating the classification rules according to the QoS information.