Abstract: A tunnel field effect transistor (TFET) is disclosed. In one aspect, the transistor comprises a gate that does not align with a drain, and only overlap with the source extending at least up to the interface of the source-channel region and optionally overlaps with part of the channel. Due to the shorter gate, the total gate capacitance is reduced, which is directly reflected in an improved switching speed of the device. In addition to the advantage of an improved switching speed, the transistor also has a processing advantage (no alignment of the gate with the drain is necessary), as well as a performance improvement (the ambipolar behavior of the TFET is reduced).

Abstract: A method for producing on-chip interconnect structures on a substrate is provided, comprising at least the steps of providing a substrate and depositing a ruthenium-comprising layer on top of said substrate, and then performing a pre-treatment of the Ru-comprising layer electrochemically with an HBF4-based electrolyte, and then performing electrochemical deposition of copper onto the pre-treated Ru-comprising layer.

Abstract: The preferred embodiments provide a method for forming at least one metal comprising elongated nanostructure on a substrate. The method comprises exposing a metal halide compound surface to a photon comprising ambient to initiate formation of the at least one metal comprising elongated nanostructure. The preferred embodiments also provide metal comprising elongated nanostructures obtained by the method according to preferred embodiments.

Abstract: A method of analog beamforming in a wireless communication system is disclosed. The system has a plurality of transmit antennas and receive antennas. In one aspect, the method includes determining information representative of communication channels formed between a transmit antenna and a receive antenna of the plurality of antennas, defining a set of coefficients representing jointly the transmit and the receive beamforming coefficients, determining a beamforming cost function using the information and the set of coefficients, determining an optimized set of coefficients by exploiting the beamforming cost function, and separating the optimized set of coefficients into optimized transmit beamforming coefficients and optimized receive beamforming coefficients.

Abstract: The present invention provides an etching solution for revealing defects in a germanium layer, a method for revealing defects in a germanium layer using such an etching solution and to a method for making such an etching solution. The etching solution according to embodiments of the present invention is able to exhibit an etch rate of between 4 nm·min?1 and 450 nm·min?1, which makes it suitable to be used for revealing defects in a thin layer of germanium, i.e. in a layer of germanium with a thickness of between 20 nm and 10 ?m, for example between 20 nm and 2 ?m, between 20 nm and 1 ?m or between 20 nm and 200 nm.

Abstract: A method is disclosed comprising providing a substrate comprising an insulating material and a second semiconductor material and pre-treating the substrate with a plasma produced from a gas selected from the group consisting of a carbon-containing gas, a halogen-containing gas, and a carbon-and-halogen containing gas. The method further comprises depositing a first semiconductor material on the pre-treated substrate by chemical vapor deposition, where the first semiconductor material is selectively deposited on the second semiconductor material. The method may be used to manufacture a semiconducting device, such as a microelectromechanical system device, or to manufacture a semiconducting device feature, such as an interconnect.

Abstract: Methods of manufacturing a III-V compound semiconductor material, and the semiconductor material thus manufactured, are disclosed. In one embodiment, the method comprises providing a substrate comprising a first semiconductor material having a {001} orientation and an insulating layer overlaying the first semiconductor material. The insulating layer comprises a recessed region exposing an exposed region of the first semiconductor material. The method further comprises forming a buffer layer overlaying the exposed region that comprises a group IV semiconductor material. The method further comprises thermally annealing the substrate and the buffer layer, thereby roughening the buffer layer to create a rounded, double-stepped surface having a step density and a step height. A product of the step density and the step height is greater than or equal to 0.05 on the surface.

Abstract: A method and system for testing the functionality of a through-silicon-via in an integrated circuit is disclosed. In one aspect, the functionality is tested by measuring its capacitance from one side only. The capacitance of the TSV can be determined by measuring a timing delay introduced in a measurement circuit due to the presence of the TSV. The timing delay is determined by comparing the timing of measurement signal from the measurement circuit with the timing of a reference signal provided by a reference circuit. The comparison is carried out using a digital timing measurement circuit, such as a time-to-digital converter.

Abstract: Methods of fabricating complementary metal-oxide-semiconductor (CMOS) imagers for backside illumination are disclosed. In one embodiment, the method may include forming at a front side of a substrate a plurality of high aspect ratio trenches having a predetermined trench depth, and forming at the front side of the substrate a plurality of photodiodes, where each photodiode is adjacent at least one trench. The method may further include forming an oxide layer on inner walls of each trench, removing the oxide layer, filling each trench with a highly doped material, and thinning the substrate from a back side opposite the front side to a predetermined final substrate thickness. In some embodiments, the substrate may have a predetermined doping profile, such as a graded doping profile, that provides a built-in electric field suitable to guide the flow of photogenerated minority carriers towards the front side.

Abstract: A measurement system for determining the capacitance of a device-under-test in an integrated circuit is disclosed. In one aspect, the measurement system has a reference circuit and a test circuit. Each circuit has first and second diodes that are switched in accordance with a clock cycle to charge and discharge the associated circuit. A method takes average current measurements for each circuit at one voltage level and processes them so that the capacitance of a device-under-test connected to the test circuit can accurately and reliably be determined. Two voltage levels may be used and adjustments are made for voltage threshold of the diodes and also their resistance.

Abstract: An autonomous transducer system is disclosed. In one aspect, the system includes an energy scavenging module, energy storage module, a load circuit having at least one functional block providing a given functionality, and a power management module arranged for providing power supplied by the energy scavenging module to the load circuit or for exchanging power with the energy storage module. The power management module may further include a tuning module configured to tune the at least one functional block of the load circuit according to a given configuration scheme.

Abstract: Ni3Si2 FUSI gates can be formed inter alia by further reaction of NiSi/Ni2Si gate stacks. Ni3Si2 behaves similarly to NiSi in terms of work function values, and of modulation with dopants on SiO2, in contrast to Ni-rich silicides which have significantly higher work function values on HfSixOy and negligible work function shifts with dopants on SiO2. Formation of Ni3Si2 can applied for applications targeting NiSi FUSI gates, thereby expanding the process window without changing the electrical properties of the FUSI gate.

Abstract: Ultra-low capacitance interconnect structures, preferably Through Silicon Via (TSV) interconnects and methods for fabricating said interconnects are disclosed. The fabrication method comprises the steps of providing a substrate having a first main surface, producing at least one hollow trench-like structure therein from the first main surface, said trench-like structure surrounding an inner pillar structure of substrate material, depositing a dielectric liner which pinches off said hollow trench-like structure at the first main surface such that an airgap is created in the center of hollow trench-like structure and further creating a TSV hole and filling it at least partly with conductive material.

Abstract: A MEMS device is disclosed comprising a cavity containing a MEMS component, the cavity being formed in a dielectric layer stack having a thickness td, whereby the cavity and the dielectric layer stack are sandwiched between a substrate and a sealing dielectric layer having a thickness ts, and whereby the MEMS component is enclosed by at least one trench extending over the thickness td of the dielectric layer stack and of the sealing dielectric ts.

Abstract: A method and device for gasflow, e.g. airflow, energy harvesting is disclosed. In one aspect, the device includes a cavity resonator such as a Helmholtz resonator which has a membrane for converting gasflow in vibration. The device may further include a vibrational energy harvester for converting the converted vibration into electrical energy. The device for gasflow energy harvesting is adapted such that the movement of the vibrational energy harvester is decoupled from the movement of the membrane. This allows to obtain a good output power of e.g. more than about 10 ?W.

Abstract: A waveguide integrated photodetector (100) is described. The waveguide integrated photodetector comprises a first layer (110) of plasmon supporting material whereby the first layer (110) has an input slit (112) extending through the first layer (110) for coupling first radiation to the waveguide. The photodetector (100) also comprises a second layer (120) of plasmon supporting material facing the first layer and separated from the first layer by a first distance in a first direction. The second layer (120) has an output slit (122) extending through the second layer (120) and separated from the input slit (112) by a second distance extending along a second direction differing from first direction. The photodetector system (100) also comprises a dielectric layer (130) interposed between the first layer (110) and the second layer (120), and a detector (140) near the output slit (122) for detecting the radiation coupled out through the output slit (122).

Abstract: The present invention is directed to solid state organic light emitting devices and to methods for triplet excitation scavenging in such devices. More particularly, the present invention relates to a method for substantially reducing a triplet population in a solid state organic material, the method comprising providing molecules exhibiting non-vertical triplet energy transfer in the solid state organic material or at a distance smaller than a triplet exciton diffusion length from the solid state organic material.

Abstract: An analog to digital converting device is proposed for generating a digital output signal of an RF analog input signal. The device comprises a first analog to digital converter stage, a mixer, a second analog to digital converter stage and a digital filter. The first analog to digital converter stage generates a first and a second output signal. The first output signal is inputted in the filtering means. The second output signal is being down-converted to a signal with an intermediate frequency or DC. Thereafter, this down-converted signal is being fed to the second analog to digital converter stage. The digital output signal of this second stage is further processed together with the first digital output signal in the digital filter to a digital signal representative of the analog input signal.

Abstract: In one aspect of the invention, a method or apparatus is described for determining concentration(s) of one or more analytes in a sample using plasmonic excitations. In another aspect, a method relates to designing systems for such concentration determination, wherein metallic nanostructures are used in combination with local electrical detection of such plasmon resonances via a semiconducting photodetector. In certain aspects, the method exploits the coupling of said metallic nanostructure(s) to a semiconducting photodetector, said detector being placed in the “metallic structure's” near field. Surface plasmon excitation can be transduced efficiently into an electrical signal through absorption of light that is evanescently coupled or scattered in a semiconductor volume. This local detection technique allows the construction of sensitive nanoscale bioprobes and arrays thereof.

Abstract: A microresonator for use as a resonator in a detector is disclosed. In one aspect, the microresonator has a first predetermined resonance mode. The microresonator has an integrated electronic transducer for measuring deformation of the microresonator in the first predetermined resonance mode of the microresonator. The transducer is located at a local deformation of the predetermined resonance mode to measure the deformation of the microresonator at such location. The first predetermined resonance mode may be one of higher order resonance modes.