Abstract: An active sieve device for the isolation and characterization of bio-analytes is provided, comprising a substrate for supporting the bio-analytes. The substrate comprises a plurality of interconnections and a plurality of regions, each region comprising a hole and at least one electrode embedded in or located on the substrate and electrically associated with the hole. Each region further comprises at least one transistor integrated in the substrate and operably connected to the at least one electrode and to at least one of the plurality of interconnections.

Abstract: A dry etching method for texturing a surface of a substrate is disclosed. The method includes performing a first dry etching onto the surface of the substrate thereby forming a surface texture with spikes and valleys, the first dry etching comprising etching the surface of the substrate in a plasma comprising fluorine (F) radicals and oxygen (O) radicals, wherein the plasma comprises an excess of oxygen (O) radicals. The method may further include performing a second dry etching onto the surface texture thereby smoothening the surface texture, the second dry etching comprising chemical isotropic etching the surface texture, obtained after the first dry etching, in a plasma comprising fluorine (F) radicals, wherein the spikes are etched substantially faster than the valleys.

Abstract: An asynchronous analog to digital convertor for converting an analog input signal into a digital output is presented. According to an embodiment, the analog to digital convertor comprises a clock input operable to receive an external clock signal having a clock period, a comparator operable to compare the analog input signal to a reference signal, a digital to analog converter operable to generate the reference signal corresponding to a state of a successive approximation register, and a control block connected to the comparator and to the digital to analog converter. The control block is operable to generate and receive a sequence of control signals according to a successive approximation algorithm, to perform a plurality of comparisons, and to update the state of the successive approximation register thereby generating the digital output.

Abstract: A method for optimizing a design for a device is disclosed. Such an optimization is performed with respect to a predetermined metric, e.g. device speed, area, power consumption or yield. In one aspect, the method comprises obtaining a design for a device. The design comprises design components. The method also comprises determining from the design components at least one group of first design components that has a higher sensitivity to the predetermined metric than second design components. The first design components may be on the critical path in the design. The method further comprises tuning the first design components and the technology for manufacturing the first design components thus reducing the variability of the first design components and obtaining an optimized design with respect to the predetermined metric.

Abstract: A method for forming a nanostructure penetrating a layer and the device made thereof is disclosed. In one aspect, the device has a substrate, a layer present thereon, and a nanostructure penetrating the layer. The nanostructure defines a nanoscale passageway through which a molecule to be analyzed can pass through. The nanostructure has, in cross-sectional view, a substantially triangular shape. This shape is particularly achieved by growth of an epitaxial layer having crystal facets defining tilted sidewalls of the nanostructure. It is highly suitably for use for optical characterization of molecular structure, particularly with surface plasmon enhanced transmission spectroscopy.

Abstract: An access/edge network node (300) according to the invention includes a single proxy function (301) to terminate on the subscriber side a single requesting protocol for a plurality of streaming video services.

Abstract: A micromachined piezoelectric energy harvester and methods of fabricating a micromachined piezoelectric energy harvester are disclosed. In one embodiment, the micromachined piezoelectric energy harvester comprises a resonating beam formed of a polymer material, at least one piezoelectric transducer embedded in the resonating beam, and at least one mass formed on the resonating beam. The resonating beam is configured to generate mechanical stress in the at least one piezoelectric transducer, and the at least one piezoelectric transducer is configured to generate electrical energy in response to the mechanical stress.

Abstract: A gas ionization sensor is disclosed. In one aspect, the sensor includes at least one sensing element on a substrate. The sensing element includes: at least one nanowire and a counter electrode which surrounds the nanowire, the surrounding electrode being electrically isolated from the nanowire and being at a predetermined gap from the nanowire, the gap allowing penetration of a gas or a gas mixture between the nanowire and the surrounding electrode. The sensing element also includes a voltage source electrically connected between the nanowire and the surrounding electrode for providing a voltage difference between the nanowire and the surrounding electrode, and measurement circuitry for measuring a breakdown voltage and/or an electrical discharge current and/or a prebreakdown current through the gap.

Abstract: A stretchable electronic device is disclosed. In one aspect, the device includes at least one combination of a stretchable electronic structure having a first young modulus and a rigid or flexible electronic structure having a second young modulus higher than the first young modulus. The stretchable electronic structure and the rigid or flexible electronic structure may be electrically connected to each other by a semi-transition structure having a third young modulus with a value in a range between the first and the second young modulus.

Abstract: A method according to embodiments of the present invention comprises providing a magnetic stack comprising a magnetic layer sub-stack comprising magnetic layers and a bottom conductive electrode and a top conductive electrode electrically connecting the magnetic layer sub-stack at opposite sides thereof; providing a sacrificial pillar on top of the magnetic stack, the sacrificial pillar having an undercut with respect to an overlying second sacrificial material and a sloped foot with increasing cross-sectional dimension towards the magnetic stack, using the sacrificial pillar for patterning the magnetic stack, depositing an insulating layer around the sacrificial pillar, selectively removing the sacrificial pillar, thus creating a contact hole towards the patterned magnetic stack, and filling the contact hole with electrically conductive material.

Abstract: Methods for fabricating porous low-k materials are provided, such as plasma enhanced chemically vapor deposited (PE-CVD) and chemically vapor deposited (CVD) low-k films used as dielectric materials in between interconnect structures in semiconductor devices. More specifically, a new method is provided which results in a low-k material with significant improved chemical stability and improved elastic modulus, for a porosity obtained.

Abstract: A method and system for performing pulsed electron paramagnetic resonance is disclosed. In one aspect, the method includes generating an excitation pulse train for applying to an object having probes and detecting from the probes an echo response induced by the excitation pulse train.

Abstract: A stretchable electronic device is disclosed. In one aspect, the device has a stretchable interconnection electrically connecting two electronic components. The stretchable interconnection includes an electrically conductive channel having a predetermined first geometry by which the channel is stretchable up to a given elastic limit and a first flexible supporting layer provided for supporting the electrically conductive channel and having a predetermined second geometry by which the first supporting layer is stretchable. The predetermined second geometry has a predetermined deviation from the predetermined first geometry chosen for restricting stretchability of the electrically conductive channel below its elastic limit.

Abstract: A method for determining the presence of a sacrificial layer under a structure. The method includes providing at least one structure arranged above a substrate having a major surface lying in a plane, the at least one structure being clamped at at least one side. The method further includes exerting a force, such as a mechanical force, on the at least one structure. The force may have a predetermined amplitude and a component perpendicular to the substrate. Still further, the method includes determining the deflection of the at least one structure perpendicular to the plane of the substrate, and correlating the deflection of the at least one structure to the presence of a sacrificial layer between the substrate and the structure.

Abstract: A device and method for calibrating MIMO systems are disclosed. In one aspect, a calibration circuit comprises at least a first and a second input/output port, each arranged for being connected to a different transmitter/receiver pair of a multiple input multiple output (MIMO) system. The circuit further comprises at least a third and a fourth input/output port, each arranged for being connected to a different antenna. The circuit further comprises an attenuator having a first attenuator port and a second attenuator port. The circuit further comprises a first and a second non-reciprocal switch, the first switch being arranged for establishing a connection between the first input/output port and either the third input/output port or the first attenuator port, and the second switch arranged for establishing a connection between the second input/output port and either the fourth input/output port or the second attenuator port.

Abstract: Tunnel field-effect transistors (TFETs) are regarded as successors of metal-oxide semiconductor field-effect transistors (MOSFETs), but silicon-based TFETs typically suffer from low on-currents, a drawback related to the large resistance of the tunnel barrier. To achieve higher on-currents an elongate monocrystalline nanostructure-based TFET with a heterostructure made of a different semiconducting material (e.g. germanium (Ge)) is used. An elongate monocrystalline nanostructure made of a different semiconducting material is introduced which acts as source (or alternatively drain) region of the TFET. The introduction of the heterosection is such that the lattice mismatch between silicon and germanium does not result in a highly defective interface. A dynamic power reduction as well as a static power reduction can result, compared to conventional MOSFET configurations.

Abstract: A gate insulating film is formed on a semiconductor substrate having a first region in which a first conductivity type transistor is formed and a second region in which a second conductivity type transistor is formed. Next, a metal film and a first metal nitride film are sequentially formed on the gate insulating film. Next, part of each of the metal film and the first metal nitride film that is located in the second region is removed, thereby exposing part of the gate insulating film that is located in the second region. Next, a second metal nitride film made of a same metal nitride as the first metal nitride film is formed on the part of the gate insulating film that is located in the second region.

Abstract: A quantum well device and a method for manufacturing the same are disclosed. In one aspect, the device includes a quantum well region overlying a substrate, a gate region overlying a portion of the quantum well region, a source and drain region adjacent to the gate region. The quantum well region includes a buffer structure overlying the substrate and including semiconductor material having a first band gap, a channel structure overlying the buffer structure including a semiconductor material having a second band gap, and a barrier layer overlying the channel structure and including an un-doped semiconductor material having a third band gap. The first and third band gap are wider than the second band gap. Each of the source and drain region is self-aligned to the gate region and includes a semiconductor material having a doped region and a fourth band gap wider than the second band gap.

Abstract: A non-volatile memory device having a control gate on top of the second dielectric (interpoly or blocking dielectric), at least a bottom layer of the control gate in contact with the second dielectric being constructed in a material having a predefined high work-function and showing a tendency to reduce its work-function when in contact with a group of certain high-k materials after full device fabrication. At least a top layer of the second dielectric, separating the bottom layer of the control gate from the rest of the second dielectric, is constructed in a predetermined high-k material, chosen outside the group for avoiding a reduction in the work-function of the material of the bottom layer of the control gate. In the manufacturing method, the top layer is created in the second dielectric before applying the control gate.

Abstract: The invention relates to a voltage controlled oscillator for generating a variable frequency. The oscillator comprises an oscillator core and a transconductive portion for compensating current losses in the oscillator core. The oscillator core comprises an inductive portion with at least one inductive element and a capacitive portion whose capacitance can be continuously varied by means of a control voltage for varying said frequency. The capacitive portion comprises multiple variable capacitive elements whose capacitance is continuously variable by means of said control voltage, each variable capacitive element being switchable for being added to or removed from the capacitive portion.