Abstract: A pressure measuring arrangement is proposed. The pressure measuring arrangement includes a first MEMS pressure sensor arranged on a carrier, and also a second MEMS pressure sensor arranged on the carrier. Furthermore, the pressure measuring arrangement includes an integrated circuit arranged on the carrier, the integrated circuit being coupled to the first MEMS pressure sensor and the second MEMS pressure sensor.

Abstract: A system for examining semiconductor substrates may comprise an indenter configured to exercise a force onto the semiconductor substrate such that a crack in the semiconductor substrate occurs, a piezoelectric acoustic emission sensor configured to detect an acoustic signal emitted by the crack, and attaching means configured to fasten the indenter to a first surface of the piezoelectric acoustic emission sensor. The indenter and the attaching means are configured to transmit the acoustic signal to the piezoelectric acoustic emission sensor. The resonance frequencies of the indenter and the piezoelectric acoustic emission sensor are attuned to one another.

Abstract: In accordance with an embodiment, a method of operating an RF system includes filtering a first wideband RF signal using a wideband filter bank. Filtering the first RF signal includes separating the first wideband RF signal into frequency cluster signals, where each frequency cluster signal of the frequency cluster signals includes different frequency ranges, the first wideband RF signal includes multiple RF bands, and each of the different frequency ranges comprises a plurality of RF bands of the multiple RF bands. The method further includes band stop filtering at least one of the frequency cluster signals to produce a band stopped frequency cluster signal.

Abstract: An RF front-end circuit of an RF transceiver is described herein. In accordance with one exemplary embodiment, the fronted circuit includes a local oscillator (LO) configured to generate an RF transmit signal, an RF output port coupled to the local oscillator, wherein the RF transmit signal is output at the RF output port, and a monitoring circuit receiving an input signal and configured to determine the phase of the input signal or the power of the input signal or both. A directional coupler is coupled to the RF output port and configured to direct a reflected signal incoming at the RF output port as input signal to the monitoring circuit, and a controller is configured to detect, based on the determined phase or power or both, a defect in a signal path operably connected to the RF output port.

Abstract: A semiconductor package includes a leadframe, a first transistor chip connected to a first island of the leadframe in a drain-down configuration, and a second transistor chip connected to a second island of the leadframe in the same drain-down configuration as the first transistor chip. The first and the second islands of the leadframe are mutually electrically isolated from one another. The first island includes an extension which extends beyond a perimeter of the first transistor chip in a direction towards the second island and overlaps the second transistor chip. The first transistor chip and the second transistor chip are electrically interconnected with one another via the extension of the first island and a first electric connection element electrically connecting the extension to the second transistor chip to form a half bridge circuit.

Abstract: A power semiconductor package includes a first group of semiconductor dies attached to a first side of a substrate and evenly distributed over a width of the substrate and a second group of semiconductor dies attached to the first side of the substrate and evenly distributed over the substrate width. Each die in the first and second groups has all terminals at one side which is attached to the first side of the substrate and an insulated or isolated face at a side opposite the side with the terminals. A first intermediary metal layer of the substrate forms a first DC terminal. A second intermediary metal layer of the substrate forms a second DC terminal. These intermediary metal layers are insulated from one another and form a parallel plate waveguide. Additional power semiconductor package embodiments are described.

Abstract: In accordance with an embodiment, a method of performing a measurement with a capacitive sensor includes generating a periodic excitation signal that includes a series of pulses and smoothing edge transitions of the series of pulses to form a shaped periodic excitation signal that includes a flat region between the smoothed edge transitions. The method further includes providing the shaped periodic excitation signal to a first port of the capacitive sensor and measuring a signal provided by a second port of the capacitive sensor.

Abstract: A device for determining an inverse of an initial value related to a modulus, comprising a unit configured to process an iterative algorithm in a plurality of iterations, wherein an iteration includes two modular reductions and has, as an iteration loop result, values obtained by an iteration loop of an extended Euclidean algorithm.

Abstract: Current sensors, systems and methods are provided. A test current is injected via a pair of force terminals into a conductor and a pair of sense terminals are configured to provide an input signal that corresponds to a voltage drop across the conductor. Based on the test current in the conductor and based on the input signal, a contribution to the voltage drop due to the test current and a contribution to the voltage drop due to a primary current through the conductor may be determined. In addition, at least one of a reference resistance of the conductor and the primary current in the conductor may be further determined.

Abstract: In accordance with an embodiment, a packaged radio frequency (RF) circuit includes a radio frequency integrated circuit (RFIC) disposed on a substrate that has plurality of receiver circuits coupled to receive ports at a first edge of the RFIC, and a first transmit circuit coupled to a first transmit port at a second edge of the RFIC. The packaged RF circuit also includes a receive antenna system disposed on the package substrate adjacent to the first edge of the RFIC and a first transmit antenna disposed on the package substrate adjacent to the second edge of the RFIC and electrically coupled to the first transmit port of the RFIC. The receive antenna system includes a plurality of receive antenna elements that are each electrically coupled to a corresponding receive port.

Abstract: A method of determining the carbon content in a silicon sample may include: generating electrically active polyatomic complexes within the silicon sample. Each polyatomic complex may include at least one carbon atom. The method may further include: determining a quantity indicative of the content of the generated polyatomic complexes in the silicon sample, and determining the carbon content in the silicon sample from the determined quantity.

Abstract: A magneto resistive device having a plurality of magneto resistive sensing elements. Each of the plurality of magneto resistive sensing elements has a free layer and a reference layer. The free layer has a rounded convex contour with an aspect ratio of 2 or greater. There may be one hundred or more magneto resistive sensing elements.

Abstract: A method of planarizing a roughened surface of a SiC substrate includes: forming a sacrificial material on the roughened surface of the SiC substrate, the sacrificial material having a density between 35% and 120% of the density of the SiC substrate; implanting ions through the sacrificial material and into the roughened surface of the SiC substrate to form an amorphous region in the SiC substrate; and removing the sacrificial material and the amorphous region of the SiC substrate by wet etching.

Abstract: A method which comprises applying a common pressing force operative to interconnect an electronic chip with a connector body by an interconnect structure, and to contribute to a forming of the connector body.

Abstract: An RF amplifier includes an amplifier chip on a flange having an input and an output comprising a parasitic capacitance and a parasitic inductance, a first chip capacitor coupled to the output of the output of the amplifier by a first plurality of bond wires, and a second chip capacitor coupled to the first chip capacitor by a second plurality of bond wires, and an output impedance matching network having an input coupled to the output of the second chip capacitor by a third plurality of bond wires, and an output, and a phase shift between the input and the output of less than 90 degrees, wherein the phase shift from the output of the amplifier chip to the output of the output impedance matching network is 180 degrees.

Abstract: A circuit to detect body diode conduction in a switch with an adaptive dead-time scheme for a switched mode power supply. The body-diode of a first switch entering conduction means the first switch is OFF and a second switch can be turned ON. The body diode conduction detector circuit (BDCD) uses relative analysis of the switching node voltage (VLX). The BDCD circuit acts as a voltage follower in a first phase and a comparator in a second phase. The BDCD circuit tracks VLX during the first phase and samples and holds VLX+VREF=VHOLD at the end of the first phase. During the second phase, the BDCD circuit compares VLX+VHOLD to VREF. When the body-diode of the first switch enters conduction VLX will become negative and VLX+VHOLD will drop below VREF, and toggle the logic level output of the comparator.

Abstract: A memory system having a flexible read reference is disclosed. The system includes a memory partition, a failcount component, and a controller. The memory partition includes a plurality of memory cells. The failcount component is configured to generate failcounts in response to read operations of the memory partition. The controller is configured to calibrate a reference value for the memory partition by utilizing the failcounts.

Abstract: A device for driving several light sources is provided, wherein the several light sources are arranged in a matrix structure; wherein the several light sources of the matrix structure are connected to a semiconductor device; wherein a portion of the semiconductor device corresponds to a light source of the matrix structure, wherein the portion of the semiconductor device comprises a diagnosis function which when activated is arranged for supplying an output diagnosis signal.

Abstract: In accordance with an embodiment, a radio frequency (RF) amplifier circuit includes a switchable capacitance circuit having a first terminal configured to be coupled to an input matching inductor. The switchable capacitance circuit is configured to provide a short circuit between the first and second terminals in a first state, and provide a first capacitive impedance between the first and second terminals in a second state. The RF amplifier also includes a low noise amplifier (LNA) having an input terminal coupled to the second terminal of the switchable capacitance circuit; and a bypass switch coupled to an output of the LNA, the second terminal of the switchable capacitance circuit, and an output of the RF amplifier circuit. The bypass switch is configured to select the output of LNA in the first state, and select the second terminal of the switchable capacitance circuit in the second state.

Abstract: A circuit includes an RF oscillator coupled in a phase-locked loop. The phase-locked loop is configured to receive a digital input signal, which is a sequence of digital words, and to generate a feedback signal for the RF oscillator based on the digital input signal. The circuit further includes a digital-to-analog conversion unit that includes a pre-processing stage configured to pre-process the sequence of digital words and a digital-to-analog-converter configured to convert the pre-processed sequence of digital words into the analog output signal. The circuit includes circuitry configured to combine the analog output signal and the feedback signal to generate a control signal for the RF oscillator. The pre-processing stage includes a word-length adaption unit configured to reduce the word-lengths of the digital words and a sigma-delta modulator coupled to the word-length adaption unit downstream thereof and configured to modulate the sequence of digital words having reduced word-lengths.