Abstract: A method of welding includes providing first and second joining partners, providing a welding apparatus that includes a sonotrode comprising a structured working surface, arranging the first and second joining partners to contact one another, and forming a welded connection between the first and second joining partners by contacting the first joining partner with the structured working surface and vibrating the sonotrode at an ultrasonic frequency, wherein the structured working surface comprises a plurality of apexes, a plurality of nadirs between immediately adjacent ones of the apexes, and planar sidewalls that extend between the nadirs and the apexes, and wherein for each of the apexes the planar sidewalls on either side of the respective apex extend along first and second planes that intersect one another at an acute angle.

Abstract: The present disclosure relates to a concept for detecting radar targets. A plurality of first receive signals is received from first antennas of an antenna array. A first combined range-Doppler map is determined by combining range-Doppler maps of each of the first antennas. First confirmable range-Doppler cells of the first combined range-Doppler map are determined which match a predetermined confirmation criterion. A plurality of second receive signals is received from second antennas of the antenna array. A second combined range-Doppler map is determined by combining range-Doppler maps of each of the second antennas. Second confirmable range-Doppler cells of the second combined range-Doppler map are determined which match the predetermined confirmation criterion. The first and second confirmable range-Doppler cells are combined to obtain a set of confirmable range-Doppler cells.

Abstract: A semiconductor package includes a first semiconductor die, an encapsulant body of electrically insulating mold compound that encapsulates the first semiconductor die, a plurality of power leads that protrude out of the encapsulant body and form power connections with the first semiconductor die, and a signal lead that protrudes out of the encapsulant body and forms a signal connection with the first semiconductor die, wherein the signal lead comprises a lead adapter retention feature that is configured to form an interlocked connection with a lead adapter that is fitted over an outer end of the signal lead.

Abstract: A package includes: an electronic component that includes a dielectric layer as a base and a semiconductor die attached on top of the dielectric layer, the semiconductor die having an active area with monolithically integrated circuit elements; and an encapsulant encapsulating the dielectric layer and the semiconductor die. The encapsulant is a mold compound having different material properties than the dielectric layer. A method of manufacturing package is also described.

Abstract: A package is disclosed. In one example, the package comprises a carrier, an electronic component mounted on the carrier, an encapsulant comprising not more than 0.1 weight percent, in relation to an entire weight of the encapsulant, of electrically conductive particles. The encapsulant at least partially encapsulates the electronic component and the carrier. A further encapsulant is provided covering an exterior surface of at least part of the encapsulant and having a larger amount of electrically conductive material than the encapsulant.

Abstract: A circuit arrangement has a chip arrangement in the form of an embedded Wafer Level Ball Grid Array (eWLB) arrangement with solder contacts on one side and a thermal interface on a side of the chip arrangement facing away from the solder contacts which is designed to dissipate heat from the semiconductor chip. In examples, the thermal interface has a thermally and electrically conductive material, wherein in a top view of the chip arrangement, a contact area in which the thermally and electrically conductive material is in thermal contact with the chip arrangement is limited to the fan-out area. In examples, the thermal interface has at least one RF absorption layer which is designed to absorb electromagnetic radiation at an operating frequency of the semiconductor chip.

Abstract: A method and apparatus are provided. In an example, a volume portion of the solid body is exposed to light waves of different wavelengths, wherein the light waves are partly reflected at surfaces of the solid body. Light parameters of the reflected light waves are at least partly acquired using a sensor device. Distance information and/or intensity information are/is ascertained from at least a portion of the acquired light parameters. A thickness and/or a transmittance of the solid body in the volume portion are/is determined based upon the distance information and/or the intensity information. Laser radiation is introduced into the volume portion to produce a modification in the interior of the solid body, wherein at least one laser parameter of the laser radiation is set at least depending on the thickness and/or the transmittance such that the modification is at a predefined distance from a surface of the solid body.

Abstract: A method of producing a semiconductor device includes forming a plurality of transistor cells in a SiC substrate and electrically connected in parallel to form a transistor having a specified operating temperature range. Forming each transistor cell includes forming a gate structure having a gate electrode, and a gate dielectric stack separating the gate electrode from the SiC substrate and including a ferroelectric insulator. The method further includes doping the ferroelectric insulator with a doping material such that the Curie temperature of the ferroelectric insulator is in a range above the specified operating temperature range of the transistor.

Abstract: A semiconductor device includes a silicon carbide (SiC) drift zone over a SiC field stop zone and/or a SiC semiconductor substrate. A concentration of Z1/2 defects in the SiC drift zone is at least one order of magnitude smaller than in the SiC field stop zone and/or the SiC semiconductor substrate. Separately or in combination, a concentration of Z1/2 defects in a part of the SiC drift zone is at least one order of magnitude smaller than in another part of the drift zone.

Abstract: A semiconductor device includes a semiconductor substrate having a first dopant and a second dopant. A covalent atomic radius of a material of the semiconductor substrate is i) larger than a covalent atomic radius of the first dopant and smaller than a covalent atomic radius of the second dopant, or ii) smaller than the covalent atomic radius of the first dopant and larger than the covalent atomic radius of the second dopant. The semiconductor device further includes a semiconductor layer on the semiconductor substrate and semiconductor device elements in the semiconductor layer. A vertical concentration profile of the first dopant decreases along at least 80% of a distance between an interface of the semiconductor substrate and the semiconductor layer to a surface of the semiconductor substrate opposite to the interface.

Abstract: A security hardware device is configured to secure a control apparatus. The security hardware device includes a data security domain; a functional safety domain; a data security processor provided in the data security domain and is configured to secure data from unauthorized access or manipulation; a functional safety processor provided in the functional safety domain and is configured to detect functional errors and generate respective safety alerts in response to detecting the functional errors; and a monitoring processor configured to analyze the respective safety alerts provided by the functional safety processor for at least one pattern of safety alerts indicative of a security attack and generate a response signal in response to the respective safety alerts having at least one of the at least one pattern of safety alerts.

Abstract: The innovative concept described herein relates to a sensor chip having at least two magnetic field sensors that are arranged adjacently to one another on the sensor chip and measure perpendicularly to the chip plane, wherein at least one of the magnetic field sensors has a planar coil arranged on it that is configured to generate a magnetic field directed perpendicularly to the chip plane. A controller is able to operate the magnetic field sensors in a calibration mode, in which the planar coil generates the magnetic field. For the purpose of calibrating the magnetic field sensors, a differential measurement may be taken that involves the response signal from one magnetic field sensor being subtracted from the response signal from the other magnetic field sensor.

Abstract: An ultrasonic touch sensor includes a touch structure configured to receive a touch; a transmitter configured to transmit an ultrasonic transmit wave toward the touch structure; a receiver configured to receive ultrasonic reflected waves produced by a plurality of reflections of the ultrasonic transmit wave and generate a measurement signal representative of the ultrasonic reflected waves; and a measurement circuit configured to: acquire a first plurality of digital samples of the measurement signal during a first observation window that corresponds to a first ultrasonic reflected wave produced by a reflection of the ultrasonic transmit wave at the touch interface, acquire a second plurality of digital samples of the measurement signal during a second observation window that is subsequent in time to the first observation window, and determine whether a no-touch event or a touch event has occurred based on the first and the second plurality of digital samples.

Abstract: According to various embodiments, a radar system is described comprising a radar receiver configured to receive radio signals, wherein each radio signal is associated with a channel of a plurality of channels, a peak detector configured to perform peak detection using the received radio signals, wherein each detected peak corresponds to a detected object and a direction of arrival estimator configured to, for a detected peak, generate a vector having, for each of the channels, an entry specifying a Doppler Fourier transform result for the channel, supply the vector to a machine learning model trained to output, for each of one or more additional channels, an entry specifying a predicted Doppler Fourier transform result corresponding to the additional channel and perform direction-of-arrival estimation using an output from the machine learning model which the machine learning model outputs in response to being supplied with the vector.

Abstract: A gate driver circuit includes a pulse generator that receives an input signal and generates a pulse signal in response to a switch-on command included in the input signal. The pulse signal has a pulse with a pulse length that is dependent on a level of a pulse control signal. The circuit further includes a sampling circuit that samples an output voltage subsequent to the pulse and stores a respective sampled value, and a controller that receives the sampled value of the output voltage and a reference voltage and updates the level of the pulse control signal based on the sampled value and the reference voltage. A driver circuit generates the output voltage based on the pulse signal.

Abstract: In accordance with an embodiment, a method includes: generating a gate voltage for a field-effect transistor in response to an input signal; generating a pulse signal with a pulse length that corresponds to the time that it takes until the gate voltage attains a specific level transition in response to a corresponding level transition in the input signal; and monitoring the pulse signal to detect whether the pulse length is outside a specific range.

Abstract: A package and method of manufacturing a package is disclosed. In one example, a package which comprises a first transistor chip having a first source pad and a second transistor chip having a second source pad and being stacked with the first transistor chip at an interface area. The first source pad and the second source pad are coupled at the interface area.

Abstract: A method of manufacturing a semiconductor device includes: forming grooves in a front side surface of a wafer; filling the grooves with a first side face protection material; thinning the wafer at a backside surface of the wafer opposite the front side surface; depositing a backside metallization layer over the backside surface of the thinned wafer; and laser cutting along the grooves through the side face protection material and through the backside metallization layer to separate the wafer into multiple semiconductor devices.

Abstract: Some embodiments relate to a magnetoresistive sensor element comprising a magnetoresistive strip. The magnetoresistive strip includes a first linear segment, and a second linear segment arranged in series with the first linear segment. The second linear segment adjoins the first linear segment at a first inner corner corresponding to a first obtuse angle having a first magnitude. The magnetoresistive strip also includes a third linear segment arranged in series with the first and second linear segments, and a fourth linear segment arranged in series with the first, second, and third linear segments. The fourth linear segment adjoins the third linear segment at a second inner corner corresponding to a second obtuse angle having a second magnitude. Te second magnitude differs from the first magnitude.

Abstract: A package is disclosed. In one example, the package includes a first main face for mounting a heat sink and an opposing second main face for being mounted on a mounting base. The package comprises a carrier, an electronic component mounted at the carrier, and an encapsulant encapsulating at least part of the electronic component and at least part of the carrier. Electrically insulating material covers electrically conductive material of the carrier at said first main face. The encapsulant comprises at least one step at the first main face.