Patents Assigned to Infineon Technologies AG
  • Patent number: 10325803
    Abstract: According to various embodiments, a semiconductor wafer may include: a semiconductor body including an integrated circuit structure; and at least one tetrahedral amorphous carbon layer formed at least one of over or in the integrated circuit structure, the at least one tetrahedral amorphous carbon layer may include a substance amount fraction of sp3-hybridized carbon of larger than approximately 0.4 and a substance amount fraction of hydrogen smaller than approximately 0.1.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Matthias Kuenle, Gerhard Schmidt, Martin Sporn, Markus Kahn, Juergen Steinbrenner, Ravi Joshi
  • Patent number: 10325996
    Abstract: A semiconductor device is produced by providing a semiconductor substrate, forming an epitaxial layer on the semiconductor substrate, and introducing dopant atoms of a first doping type and dopant atoms of a second doping type into the epitaxial layer.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Franz Hirler, Anton Mauder, Helmut Strack, Frank Kahlmann, Gerhard Miller
  • Patent number: 10326159
    Abstract: A battery, a battery element and a method for forming a battery element are provided. In an embodiment, a battery element includes a substrate with a plurality of trenches extending into the substrate, wherein a part of a trench of the plurality of trenches is filled with a solid state battery structure, and wherein the trench of the plurality of trenches comprises a cavity.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Marko Lemke, Peter Brockhaus, Jirko Lohse
  • Patent number: 10325809
    Abstract: A method for splitting a semiconductor wafer includes incorporating hydrogen atoms into at least a splitting region of a semiconductor wafer. The splitting region includes a concentration of nitrogen atoms higher than 1ยท1015 cm?3. The method further includes splitting the semiconductor wafer at the splitting region of the semiconductor wafer.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: June 18, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Hans-Joachim Schulze, Martin Faccinelli, Johannes Georg Laven
  • Patent number: 10323962
    Abstract: A magnetic circuit may include a magnetic sensor. The magnetic sensor may determine an adjustment factor associated with calculating a variable switching threshold. The variable switching threshold may be a configurable switching threshold based on which the magnetic sensor provides outputs associated with a speed signal corresponding to a rotation of a tooth wheel. The magnetic sensor may provide an output, associated with the speed signal, based on the variable switching threshold.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Klaus Grambichler, Tobias Werth, Simon Hainz
  • Patent number: 10326434
    Abstract: In various embodiments, an electronic component is provided. The electronic component may include a supply bus configured to provide a supply voltage for an electronic circuit. The electronic component may further include a voltage-controlled oscillator, which is coupled to the supply bus and is configured to generate a clock signal with a clock frequency according to the supply voltage. The electronic component may further include at least one reference oscillator, which is configured to generate a reference clock signal with a reference clock frequency, and a comparator, which is coupled to the voltage-controlled oscillator and the at least one reference oscillator and is configured to compare the clock signal with the reference clock signal and, on the basis of the comparison, either to output the clock signal to the electronic circuit or to suppress it.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: June 18, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Walter Kargl, Albert Missoni
  • Patent number: 10326456
    Abstract: Methods and devices are discussed where a plurality of input signals having different phases are provided. From the input signals, a plurality of signal pairs are selected, and intermediate signals are generated based on the signal pairs. The intermediate signals are then combined.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventor: Werner Grollitsch
  • Patent number: 10325838
    Abstract: A method of fabricating a semiconductor device is disclosed. In one aspect, the method includes placing a first semiconductor chip on a carrier with the first main surface of the first semiconductor chip facing the carrier. A first layer of soft solder material is provided between the first main surface and the carrier. Heat is applied during placing so that a temperature at the first layer of soft solder material is equal to or higher than a melting temperature of the first layer of soft solder material. A second layer of soft solder material is provided between the first contact area and the second main surface. Heat is applied during placing so that a temperature at the second layer of soft solder material is equal to or higher than a melting temperature of the second layer of soft solder material. The first and second layers of soft solder material are cooled to solidify the soft solder materials.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Abdul Rahman Mohamed, Chu Hua Goh
  • Patent number: 10325837
    Abstract: A semiconductor package includes a semiconductor die embedded in a molded package body, leads electrically connected to the die and protruding from a side face of the molded package body, and a recess extending inward from the side face and into a bottom main face of the molded package body to forma single groove. The recess begins below a region of the side face from which the leads protrude, so that this region of the side face is flat and each of the leads exits the molded package body in the same plane. A first subset of the leads is bent inward towards the molded package body and seated in the single groove, to form a first row of leads configured for surface mounting. A second subset of the leads extends outward from the molded package body, to form a second row of leads configured for surface mounting.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Cher Hau Danny Koh, Hai Sin Chong, Stefan Machiener, Yong Chern Poh, Toni Salminen, Khay Chwan Saw
  • Patent number: 10324143
    Abstract: In various embodiments, a Hall sensor arrangement for the redundant measurement of a magnetic field may include a first Hall sensor on a top side of a first semiconductor substrate; a second Hall sensor on a top side of a second semiconductor substrate; a carrier having a top side and an underside; wherein the first Hall sensor is arranged on the top side of the carrier and the second Hall sensor is arranged on the underside of the carrier; and wherein the measuring area of the first Hall sensor projected perpendicularly onto the carrier at least partly overlaps the measuring area of the second Hall sensor projected perpendicularly onto the carrier.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Berthold Astegher, Helmut Wietschorke
  • Patent number: 10322481
    Abstract: A structure for fixing a membrane to a carrier including a carrier; a suspended structure; and a holding structure with a rounded concave shape which is configured to fix the suspended structure to the carrier and where a tapered side of the holding structure physically connects to the suspended structure is disclosed. A method of forming the holding structure on a carrier to support a suspended structure is further disclosed. The method may include: forming a holding structure on a carrier; forming a suspended structure on the holding structure; shaping the holding structure such that it has a concave shape; and arranging the holding structure such that a tapered side of the holding structure physically connects to the suspended structure.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: June 18, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Alfons Dehe, Reinhard Gabl, Ulrich Krumbein
  • Patent number: 10325804
    Abstract: In accordance with an embodiment of the present invention, a method of fabricating a semiconductor device includes forming openings partially filled with a sacrificial material, where the openings extend into a semiconductor substrate from a first side. A void region is formed in a central region of the openings. An epitaxial layer is formed over the first side of the semiconductor substrate and the openings, where the epitaxial layer covers the void region. From a second side of the semiconductor substrate opposite to the first side, the semiconductor substrate is thinned to expose the sacrificial material. The sacrificial material in the openings is removed and the epitaxial layer is exposed. A conductive material is deposited on the exposed surface of the epitaxial layer.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: June 18, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Oliver Hellmund, Johannes Baumgartl, Iris Moder, Ingo Muri, Thomas Christian Neidhart, Hans-Joachim Schulze
  • Patent number: 10326009
    Abstract: A power semiconductor transistor includes a trench extending into a semiconductor body along a vertical direction and having first and second trench sidewalls and a trench bottom, an electrode in the trench electrically insulated from the semiconductor body, drift and source regions of a first conductivity type, a semiconductor channel region of a second conductivity type laterally adjacent the first trench sidewall and separating the source and drift regions, and a guidance zone. The guidance zone includes a bar section of the second conductivity type extending along the second trench sidewall or along a sidewall of another trench in the vertical direction to a depth in the semiconductor body deeper than the trench bottom, and a plateau section of the second conductivity type adjoining the bar section and extending under the trench bottom towards the semiconductor channel region. The plateau section has at least one opening below the channel region.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Anton Mauder, Franz-Josef Niedernostheide, Christian Philipp Sandow
  • Publication number: 20190178848
    Abstract: A system for examining semiconductor substrates may comprise an indenter configured to exercise a force onto the semiconductor substrate such that a crack in the semiconductor substrate occurs, a piezoelectric acoustic emission sensor configured to detect an acoustic signal emitted by the crack, and attaching means configured to fasten the indenter to a first surface of the piezoelectric acoustic emission sensor. The indenter and the attaching means are configured to transmit the acoustic signal to the piezoelectric acoustic emission sensor. The resonance frequencies of the indenter and the piezoelectric acoustic emission sensor are attuned to one another.
    Type: Application
    Filed: December 6, 2018
    Publication date: June 13, 2019
    Applicant: Infineon Technologies AG
    Inventors: Oliver Nagler, Sebastian Bernrieder, Marianne Unterreitmeier
  • Publication number: 20190181839
    Abstract: In accordance with an embodiment, a method of operating an RF system includes filtering a first wideband RF signal using a wideband filter bank. Filtering the first RF signal includes separating the first wideband RF signal into frequency cluster signals, where each frequency cluster signal of the frequency cluster signals includes different frequency ranges, the first wideband RF signal includes multiple RF bands, and each of the different frequency ranges comprises a plurality of RF bands of the multiple RF bands. The method further includes band stop filtering at least one of the frequency cluster signals to produce a band stopped frequency cluster signal.
    Type: Application
    Filed: December 5, 2018
    Publication date: June 13, 2019
    Applicant: Infineon Technologies AG
    Inventors: Ruediger Bauder, Hans-Joerg Timme, Stefan Helmut Schmalzl, Peter Pfann
  • Publication number: 20190181902
    Abstract: An RF front-end circuit of an RF transceiver is described herein. In accordance with one exemplary embodiment, the fronted circuit includes a local oscillator (LO) configured to generate an RF transmit signal, an RF output port coupled to the local oscillator, wherein the RF transmit signal is output at the RF output port, and a monitoring circuit receiving an input signal and configured to determine the phase of the input signal or the power of the input signal or both. A directional coupler is coupled to the RF output port and configured to direct a reflected signal incoming at the RF output port as input signal to the monitoring circuit, and a controller is configured to detect, based on the determined phase or power or both, a defect in a signal path operably connected to the RF output port.
    Type: Application
    Filed: February 7, 2019
    Publication date: June 13, 2019
    Applicant: Infineon Technologies AG
    Inventors: Helmut KOLLMANN, Jochen O. SCHRATTENECKER, Florian STARZER
  • Publication number: 20190178740
    Abstract: A pressure measuring arrangement is proposed. The pressure measuring arrangement includes a first MEMS pressure sensor arranged on a carrier, and also a second MEMS pressure sensor arranged on the carrier. Furthermore, the pressure measuring arrangement includes an integrated circuit arranged on the carrier, the integrated circuit being coupled to the first MEMS pressure sensor and the second MEMS pressure sensor.
    Type: Application
    Filed: December 7, 2018
    Publication date: June 13, 2019
    Applicant: Infineon Technologies AG
    Inventor: Dirk HAMMERSCHMIDT
  • Patent number: 10318245
    Abstract: A device for determining an inverse of an initial value related to a modulus, comprising a unit configured to process an iterative algorithm in a plurality of iterations, wherein an iteration includes two modular reductions and has, as an iteration loop result, values obtained by an iteration loop of an extended Euclidean algorithm.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: June 11, 2019
    Assignee: Infineon Technologies AG
    Inventor: Wieland Fischer
  • Patent number: 10319631
    Abstract: A power semiconductor package includes a first group of semiconductor dies attached to a first side of a substrate and evenly distributed over a width of the substrate and a second group of semiconductor dies attached to the first side of the substrate and evenly distributed over the substrate width. Each die in the first and second groups has all terminals at one side which is attached to the first side of the substrate and an insulated or isolated face at a side opposite the side with the terminals. A first intermediary metal layer of the substrate forms a first DC terminal. A second intermediary metal layer of the substrate forms a second DC terminal. These intermediary metal layers are insulated from one another and form a parallel plate waveguide. Additional power semiconductor package embodiments are described.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: June 11, 2019
    Assignee: Infineon Technologies AG
    Inventor: Reinhold Bayerer
  • Patent number: D851611
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventor: Dorian Kurz