Abstract: An illumination device is provided. The illumination device includes a light source and a current path configured to transport a supply current to the light source. Further, the illumination device includes a sensor configured to contactlessly measure a current strength of the supply current in the current path and to output a measurement signal indicative of the measured current strength. The illumination device additionally includes processing circuitry coupled to the sensor and configured to determine the optical output power of the light source based on the measured current strength indicated by the measurement signal.

Abstract: A scanning system includes a transmitter, a scanning structure, and a controller. The transmitter is configured to transmit a frequency modulated continuous wave (FMCW) light beam that includes a plurality of frequency ramps including up-chirps and down-chirps that are matched into up-down chirp pairs. The scanning structure is configured to oscillate about a scanning axis such that a deflection angle of the scanning structure continuously varies over time in an angular range between two maximum deflection angles. The controller is configured to segment the angular range into a plurality of sub-angular ranges and assign each up-down chirp pair to a different sub-angular range of the plurality of sub-angular ranges. Each up-down chirp pair includes an up-chirp transmitted in an assigned sub-angular range during a first scanning movement of the scanning structure and a down-chirp transmitted in the assigned sub-angular range during a second scanning movement of the scanning structure.

Abstract: A semiconductor package includes a first semiconductor die, a first group of leads that each comprise an interior end, and an encapsulant body of electrically insulating material that encapsulates the semiconductor die and the interior ends of the leads from the first group, wherein a gap is disposed between outer sidewalls of two immediately adjacent ones of the leads from the first group, wherein the first semiconductor die is mounted on the first group of leads such that a lower surface of the first semiconductor die faces and overlaps with each of the leads from the first group, and wherein the lower surface of the first semiconductor die extends across the gap between outer sidewalls of two immediately adjacent ones of the leads from the first group.

Abstract: A multi-voltage domain device includes a semiconductor layer including a first main surface, a second main surface arranged opposite to the first main surface, a first region including first circuitry that operates in a first voltage domain, a second region including second circuitry that operates in a second voltage domain different than the first voltage domain, and an isolation region that electrically isolates the first region from the second region in a lateral direction that extends parallel to the first and the second main surfaces. The isolation region includes at least one deep trench isolation barrier, each of which extends vertically from the first main surface to the second main surface. The multi-voltage domain device further includes at least one first capacitor configured to generate an electric field laterally across the isolation region between the first region and the second region.

Abstract: A photodetector device includes a photodetector array comprising an array of photodetectors and a plurality of metal structures arranged between photodetectors of the array of photodetectors, wherein the plurality of metal structures are arranged in a first pattern; and a transparent substrate comprising a plurality of diffusion structures being patterned according to a second pattern that matches the first pattern. Each diffusion structure of the plurality of diffusion structures is configured to redirect light that is incident thereon. Additionally, the transparent substrate and the photodetector array are coupled together such that the first pattern is aligned with the second pattern and the plurality of diffusion structures covers the plurality of metal structures.

Abstract: Monitoring devices for battery systems, battery systems and corresponding methods are provided. A monitoring device can communicate via a first interface with a control device. The monitoring device can communicate with a security device via a second interface in a first operating mode, and can communicate with a temperature sensor in a second operating mode of the second interface.

Abstract: A tunnel magnetoresistance (TMR) sensing element includes a layer stack having a tantalum-nitride (TaN) layer; a reference layer system; a magnetic free layer having a magnetically free magnetization; and a tunnel barrier layer arranged between the reference layer system and the magnetic free layer. The reference layer system includes a pinned layer having a fixed pinned magnetization; a reference layer having a having a fixed reference magnetization; a coupling interlayer arranged between the pinned layer and the reference layer; and a natural antiferromagnetic (NAF) layer comprising iridium-manganese (IrMn), wherein the NAF layer is formed in direct contact with the TaN layer, wherein the NAF layer is configured to hold the fixed pinned magnetization in a first magnetic orientation and hold the fixed reference magnetization in a second magnetic orientation, and wherein the direct contact of the NAF layer with the TaN layer increases a blocking temperature of the NAF layer.

Abstract: A radar system includes a first integrated radar circuit having a plurality of first transmission paths and a local oscillator configured to generate a local oscillator signal. The first integrated radar circuit has a first terminal configured to output an oscillation signal based on the local oscillator signal. The radar system includes a second integrated radar circuit having a second transmission path and a second terminal. The radar system includes a partially reflective element coupled to the first terminal via a first line section and to the second terminal via a second line section. The partially reflective element is configured to reflect back a first portion of the oscillation signal as a reflected signal via the first line section to the first terminal and to pass on a second portion of the oscillation signal as a forward signal via the second line section to the second terminal.

Abstract: An ultrasonic touch sensor includes a touch structure configured to receive a touch; a transmitter arrangement configured to transmit one or more ultrasonic transmit waves toward the touch structure; a receiver arrangement configured to receive ultrasonic reflected waves produced by reflections of the one or more ultrasonic transmit waves and generate a plurality of measurement signals representative of the ultrasonic reflected waves; and a measurement circuit configured to measure a degree of variation of a plurality of measurement signals, compare the degree of variation with a detection threshold, and determine whether a no-touch event or a touch event has occurred at the touch structure based on whether the degree of variation satisfies the detection threshold.

Abstract: A semiconductor package includes a power semi conductor chip comprising SiC, a leadframe part including Cu, wherein the power semiconductor chip is arranged on the leadframe part, and a solder joint electrically and mechanically coupling the power semiconductor chip to the leadframe part, wherein the solder joint includes at least one intermetallic phase.

Abstract: A method of processing a semiconductor wafer includes: forming an electronic device at each die location of the semiconductor wafer; partially forming a frontside metallization over a frontside of the semiconductor wafer at each die location; partially forming a backside metallization over a backside of the semiconductor wafer at each die location; and after partially forming both the frontside metallization and the backside metallization but without completing either the frontside metallization or the backside metallization, singulating the semiconductor wafer between the die locations to form a plurality of individual semiconductor dies, wherein the partially formed frontside metallization and the partially formed backside metallization have a same composition. Semiconductor dies and methods of producing semiconductor modules are also described.

Abstract: A method for forming a semiconductor substrate arrangement includes: forming a mask on a semiconductor substrate, the semiconductor substrate including and a metallization layer arranged on an insulation layer, the metallization layer arranged between the mask and insulation layer; forming a layer of electrically conductive coating on the metallization layer, the electrically conductive coating formed in at least one opening of the mask on regions of the metallization layer that are not covered by the mask; and after forming the electrically conductive coating, removing the mask. Forming the mask includes either applying an even layer of material on the metallization layer, or applying the material of the mask on the metallization layer such that the thickness of the mask in a region adjacent to edges of the mask is greater than the thickness of the regions of the mask further away from the edges.

Abstract: A chuck for a laser beam wafer dicing equipment includes a wafer support plate having an upper surface for holding a wafer disposed on a dicing tape. The upper surface includes a topographically structured surface region that partly or completely overlaps an edge of the wafer when the wafer disposed on the dicing tape is placed on the upper surface. The topographically structured surface region provides for a reduction in an area of contact between the upper surface and the dicing tape.

Abstract: A semiconductor package includes: a semiconductor die attached to a leadframe and having a first bond pad at a side of the semiconductor die facing away from the leadframe; a metal clip having a first bonding region attached to the first bond pad of the semiconductor die by a plurality of first wire bonds which extend through a plurality of first openings in the first bonding region of the metal clip, the plurality of first wire bonds forming a joint between the metal clip and the first bond pad of the semiconductor die; and a joint between the plurality of first wire bonds and the metal clip at a side of the metal clip facing away from the semiconductor die. Additional semiconductor package embodiments and related methods of manufacture are also described.

Abstract: A resolver-to-digital converter, comprising: a feedback (FB) filter chain loop having a state observer configured to estimate a rotation speed and a rotation angle of an object, based on a pair of input sine and cosine signals that are amplitude-modulated (AM) to correspond with the rotation angle of the object; and a feedforward (FF) filter chain path configured to estimate the rotation speed of the object based on the pair of input sine and cosine signals, wherein the state observer of the FB filter chain loop is further configured to offset the estimated rotation speed of the FB filter chain loop with the estimated rotation speed of the FF filter chain path to decrease a settling time of the estimated rotation angle.

Abstract: Methods and apparatus are provided for adapting gain elements in digital filter chains. In one example, a digital filter chain includes a first digital filter and a second digital filter having an input coupled to an output of the first digital filter. A common gain is applied to signal samples passing between the first digital filter and the second digital filter, the common gain corresponding to a product of an output gain associated with the first digital filter and an input gain associated with the second digital filter. In another example, a digital filter includes an adjustable input gain element and an adjustable output gain element. The adjustable input gain element is configured to apply a gain value to an input signal sample, the gain value comprising a resultant difference of a bitshift configured for the digital filter and a bitwidth extension value. The adjustable output gain element is configured to apply an opposite of the gain value to an output signal sample.

Abstract: A gas sensor includes a hollow space, a gas permeation structure which is arranged between the hollow space and the exterior space and contains a selectively gas-permeable element, wherein the hollow space is hermetically sealed with the exception of the gas permeation structure, and one or more sensor elements which are configured for detecting the presence of one or more gases in the hollow space.

Abstract: Memory devices and methods for operating the same are provided. Generally, the device includes an array of multibit-memory-cells, each operable to store multiple bits in separate locations of a charge-trapping layer, and control-circuitry coupled to the array. The control-circuitry is operable read 1st and 2nd bit values of each cell individually based on generated first and second sensed currents, where the first and second sensed currents correspond to charges trapped in first and second bit locations. The control-circuitry executes an algorithm based on the first and second sensed currents and determines a logic state of the cell. In one embodiment, the control-circuitry averages the sensed currents, and compares this to a reference current to determine the logic state. In another, the 2nd bit value is a complement of the 1st, and the control-circuitry compares the currents to determine the logic state without use of a reference current.

Abstract: A microelectromechanical system (MEMS) device contains a movable MEMS structure, a first support structure in which an edge of the MEMS structure is attached, a cavity which is bounded by the MEMS structure and the first support structure, and a second support structure which is attached in the cavity and at the edge of the MEMS structure and is configured so as to support the edge of the MEMS structure mechanically.

Abstract: In accordance with an embodiment, a circuit includes: a first super source follower; a compensation circuit having a compensating node configured to provide a voltage of opposite phase of a voltage of an internal node of the first super source follower; and a first compensation capacitor coupled between an input of the first super source follower and the compensating node of the compensation circuit.