Patents Assigned to INFINEON
  • Publication number: 20250157869
    Abstract: An encapsulant for an electronic package is disclosed. In one example, the encapsulant comprises at least one organic constituent, and at least one inorganic constituent. A difference between the relative dielectric constant of the at least one organic constituent and the relative dielectric constant of the at least one inorganic constituent divided by the relative dielectric constant of the at least one organic constituent has an absolute value of not more than 0.2.
    Type: Application
    Filed: September 27, 2024
    Publication date: May 15, 2025
    Applicant: Infineon Technologies AG
    Inventors: Patrick SCHRÖDL, Michael BAUER, Timo BOHNENBERGER, Stefan PELTIES
  • Patent number: 12302064
    Abstract: A method of operating a microelectromechanical system (MEMS) includes, in a first operational mode, converting an analog output of the MEMS into a first internal data stream and a first external data stream having a first sampling rate; transitioning from the first operational mode to a second operation mode without restarting the MEMS; and in the second operational mode, converting the analog output of the MEMS into a second internal data stream having a second sampling rate different from the first sampling rate, and performing a sampling rate conversion of the second internal data stream to generate a second external data stream.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventors: Dietmar Straeussnigg, Daniel Neumaier
  • Patent number: 12301218
    Abstract: A radio frequency (RF) switch includes a switchable RF path including a plurality of transistors coupled in series; a gate bias network including a plurality of resistors, wherein the gate bias network is coupled to each of the plurality of transistors in the switchable RF path; and a bypass network including a first plurality of transistors coupled in parallel to each of the plurality of transistors in the switchable RF path and a second plurality of transistors coupled in parallel to each of the plurality of resistors in the gate bias network.
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventors: Semen Syroiezhin, Valentyn Solomko, Matthias Voelkel, Aleksey Zolotarevskyi
  • Patent number: 12300759
    Abstract: A method of manufacturing a micro-light-emitting diode display includes processing a wafer to form a plurality of functional chips integral with the wafer. A plurality of wafer tiles is defined in the wafer, wherein each wafer tile is composed of a cluster of functional chips. The wafer tiles are singulated by wafer dicing. A plurality of separate wafer tiles is bonded to a semiconductor wafer by hybrid bonding. The functional chips are singulated together with chips of the semiconductor wafer by dicing the bonded-together wafer tiles and semiconductor wafer.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventors: Frank Singer, Oliver Hellmund, Brendan Holland, Matthias Sperl
  • Patent number: 12300724
    Abstract: A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body, the trench structure having a gate electrode that is dielectrically insulated from the semiconductor body, a shielding region adjoining a bottom of the trench structure and forming a first pn junction with a drift structure of the semiconductor body, a body region forming a second pn junction with the drift structure, a source zone arranged between the first surface and the body region and forming a third pn junction with the source zone, wherein a contact portion of the body region extends to the first surface, wherein the source zone surrounds the contact portion of the body region at the first surface, and wherein the trench structure forms an enclosed loop at the first surface that surrounds the source zone and the contact portion of the body region at the first surface.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Caspar Leendertz, Anton Mauder, Roland Rupp
  • Patent number: 12300874
    Abstract: A semiconductor device comprises a semiconductor chip comprising a radio frequency (RF) circuit, a feedline structure coupled to the RF circuit, and an antenna structure comprising a main body stretching along a direction orthogonal to at least one side of a front side and a backside of the semiconductor device, wherein the antenna structure is coupled to the RF circuit through the feedline structure.
    Type: Grant
    Filed: October 12, 2023
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventors: Eung San Cho, Ashutosh Baheti, Saverio Trotta
  • Patent number: 12302619
    Abstract: A method for producing a silicon carbide component includes forming a silicon carbide layer on an initial wafer, wherein the silicon carbide layer comprises a doping region to be produced, forming an electrically conductive contact structure on the surface of the silicon carbide layer, the electrically conductive contact structure, producing a splitting region by pre-damaging the splitting region, wherein the splitting region is produced by laser treating the splitting region before forming the electrically conductive contact, splitting the silicon carbide layer or the initial wafer along the splitting region such that a silicon carbide substrate of the silicon carbide component to be produced is split off, wherein the silicon carbide substrate has a thickness of more than 30 ?m, wherein the doping region extends to a surface of the silicon carbide layer before splitting the silicon carbide layer, and wherein splitting along comprises applying a polymer film.
    Type: Grant
    Filed: June 12, 2023
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventors: Roland Rupp, Ronny Kern
  • Patent number: 12300654
    Abstract: A semiconductor device and a method of manufacturing a semiconductor are provided. In an embodiment, a method of manufacturing a semiconductor device is provided. A first surface of a metal silicide layer may be treated with an oxidizing agent to oxidize metal silicide protrusions on the first surface of the metal silicide layer. After treating the first surface with the oxidizing agent, the first surface may be treated with a cleaning agent to remove oxide over the metal silicide protrusions, wherein a size of a metal silicide protrusion of the metal silicide protrusions after treating the first surface with the cleaning agent is smaller than a size of the metal silicide protrusion prior to treating the first surface with the oxidizing agent.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: May 13, 2025
    Assignee: INFINEON TECHNOLOGIES AG
    Inventor: Mark Harrison
  • Patent number: 12299088
    Abstract: A transmitter device of a bus-based communication system may add one or more padding bits, associated with providing traffic flow confidentiality for communication of a payload on a communication bus, either to the payload on a transport layer, or to one or more first frames on a data link layer. The one or more first frames may include a transport layer payload associated with the payload. The transmitter device may transmit one or more second frames, including a data link layer payload associated with the one or more first frames, on the communication bus. A receiver device of the bus-based communication system may receive the one or more second frames on the communication bus. The receiver device may process the one or more padding bits from either the one or more first frames on the data link layer, or from the payload on the transport layer.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventors: Alexander Zeh, Laurent Heidt
  • Patent number: 12297102
    Abstract: In an embodiment, a method for forming a microfabricated structure includes depositing a first membrane on a substrate, depositing a first isolation layer on the first membrane, depositing a stator layer on the first isolation layer, forming a perforated stator from the stator layer, wherein the first isolation layer is disposed on a first surface of the perforated stator, depositing a second isolation layer on a second surface of the perforated stator and depositing a second membrane on the second isolation layer, including depositing a pillar coupled between the first membrane and the second membrane, wherein the first isolation layer includes a first glass layer having a low etch rate, and a second glass layer having a high etch rate embedded in the first glass layer.
    Type: Grant
    Filed: December 14, 2023
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventors: Wolfgang Klein, Evangelos Angelopoulos, Stefan Barzen, Marc Fueldner, Stefan Geißler, Matthias Friedrich Herrmann, Ulrich Krumbein, Konstantin Tkachuk, Giordano Tosolini, Juergen Wagner
  • Patent number: 12298361
    Abstract: A magnetic sensor system includes a magnetoresistive sensor comprising a magnetic free layer having a sensing plane and a magnetically-free magnetization arranged within the sensing plane, where the magnetically-free magnetization is variable in a presence of an in-plane magnetic field that is aligned with the sensing plane; and a ferromagnetic disc having a magnetic vortex in a ground state, wherein the magnetic vortex is configured to react to an out-of-plane magnetic field and generate a stray field in response to the out-of-plane magnetic field being applied to the ferromagnetic disc. The stray field has an in-plane magnetic field component that is proportional to the out-of-plane magnetic field. The magnetic free layer is configured to receive the in-plane magnetic field component of the stray field. The magnetically-free magnetization is configured to change based on the in-plane magnetic field component of the stray field.
    Type: Grant
    Filed: June 15, 2023
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventor: Bernhard Endres
  • Patent number: 12301216
    Abstract: An RF switch arrangement includes a shunt switch having a first RF terminal, a second RF terminal coupled to ground, a main control input, and an acceleration control input; a series switch having a first RF terminal coupled to the first RF terminal of the shunt switch, a second RF terminal, a main control input, and an acceleration control input; and a switching time acceleration circuit having a positive acceleration path input, a negative acceleration path input, and a first output coupled to the main control input of the series switch.
    Type: Grant
    Filed: September 8, 2023
    Date of Patent: May 13, 2025
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Valentyn Solomko, Semen Syroiezhin
  • Patent number: 12300342
    Abstract: In accordance with an embodiment, a method for characterizing a non-volatile memory, includes: applying a first voltage on a word line conductively coupled to a non-volatile memory cell and measuring a current flowing through the non-volatile memory cell in response to applying the first voltage. Measuring the current includes: using a sense amplifier, comparing the current flowing through the non-volatile memory cell with a plurality of different first currents generated by an adjustable current source while applying the same first voltage on the word line, and determining the measured current based on the comparing.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies LLC
    Inventors: Bogdan Georgescu, Cristinel Zonte, Vijay Raghavan
  • Patent number: 12300643
    Abstract: Described are solder stop features for electronic devices. An electronic device may include an electrically insulative substrate, a metallization on the electrically insulative substrate, a metal structure attached to a first main surface of the metallization via a solder joint, and a concavity formed in a sidewall of the metallization. The concavity is adjacent at least part of the solder joint and forms a solder stop. A first section of the metal structure is spaced apart from both the metallization and solder joint in a vertical direction that is perpendicular to the first main surface of the metallization. A linear dimension of the concavity in a horizontal direction that is coplanar with the metallization is at least twice the distance by which the first section of the metal structure is spaced apart from the first main surface of the metallization in the vertical direction. Additional solder stop embodiments are described.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventors: Ivan Nikitin, Adrian Lis, Peter Scherl, Achim Althaus
  • Patent number: 12301222
    Abstract: A circuit arrangement for driving a semiconductor switch includes an undervoltage detection circuit to indicate an undervoltage state when a supply voltage falls below a voltage threshold value. A temperature detection circuit indicates that a temperature of a semiconductor switch exceeds a temperature threshold value. A control circuit for driving the semiconductor switch deactivates the semiconductor switch when the undervoltage detection circuit indicates an undervoltage state, and to reactivate the semiconductor switch when the undervoltage detection circuit no longer indicates an undervoltage state. In this case, the reactivation is delayed by a defined delay time when the semiconductor switch was previously deactivated due to an undervoltage state and the temperature detection circuit indicates that the temperature of the semiconductor switch exceeds the temperature threshold value.
    Type: Grant
    Filed: June 14, 2023
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventors: Christof Marc Glanzer, Christian Djelassi-Tscheck, Markus Ladurner, Alexander Mayer
  • Patent number: 12302594
    Abstract: A power semiconductor device includes an active region with power cells, each configured to conduct a load current portion between first and second load terminals. Each power cell includes: trenches and mesas laterally confined by the trenches and in a vertical direction adjoining a drift region. The mesas include an active mesa having a source region of a first conductivity type and a body region of a second conductivity type separating the source region from the drift region. Both the source and body region are electrically connected to the first load terminal. At least one trench adjacent to the active mesa is configured to induce a conductive channel in the active mesa. A punch through structure s electrically separated from the active mesa by at least one separation stack.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: May 13, 2025
    Assignee: Infineon Technologies AG
    Inventors: Alim Karmous, Thorsten Arnold
  • Patent number: 12292469
    Abstract: A circuit includes a power transistor having a main current path between a first supply node and an output pin for connecting a load. A resistance formed by a chip metallization is arranged between the main current path of the power transistor and the output pin. The circuit includes a current measuring circuit coupled to the power transistor and including a sense transistor coupled to the power transistor. The current measuring circuit delivers a measurement current representing a load current flowing through the power transistor. An amplifier circuit generates an amplifier output signal representing the voltage across the resistance, and a control circuit outputs a signal representing the measurement current in a first mode and a signal dependent on the amplifier output signal in a second mode.
    Type: Grant
    Filed: December 2, 2022
    Date of Patent: May 6, 2025
    Assignee: Infineon Technologies AG
    Inventors: Christian Djelassi-Tscheck, Cristian Mihai Boianceanu, Michael Nelhiebel
  • Patent number: 12295156
    Abstract: In an example, for manufacturing a semiconductor device, first dopants are implanted through a first surface section of a first surface of a silicon carbide body. A trench is formed that extends from the first surface into the silicon carbide body. The trench includes a first sidewall surface and an opposite second sidewall surface. A spacer mask is formed. The spacer mask covers at least the first sidewall surface. Second dopants are implanted through a portion of a bottom surface of the trench exposed by the spacer mask. The first dopants and the second dopants have a same conductivity type. The first dopants and the second dopants are activated. The first dopants form a doped top shielding region adjoining the second sidewall surface. The second dopants form a doped buried shielding region adjoining the bottom surface.
    Type: Grant
    Filed: March 14, 2024
    Date of Patent: May 6, 2025
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Ralf Siemieniec, Wolfgang Jantscher, David Kammerlander
  • Patent number: 12292531
    Abstract: Signal processing circuitry includes at least one processor configured to obtain a digitized radar signal, and further configured, for one or more iterations, to: determine a first power of at least one first signal sample of the radar signal; determine a second power of at least one second signal sample of the radar signal, the at least one second signal sample being subsequent in time to the at least one first signal sample; and determine a difference value between the second power and the first power. The at least one processor further configured to detecting a burst interference signal occurring within the radar signal based on the one or more difference values from the one or more iterations.
    Type: Grant
    Filed: December 20, 2023
    Date of Patent: May 6, 2025
    Assignee: Infineon Technologies AG
    Inventors: Dian Tresna Nugraha, Markus Bichl, Dyson Wilkes
  • Patent number: 12292500
    Abstract: In an embodiment, a method includes: obtaining one or more radar measurement frames, each one of the one or more radar measurement frames including respective data samples acquired by a radar sensor monitoring a scene; for each one of the one or more radar measurement frames, determining a respective 2-D angular intensity map of the scene based on the respective radar measurement frame; and performing a people counting operation based on the one or more 2-D angular intensity maps determined for the one or more radar measurement frames to determine a people count for the scene.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: May 6, 2025
    Assignee: Infineon Technologies AG
    Inventors: Raghavendran Vagarappan Ulaganathan, Andrea Heinz, Avik Santra