Abstract: According to one exemplary embodiment, a data processing device is described, having a plurality of data processing components which are configured to exchange respective synchronization information with one another in pairs at predefined synchronization points, and having a writable configuration memory configured to store, for each reset type of a plurality of reset types, whether the exchange of the respective synchronization information is required for all of the synchronization points, in order that the respective pair of data processing components may continue its processing beyond the synchronization points. The data processing components are configured to continue or not continue their processing beyond synchronization points in accordance with the content of the writable configuration memory in the absence of an exchange of synchronization information.

Abstract: An oscillator system includes an oscillator structure configured to oscillate about a first axis according to a first oscillation and oscillate about a second axis according to a second oscillation; a first driver configured to drive the first oscillation, detect first zero-crossing events of the first mirror, and generate a first position signal based on the detected first zero-crossing events; a second driver configured to drive the second oscillation, detect second zero-crossing events of the second mirror, and generate a second position signal based on the detected second zero-crossing events; and a synchronization controller configured to receive the first and the second position signals, and synchronize at least one of a phase or a frequency of the second oscillation with at least one of a phase or a frequency of the first oscillation, respectively, based on the first and the second position signals.

Abstract: A magnetic angle switch circuit including a magnetic sensor circuit configured to determine a sensor signal indicative of an angle of a magnetic field; and a switch circuit configured to compare the sensor signal against a threshold signal indicative of a predefined angular threshold, and output a binary signal indicative of whether the angle of the magnetic field exceeds or falls below the predefined angular threshold.

Abstract: The described techniques enhance the conventional SPC communication protocol in various ways to provide further flexibility for various applications while improving performance. This includes the use of an alternative trigger signal that may encode a time base reference of a primary device as well as state data (e.g. an address, configuration data, etc.), which is transmitted to one or more secondary devices. This also includes the use of an end-of-frame (EoF) signal that may be introduced into an SPC data frame to enable the use of a variable data frame length. Still further, techniques are described for the use of another alternate trigger signal that includes a wake up signal that is recognized by a receiving device, which causes the receiving device to transition from a low power mode of operation to a communicating mode of operation.

Abstract: A three-dimensional integrated circuit includes a first integrated circuit having a first transistor and a first buried oxide layer; a second integrated circuit having a second transistor and a second buried oxide layer; a bond interface between an upper surface of the first integrated circuit and an upper surface of the second integrated circuit; a passivation layer coupled to the first buried oxide layer; and a mold wafer coupled to the second buried oxide layer.

Abstract: A semiconductor module includes: a chip carrier having a first side and a second, opposite side; a semiconductor chip arranged on the first side of the chip carrier; an encapsulation body that encapsulates the semiconductor chip; and at least two external contacts made of a metal or an alloy and arranged next to each other, which are electrically and mechanically connected to the first side of the first chip carrier and protrude laterally out of the encapsulation body. At least one of the external contacts has at least one wing arranged within the encapsulation body and located opposite the other external contact. The wing includes one or more cutouts that are filled with the encapsulation material of the encapsulation body.

Abstract: A power semiconductor module arrangement includes: a housing; a substrate arranged in or forming a bottom of the housing, the substrate including a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer; a semiconductor arrangement on the substrate; and bus bars electrically coupled to each other by the semiconductor arrangement and/or the first metallization layer. Each bus bar has opposing first and second ends, a first surface having a first outline, and a second surface opposite the first surface, the second surface having a second outline that is a projection of the first outline. The first end of each bus bar is electrically and mechanically coupled to the substrate, the second end extending to the outside of the housing. The outline of the first surface of a bus bar is identical to the outline of the first surface of each of the other bus bars.

Abstract: A package is disclosed. In one example, the package comprises a carrier, an electronic component mounted on or above the carrier, an electrically insulating and thermally conductive layer on at least part of an upper main surface of the electronic component, and a metal block on the electrically insulating and thermally conductive layer. An encapsulant at least partially encapsulates the electronic component, the carrier, the electrically insulating and thermally conductive layer and the metal block so that an upper main surface of the metal block is exposed beyond the encapsulant.

Abstract: A fluid sensor detects a target fluid and comprises thermal radiation emitters emitting a broadband thermal radiation, a waveguide structure guiding the thermal radiation comprising an evanescent field component, an optical filter structure coupled to the waveguide structure to provide a filtered thermal radiation having a center wavelength, a thermal radiation detector configured to provide a detector output signal based on a radiation strength of the filtered thermal radiation, and an actuation device for connecting the plurality of thermal radiation emitters with a power source such that the plurality of thermal radiation emitters has an operating temperature between 400 to 1300 K.

Abstract: An integrated circuit (IC) includes an internal clock source configured to generate an internal clock signal; a communication interface configured to receive an external clock signal from an external clock source and a communication frame signal that signals a communication frame during which data communication between the IC and the external clock source is enabled, wherein the external clock signal and the communication frame signal are received in parallel; and a clock monitoring circuit configured to monitor the internal clock signal based on the external clock signal. The clock monitoring circuit is configured to compare the internal clock signal and the external clock signal during the communication frame, and generate a timing error signal if a frequency of the internal clock signal does not satisfy a predetermined threshold relative to a frequency of the external clock signal.

Abstract: A solution for correcting errors is proposed, wherein a bit group of n memory cells is read and n states are determined therefrom, wherein the n states are determined in a time domain for a k1-out-of-n code and for a k2-out-of-n code, where k1 is less than k2. Furthermore, for a read n-bit word, which is a non-code word instead of a code word of the k2-out-of-n code, the previously read n-bit code word of the k1-out-of-n code is used to determine possible erroneous bits in the read non-code word. Possible code words of the k2-out-of-n code are determined for the non-code word based on the possible erroneous bits, and error correction is carried out using an external error code based on the possible code words.

Abstract: In accordance with an embodiment, a circuit includes a power transistor connected between a supply terminal and an output terminal; a control circuit coupled to a control electrode of the power transistor and configured to apply a control current to the control electrode to turn the power transistor on or off; and an overcurrent protection circuit connected to the power transistor. The circuit is configured to operate in a first mode, in which some functions of the circuit are inactive to reduce power consumption, and in a second mode, in which all functions of the circuit are active. The overcurrent protection circuit is configured to: in response to the circuit being in the first mode and a sense signal indicative of a load current passing through the power transistor reaching a first threshold, cause the circuit to change from the first mode to the second mode.

Abstract: A method for measuring current in a conductor, a current measurement circuit, and a power converter with a current measurement circuit are disclosed. The method includes measuring a current (IL) in a conductor in successive measurement cycles using a current measurement circuit (2). Measuring the current (IL), in each measurement cycle, comprises adjusting a start measurement value of the measurement circuit (2) based on a measurement value obtained in a preceding measurement cycle.

Abstract: A power semiconductor module includes: an electrically insulative frame; half bridge circuits housed in the electrically insulative frame, each half bridge circuit including one or more high-side power semiconductor dies and one or more low-side power semiconductor dies; a first structured metal frame embedded in the electrically insulative frame and electrically connected to a drain or collector terminal of the one or more high-side power semiconductor dies of each half bridge circuit; a second structured metal frame embedded in the electrically insulative frame and electrically connected to a source or emitter terminal of the one or more low-side power semiconductor dies of each half bridge circuit; and first openings in the electrically insulative frame that expose part of the first structured metal frame or part of the second structured metal frame at opposing first and second sidewalls of the electrically insulative frame and between adjacent ones of the half bridge circuits.

Abstract: A method for correcting a data block comprises correcting the data block in one or more iterations, each iteration comprising applying a first error correction and error detection method in accordance with a first code to a first set of vectors, wherein vectors of the first set of vectors for which t errors are detected but cannot be corrected by the error correction in accordance with the first code are marked, and applying a second error correction and error detection method in accordance with a second code to at least one portion of a second set of vectors, wherein the correction of vectors of the second set of vectors which contain one or more errors that could be corrected in accordance with the second code but relate to entries that do not belong to vectors of the marked vectors of the first set of vectors are skipped.

Abstract: A semiconductor module includes: a printed circuit board having a first side and an opposite second side; a plurality of power semiconductor packages arranged over and electrically coupled to the first side of the printed circuit board, a first side of the power semiconductor packages facing the first side of the printed circuit board and an opposite second side being configured to be coupled to a heatsink; and at least one bus bar arranged over and electrically coupled to the first side of the printed circuit board. The bus bar is configured to carry a supply current and/or a ground current of at least some of the power semiconductor packages.

Abstract: A method includes providing a lead frame with a central metal plate and a plurality of leads extending away from the central metal plate, the central metal plate including an upper surface that includes a first mesa that is elevated from recessed regions, mounting a semiconductor die on the upper surface of central metal plate such that a lower surface of the semiconductor die is at least partially disposed on the first mesa, forming electrical interconnections between terminals of the semiconductor die and the leads, forming an encapsulant body on the central metal plate such that the semiconductor die is encapsulated by the encapsulant body and such that the leads protrude out from edge sides of the encapsulant body, and thinning the central metal plate from a rear surface of the central metal plate so as to isolate the first mesa at a lower surface of the encapsulant body.

Abstract: A method for manufacturing a MEMS pressure transducer chip with a hybrid integrated environmental barrier structure includes a step of providing a substrate comprising at least one membrane, a step of structuring a stepped recess structure into the substrate, the stepped recess structure comprising a first recess having a first lateral width and an adjacent second recess having a larger second lateral width, where the stepped recess structure extends between the membrane and a substrate surface opposite to the membrane, and a step of arranging an environmental barrier structure inside the second recess.

Abstract: A power semiconductor device includes: a semiconductor body coupled to first and second load terminals; an active region with first and second sections, both configured to conduct a load current between the load terminals; electrically isolated from the load terminals, first control electrodes in the first section and second control electrodes in both the first and second sections); and semiconductor channel structures in the semiconductor body extending in both the first and second sections. Each channel structure is associated to at least one of the first and second control electrodes. The respective control electrode is configured to induce an inversion channel for load current conduction in the associated semiconductor channel structure. The first section exhibits a first effective total inversion channel width per unit area ratio, W/A1, and the second section exhibits a second effective inversion channel width per unit area ratio, W/A2, where W/A1>W/A2.

Abstract: A gas concentration sensor configured to measure a gas concentration of a target gas includes a reference chamber configured to contain a reference gas; a measurement chamber configured to contain the target gas; and a measurement circuit, configurable in a calibration mode and an operational mode, including a resistive bridge circuit including a first resistive element arranged in the reference chamber and a second resistive element arranged in the measurement chamber. The resistive bridge circuit is configured to receive an input voltage and generate a measurement signal based on the input voltage. During the calibration mode, the input voltage has a first voltage value at which the resistive bridge circuit has a negligible sensitivity to thermal conductivity such that the measurement signal is representative of an offset. The measurement circuit is configured to, during the operational mode, subtract the offset from the measurement signal to generate a compensated measurement signal.