Patents Assigned to Infineon Technologies AG
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Patent number: 12776640Abstract: In accordance with an embodiment, a circuit includes a power transistor connected between a supply terminal and an output terminal; a control circuit coupled to a control electrode of the power transistor and configured to apply a control current to the control electrode to turn the power transistor on or off; and an overcurrent protection circuit connected to the power transistor. The circuit is configured to operate in a first mode, in which some functions of the circuit are inactive to reduce power consumption, and in a second mode, in which all functions of the circuit are active. The overcurrent protection circuit is configured to: in response to the circuit being in the first mode and a sense signal indicative of a load current passing through the power transistor reaching a first threshold, cause the circuit to change from the first mode to the second mode.Type: GrantFiled: January 3, 2025Date of Patent: October 27, 2026Assignee: Infineon Technologies AGInventors: Christof Marc Thoma, Alexander Mayer, Daniel Mayer
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Patent number: 12775028Abstract: A method for measuring current in a conductor, a current measurement circuit, and a power converter with a current measurement circuit are disclosed. The method includes measuring a current (IL) in a conductor in successive measurement cycles using a current measurement circuit (2). Measuring the current (IL), in each measurement cycle, comprises adjusting a start measurement value of the measurement circuit (2) based on a measurement value obtained in a preceding measurement cycle.Type: GrantFiled: June 7, 2024Date of Patent: October 27, 2026Assignee: Infineon Technologies AGInventors: Giuseppe Loccia, Stefano Orlandi, Davide Dal Bianco
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Patent number: 12776715Abstract: A power semiconductor module includes: an electrically insulative frame; half bridge circuits housed in the electrically insulative frame, each half bridge circuit including one or more high-side power semiconductor dies and one or more low-side power semiconductor dies; a first structured metal frame embedded in the electrically insulative frame and electrically connected to a drain or collector terminal of the one or more high-side power semiconductor dies of each half bridge circuit; a second structured metal frame embedded in the electrically insulative frame and electrically connected to a source or emitter terminal of the one or more low-side power semiconductor dies of each half bridge circuit; and first openings in the electrically insulative frame that expose part of the first structured metal frame or part of the second structured metal frame at opposing first and second sidewalls of the electrically insulative frame and between adjacent ones of the half bridge circuits.Type: GrantFiled: March 21, 2023Date of Patent: October 27, 2026Assignee: Infineon Technologies AGInventors: Waldemar Jakobi, Christoph Koch, Tomas Manuel Reiter, Christian Schweikert
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Patent number: 12776790Abstract: A method for correcting a data block comprises correcting the data block in one or more iterations, each iteration comprising applying a first error correction and error detection method in accordance with a first code to a first set of vectors, wherein vectors of the first set of vectors for which t errors are detected but cannot be corrected by the error correction in accordance with the first code are marked, and applying a second error correction and error detection method in accordance with a second code to at least one portion of a second set of vectors, wherein the correction of vectors of the second set of vectors which contain one or more errors that could be corrected in accordance with the second code but relate to entries that do not belong to vectors of the marked vectors of the first set of vectors are skipped.Type: GrantFiled: September 12, 2024Date of Patent: October 27, 2026Assignee: Infineon Technologies AGInventors: Berndt Gammel, Rainer Göttfert, Stefan Seidl, Martin Schläffer
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Patent number: 12772373Abstract: A semiconductor module includes: a printed circuit board having a first side and an opposite second side; a plurality of power semiconductor packages arranged over and electrically coupled to the first side of the printed circuit board, a first side of the power semiconductor packages facing the first side of the printed circuit board and an opposite second side being configured to be coupled to a heatsink; and at least one bus bar arranged over and electrically coupled to the first side of the printed circuit board. The bus bar is configured to carry a supply current and/or a ground current of at least some of the power semiconductor packages.Type: GrantFiled: July 20, 2023Date of Patent: October 20, 2026Assignee: Infineon Technologies AGInventors: Ramdas Rangnath Ugale, Daniel Schleißer
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Patent number: 12772863Abstract: A method includes providing a lead frame with a central metal plate and a plurality of leads extending away from the central metal plate, the central metal plate including an upper surface that includes a first mesa that is elevated from recessed regions, mounting a semiconductor die on the upper surface of central metal plate such that a lower surface of the semiconductor die is at least partially disposed on the first mesa, forming electrical interconnections between terminals of the semiconductor die and the leads, forming an encapsulant body on the central metal plate such that the semiconductor die is encapsulated by the encapsulant body and such that the leads protrude out from edge sides of the encapsulant body, and thinning the central metal plate from a rear surface of the central metal plate so as to isolate the first mesa at a lower surface of the encapsulant body.Type: GrantFiled: December 6, 2021Date of Patent: October 20, 2026Assignee: Infineon Technologies AGInventors: Thorsten Meyer, Fee Hoon Wendy Wong, Thomas Behrens, Eric Lopez Bonifacio, Chau Fatt Chiang, Irmgard Escher-Poeppel, Giovanni Ragasa Garbin, Martin Gruber, Tien Shyang Law, Mohamad Azian Mohamed Azizi, Si Hao Vincent Yeo
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Patent number: 12767525Abstract: A method for manufacturing a MEMS pressure transducer chip with a hybrid integrated environmental barrier structure includes a step of providing a substrate comprising at least one membrane, a step of structuring a stepped recess structure into the substrate, the stepped recess structure comprising a first recess having a first lateral width and an adjacent second recess having a larger second lateral width, where the stepped recess structure extends between the membrane and a substrate surface opposite to the membrane, and a step of arranging an environmental barrier structure inside the second recess.Type: GrantFiled: November 17, 2023Date of Patent: October 20, 2026Assignee: INFINEON TECHNOLOGIES AGInventors: Hutomo Suryo Wasisto, Marc Füldner, Dominic Maier, Andreas Wiesbauer, Sebastian Anzinger
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Patent number: 12768806Abstract: A gas concentration sensor configured to measure a gas concentration of a target gas includes a reference chamber configured to contain a reference gas; a measurement chamber configured to contain the target gas; and a measurement circuit, configurable in a calibration mode and an operational mode, including a resistive bridge circuit including a first resistive element arranged in the reference chamber and a second resistive element arranged in the measurement chamber. The resistive bridge circuit is configured to receive an input voltage and generate a measurement signal based on the input voltage. During the calibration mode, the input voltage has a first voltage value at which the resistive bridge circuit has a negligible sensitivity to thermal conductivity such that the measurement signal is representative of an offset. The measurement circuit is configured to, during the operational mode, subtract the offset from the measurement signal to generate a compensated measurement signal.Type: GrantFiled: August 28, 2024Date of Patent: October 20, 2026Assignee: Infineon Technologies AGInventors: Silviu-Antonio Pieleanu, Dan Ioan Dumitru Stoica, Dan-Alexandru Mocanu
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Patent number: 12772472Abstract: A power semiconductor device includes: a semiconductor body coupled to first and second load terminals; an active region with first and second sections, both configured to conduct a load current between the load terminals; electrically isolated from the load terminals, first control electrodes in the first section and second control electrodes in both the first and second sections); and semiconductor channel structures in the semiconductor body extending in both the first and second sections. Each channel structure is associated to at least one of the first and second control electrodes. The respective control electrode is configured to induce an inversion channel for load current conduction in the associated semiconductor channel structure. The first section exhibits a first effective total inversion channel width per unit area ratio, W/A1, and the second section exhibits a second effective inversion channel width per unit area ratio, W/A2, where W/A1>W/A2.Type: GrantFiled: March 17, 2023Date of Patent: October 20, 2026Assignee: Infineon Technologies AGInventors: Roman Baburske, Frank Pfirsch, Jana Hänsel, Katja Waschneck
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Patent number: 12772871Abstract: A power electronic device includes: a carrier having at least two die mounting areas; a power semiconductor die(s) mounted on the carrier at a first mounting area and having a first side facing the carrier and an opposite second side, a second die mounting area being free of any semiconductor die; and a contact clip arranged over the die and second die mounting area. The contact clip is at least partially arranged in a first plane, with a first part over the die being bent downwards such it is arranged in a second plane below the first plane and coupled to the second side of the die. A second part of the contact clip over the second die mounting area is bent upwards such that the second part is arranged in a third plane above the first plane, or is free of any bend and arranged in the first plane.Type: GrantFiled: September 28, 2023Date of Patent: October 20, 2026Assignee: Infineon Technologies AGInventors: Oliver Kreiter, Patrik Holt Jones
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Patent number: 12766552Abstract: Device with ultrasonic transducer and method for manufacturing same. A device is provided, having an ultrasonic transducer, which includes a membrane and a cover element. A coupling medium entirely fills an interspace between the membrane and the cover element, and extends from the interspace into a reservoir space which communicates with the interspace.Type: GrantFiled: August 7, 2023Date of Patent: October 20, 2026Assignee: Infineon Technologies AGInventors: Horst Theuss, Klaus Elian
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Patent number: 12768947Abstract: According to at least one embodiment, a MIMO radar arrangement includes a radar receiver configured to generate radar reception data from radio receive signals received by a plurality of radar receive antennas. The arrangement further includes one or more signal processors configured to: generate frequency domain data for a range-Doppler bin based on the radar reception data and determine one or more peaks from the generated frequency domain data. The radar arrangement further includes a trained machine learning module configured to generate, using frequency domain data corresponding to each of the of the one or more determined peaks as input, one or more output values indicating a number of detected objects within each range-Doppler bin.Type: GrantFiled: April 14, 2022Date of Patent: October 20, 2026Assignee: Infineon Technologies AGInventors: Maximilian Eschbaumer, Simon Achatz
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Patent number: 12771293Abstract: An oscillator circuit includes a temperature and mechanical stress compensated current source configured to provide a first electrical current. The oscillator circuit further includes a switched capacitor configured to provide a second electrical current. The oscillator circuit further includes an integrator configured to perform an integration based on a difference of the first electrical current and the second electrical current and to provide an integration signal based on the integration. The oscillator circuit further includes an oscillator configured to provide an output frequency signal, wherein the output frequency signal is controlled based on the integration signal provided by the integrator. The second electrical current provided by the switched capacitor is controlled in a feedback loop based on the output frequency signal of the oscillator.Type: GrantFiled: December 18, 2024Date of Patent: October 20, 2026Assignee: Infineon Technologies AGInventors: Edwin Mario Motz, Alessandro Michelutti
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Publication number: 20260317552Abstract: An electronic device for immersion cooling comprising at least one functional body being at least partially delimited by an encapsulant. A hydrophobic coating covers at least part of an exterior surface of the at least one functional body.Type: ApplicationFiled: March 16, 2026Publication date: October 15, 2026Applicant: Infineon Technologies AGInventors: Stefan Pelties, Michael Bauer
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Patent number: 12764484Abstract: In one embodiment, a method of manufacturing a semiconductor device includes oxidizing a substrate to form local oxide regions that extend above a top surface of the substrate. A membrane layer is formed over the local oxide regions and the top surface of the substrate. A portion of the substrate under the membrane layer is removed. The local oxide regions under the membrane layer are removed.Type: GrantFiled: March 15, 2023Date of Patent: October 13, 2026Assignee: INFINEON TECHNOLOGIES AGInventors: Alfons Dehe, Stefan Barzen, Wolfgang Friza, Wolfgang Klein
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Patent number: 12765370Abstract: A molded package includes: a mold compound; a first power semiconductor die encapsulated by the mold compound; and a first temperature sense cavity formed in a surface of the mold compound. The molded package is devoid of temperature sense terminals. The first temperature sense cavity is dimensioned to receive a temperature sensor and/or a combined area of each sidewall and a bottom of the first temperature sense cavity is greater than an area of an opening in the surface of the mold compound that delineates the first temperature sense cavity. A corresponding power module and a power electronics assembly that includes the molded package or the power module are also described.Type: GrantFiled: October 4, 2023Date of Patent: October 13, 2026Assignee: Infineon Technologies AGInventors: Thorsten Scharf, Michael Fügl
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Patent number: 12765417Abstract: A method of forming a semiconductor package includes providing a metal baseplate including a base section and a plurality of metal posts, the base section being a planar pad of substantially uniform thickness, the plurality of metal posts each extending up from a planar upper surface of the base section, mounting a semiconductor die on the upper surface of the metal baseplate, forming an encapsulant body of electrically insulating mold compound on the upper surface of the base section, electrically connecting terminals of the semiconductor die to the metal posts, and removing the base section so as to form package contacts from the metal posts at a first surface of the encapsulant body.Type: GrantFiled: August 16, 2022Date of Patent: October 13, 2026Assignee: Infineon Technologies AGInventors: Sock Chien Tey, Keck Tim Ang, Chan Lam Cha, Chau Fatt Chiang, Badrul Hisyam Ismail, Desmond Jenn Yong Loo, Ronizan Mohd Salleh, Norliza Morban, Si Hao Vincent Yeo, Chee Mun Wai, Fee Hoon Wendy Wong
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Patent number: 12765398Abstract: A method includes providing first and second lead frames, each including a die pad and a plurality of contacts, providing first and second semiconductor dies, each comprising a first terminal and a second terminal, providing a first clip frame that includes a first die mating pad, a second die mating pad, and a bridge section, mounting the first semiconductor die on the first lead frame, mounting the second semiconductor die on the second lead frame, and attaching the first clip frame to the first and second semiconductor dies such that the first die mating pad faces and electrically connects with the first terminal of the first semiconductor die and such that the second die mating pad faces and electrically connects with the first terminal of the second semiconductor die.Type: GrantFiled: March 6, 2024Date of Patent: October 13, 2026Assignee: Infineon Technologies AGInventors: Ralf Otremba, Markus Dinkel, Thai Kee Gan, Teck Sim Lee
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Patent number: 12754224Abstract: A monitoring device for a high-voltage onboard electrical system of an electrically operable vehicle. The high-voltage onboard electrical system includes a high-voltage energy storage device that is couplable to an electrically positive and an electrically negative charge line. The electrically positive charge line is couplable to a positive electric voltage of a charging device via a charging connection to charge the high-voltage energy storage device and the electrically negative charge line is couplable to a negative electric voltage of the charging device to charge the high voltage energy storage device. The monitoring device has a control unit with a current sensor which is configured to determine the sum of the electric currents of the positive and the negative charge lines. The control unit is configured to separate the positive and the negative charge lines from the high-voltage onboard electrical system upon detecting a fault.Type: GrantFiled: September 15, 2022Date of Patent: October 6, 2026Assignees: Mercedes-Benz Group AG, et al., Infineon Technologies AGInventors: Andreas Maier, Peter Maier, Werner Roessler
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Patent number: 12752799Abstract: A driving safety system for a motor vehicle with at least one wheel speed sensor is disclosed, which is configured to determine the actual wheel speed on a wheel, and a driving safety control unit configured to receive a wheel speed signal generated by the wheel speed sensor, where the wheel speed signal represents a determined actual wheel speed. The wheel speed signal is transmitted via an unprotected transmission channel between the wheel speed sensor and the driving safety control unit. The driving safety control unit is configured to receive a travel signal that correlates with the actual vehicle speed and to compare the travel signal with the wheel speed signal to check the wheel speed signal for plausibility. The movement signal is transmitted to the driving safety control unit via a safe transmission channel.Type: GrantFiled: November 19, 2024Date of Patent: October 6, 2026Assignee: Infineon Technologies AGInventors: Dirk Hammerschmidt, Sigmund Zaruba