Abstract: A device includes a transformer having primary windings and secondary windings, and a transmit circuit coupled to the primary windings. The transmit circuit is configured to receive an input signal, and provide a carrier signal to the primary windings responsive to the input signal. The device also includes a receive circuit coupled to the secondary windings. The receive circuit is configured to receive the carrier signal from the secondary windings, and provide an output signal responsive to the carrier signal. The receive circuit includes a variable capacitor coupled in parallel to the secondary windings, and a spread spectrum modulation circuit configured to modulate a capacitance of the variable capacitor.

Abstract: In a described example, an apparatus includes: a first mold compound partially covering a thermal pad that extends through a pre-molded package substrate formed of a first mold compound, a portion of the thermal pad exposed on a die side surface of the pre-molded package substrate, the pre-molded package substrate having a recess on the die side surface, with an exposed portion of the thermal pad and a portion of the first mold compound in a die mounting area in the recess; a semiconductor die mounted to the thermal pad and another semiconductor die mounted to the mold compound in the die mounting area; wire bonds coupling bond pads on the semiconductor dies to traces on the pre-molded package substrate; and a second mold compound over the die side surface of the pre-molded package substrate and covering the wire bonds, the semiconductor dies, the recess, and a portion of the traces.

Abstract: A streaming engine employed in a digital data processor specifies a fixed read only data stream defined by plural nested loops. An address generator produces addresses of data elements. A steam head register stores data elements next to be supplied to functional units for use as operands. Stream metadata is stored in response to a stream store instruction. Stored stream metadata is restored to the stream engine in response to a stream restore instruction. An interrupt changes an open stream to a frozen state discarding stored stream data. A return from interrupt changes a frozen stream to an active state.

Abstract: In an example, a system includes a processor, where the processor includes a plurality of processor registers, and where the processor is configured to execute a first instruction in a first execution context. The processor is also configured to receive a PRESERVE instruction that indicates at least one processor register among the plurality of processor registers. The processor is configured to, responsive to the PRESERVE instruction, preserve parameters in the at least one processor register and clear other processor registers in the plurality of processor registers in the first execution context. The processor is also configured to execute a second instruction in a second execution context.

Abstract: An IC, comprising a first rail supply, a second rail supply, an external pad coupled to one of the first rail supply and the second rail supply, and an ESD protection circuit coupled to the external pad. The ESD protection circuit includes a slew rate detector coupled to the external pad, an amplifier coupled to an output of the slew rate detector, a one-shot coupled to an output of the amplifier, and a clamp circuit coupled an output of the one-shot.

Abstract: An IC including a level shifter core circuit configured to receive an input signal at an input node from a low-voltage circuit portion configured to operate with a low voltage supply level, and to translate the input signal to an output signal at an output node, the output signal having a maximum voltage greater than the low voltage supply level; and a fail-safe circuit including first and second pull-down transistors configured to respectively connect the input node and the output node to a reference voltage rail in the event that the low voltage supply level drops below a threshold level. The fail-safe circuit may also include a supply cutoff switch configured to effectuate a gated connection to the low voltage supply level in response to detecting that it is below the threshold level.

Abstract: An automatic charge/discharge circuit is presented that allows a current mirror circuit with a high capacitance to quickly and automatically charge or discharge the capacitance in order to allow for a fast start-up power supply. The charge/discharge circuit automatically stops charging or discharging as the voltage on the capacitance approached a desired steady state.

Abstract: A caching system including a first sub-cache, a second sub-cache, coupled in parallel with the first sub-cache, for storing write-memory commands that are not cached in the first sub-cache, the second sub-cache including privilege bits configured to store an indication that a corresponding cache line of the second sub-cache is associated with a level of privilege, and wherein the second sub-cache is further configured to receive a first write memory command for a memory address associated with a first level of privilege, store, in the second sub-cache, first data associated with the first write memory command and the level of privilege associated with the cache line, receive a second write memory command for the cache line, the second write memory command associated with a second level of privilege, merge the first level of privilege with the second level of privilege, and output the merged privilege level with the cache line.

Abstract: A semiconductor device includes a Schottky diode on a silicon-on-insulator (SOI) substrate. The Schottky diode includes a guard ring with a first guard ring segment contacting a barrier region on a first lateral side of the barrier region, and a second guard ring segment contacting the barrier region on a second, opposite, lateral side of the barrier region. The first and second guard ring segments extend deeper in the semiconductor layer than the barrier region. The Schottky diode further includes a drift region contacting the barrier region, and may include a buried layer having the same conductivity type as the barrier region, extending at least partway under the drift region. The barrier region is isolated from the substrate dielectric layer of the SOI substrate by an isolation region having the same conductivity type as the guard ring. A metal containing layer is formed on the barrier region.

Abstract: Examples of amplifier circuitry regulate a transconductance value (Gm) of operational transconductance amplifiers (OTAs) in the amplifier to be approximately the same, which value is based on a supply voltage and a reference voltage applied to a reference OTA and the internal resistance of the reference OTA. The reference OTA generates an output current based on Gm and the reference voltage, which current is compared to current generated by the supply voltage and internal resistance of the reference OTA. A tail current transistor of each of the reference OTA and a main OTA that mirrors the Gm of the reference OTA provide a tail current feedback path by which Gm is regulated. Amplifying circuitry is coupled to the main OTA to receive current signals. Based on the received current signals, amplifying circuitry generates a differential output voltage signal. The gain of the amplifying circuitry is proportional to the supply voltage and remains relatively constant across process temperature variations.

Abstract: A streaming engine employed in a digital signal processor specifies a fixed read only data stream. Once fetched the data stream is stored in two head registers for presentation to functional units in the fixed order. Data use by the functional unit is preferably controlled using the input operand fields of the corresponding instruction. A first read only operand coding supplies data from the first head register. A first read/advance operand coding supplies data from the first head register and also advances the stream to the next sequential data elements. Corresponding second read only operand coding and second read/advance operand coding operate similarly with the second head register. A third read only operand coding supplies double width data from both head registers.

Abstract: A method for detecting a fault with a cable having a resistor divider couple to the cable. The method includes converting a first sense voltage from the resistor divider network to a first digital code, determining whether the first digital code falls within a first range of digital codes corresponding to a first fault associated with the cable, and responsive to determining that the first digital code falls within the first range of digital codes, generating an indication of the first fault.

Abstract: In one example, a method comprises providing first data to a machine learning model to generate second data. The method further comprises determining errors based on the second data and target second data; determining loss gradients based on the errors. The method further comprises updating running sums of prior loss gradients by adding the gradients to the running sums; and updating model parameters of the machine learning model based on the updated running sums.

Abstract: In described examples, a converter circuit includes a primary-side ground, a current sensor, a control signal generator, first and second control switches, and a transformer with a center-tapped primary-side coil. A first terminal of the first control switch is coupled to a first terminal of the coil and a first input of the current sensor. A first terminal of the second control switch is coupled to a second terminal of the coil and a second input of the current sensor. Second terminals of the first and second control switches are coupled to ground. The control signal generator closes the first control switch and opens the second control switch in a first phase; opens the first control switch and closes the second control switch in a second phase that alternates with the first phase; and adjusts first phase duration in response to current sensor output, without changing converter period duration.

Abstract: A microplate reader simultaneously obtains Raman measurements from samples contained in non-adjacent wells. At least two Raman probes are positioned perpendicularly above or below the microplate to simultaneously acquire Raman spectra data of the non-adjacent liquid samples. Each probe is coupled to a laser and a spectrometer and includes a lens focusing laser light within the sample and collecting light from the sample for the spectrometer. The spectrometer may include a 2D imaging sensor (sCMOS or CCD) to image light from multiple probes simultaneously, spaced from one another to reduce crosstalk. A positioner moves the microplate plate or probes to acquire data from a different subset of non-adjacent samples, and may also vary laser focus within wells during data acquisition. Multiple fluorescence probes may simultaneously acquire fluorescence data from the same samples, or non-adjacent samples. Probes may be fiber-coupled and positioned within a reaction chamber of a liquid handling system.

Abstract: An electronic circuit includes: a memory including a data input, an address input, a command input, and a data output; a register having a data input coupled to the data output of the memory; a comparator circuit having a first data input coupled to the data output of the memory, and a second data input coupled to a data output of the register; an inverter circuit having a data input coupled to the data output of the register, and a data output coupled to the data input of the memory; and a controller having a command output coupled to the command input of the memory, an address output coupled to the address input of the memory, and a fault input coupled to a data output of the comparator circuit, where the controller is configured to determine whether the memory has a fault based on the fault input of the controller.

Abstract: A method includes generating a reference voltage by periodically switching direction of current flow in a diagnostic sensor, where the reference voltage is a non-sinusoidal differential voltage of which an amplitude alternates between minimum and maximum values, and where the reference voltage includes a diagnostic sensor output voltage component responsive to an external magnetic field and a diagnostic sensor offset voltage component responsive to a mismatch of the diagnostic sensor. The method also includes amplifying the reference voltage to produce an amplified reference voltage, where the amplified reference voltage is a differential voltage having an amplifier offset voltage component. Additionally, the method includes demodulating the amplified reference voltage by filtering the diagnostic sensor offset voltage component and the amplifier offset voltage component to produce a demodulated voltage. Also, the method includes digitizing the demodulated voltage to produce a digitized voltage.

Abstract: In some examples, a device comprises: a substrate having a cavity, the cavity having a bottom surface; a die pad in the cavity; and a semiconductor die in the cavity and having a first segment coupled to the die pad and a second segment suspended over and facing the bottom surface.

Abstract: A three dimensional time of flight (TOF) camera includes a transmitter and a receiver. The transmitter is configured to generate an electrical transmit signal at a plurality of frequencies over an integration time period and generate a transmit optical waveform corresponding with the electrical transmit signal. The receiver is configured to receive a reflected optical waveform that is the transmit optical waveform reflected off of an object, integrate the reflected optical waveform over the integration time period, and determine a distance to the target object based on a TOF of the optical waveform. The integration time period includes exposure time periods. A length of each of the exposure time periods corresponds to one of the frequencies. The TOF is determined based on a correlation of the electrical transmit signal and the return optical waveform utilizing a correlation function with respect to the integration time period.

Abstract: A circuit includes a supply circuit having an input and an output. The supply circuit includes: a capacitor having a first terminal and a second terminal, the first terminal of the capacitor coupled to the output of the supply circuit; a switch having a first terminal, a second terminal, and a control terminal, the first terminal of the switch coupled to the input of the supply circuit, the second terminal of the switch coupled to the output of the supply circuit; and a controller coupled to the control terminal of the switch. The controller is configured to: turn on the switch responsive to a first supply voltage level at the input of the supply circuit; and turn off the switch responsive to a second supply voltage level at the input of the supply circuit.