Abstract: A process for the manufacture of a printed circuit board is disclosed in which, during the process, conductive tracks 6 are tested for defects 8 relating to their conductivity and any detected defect 8 is repaired by securing a conductive bridge-piece 9 across the defect 8 by a reflow soldering operation. The repair is encapsulated with a protective layer 16 and the manufacturing process, which includes the further application of heat to the circuit board, is continued.

Abstract: Wire printing apparatus includes a print head having at least one print wire and associated actuating mechanism and drive circuit. In the drive circuit a capacitor is charged to a predetermined voltage through an inductance and then discharged through the coil of an electromagnet in the actuating mechanism. The current through the coil is arranged to rise and then fall. The circuit permits optimization to maximize the proportion of the energy input to the drive circuit which is transferred to the print wire.

Abstract: Data processing system having a main processor system and a diagnostic unit. The main processor system may transmit messages selected by itself to the diagnostic unit. It does so by writing information to a predetermined location in a writable microprogram control store. The diagnostic unit loads the address of that location into a reference address register and sets an address comparison circuit to respond only to write accesses. The address comparison circuit then outputs a signal on a line when it detects equivalence between that address and the address used in the control store access, held in an address input register. The output signal acts as an interrupt signal for a microprocessor system which subsequently causes a halt circuit to halt execution of microinstructions in the main processor. It then causes a control circuit 76 to carry out a read access of the control store at the predetermined address, held in an address output register. The data output is received in a data output register.

Abstract: A digital magnetic recording system in which information is recorded as transitions between regions magnetized in opposite senses. In the read channel the output of the read head is applied to modulate a carrier, passed through a surface acoustic wave transversal filter and then demodulated, and the resulting transformed waveform is sampled. The surface acoustic wave transversal filter is designed to control the manner in which the transformed versions of elementary read pulses interfere at the sampling instants in such a way as to facilitate recovery of the recorded bits.

Abstract: A membrane switch assembly in which portions of a membrane 14 mounted on a base member 11 are belled-outwardly to provide cavities 15, which are positioned so as to overly the location at which conductors 21, 22 are to be connected. The formation of each belled out portion is such that each portion carries electrical contactor means 16, 20 and such that the portion has a circumscribing region 18 which on compression of the portion to cause switch operation allows the membrane 14 to collapse at this region before the membrane is fully compressed.

Abstract: A fastening device is disclosed for joining two members, for example tubular members, together, one of the members having a recess in an end which is to abut the other member. The device includes wedge elements which are moved relative to one another to engage opposed internal walls of the recess in the one member so that by attaching one of the wedge elements to the other member the members are secured to one another. Deformable links interconnect the wedge elements to initially retain the elements in their operative positions but to subsequently deform when relative movement is produced between the elements.

Abstract: System for extracting timing information from a digital waveform supplied to the system in which the waveform is modulated by a modulator, passed through a surface acoustic wave transversal filter and demodulated by a demodulator. Zero crossings in the resultant transformed waveform are detected by a detector and used to determine the times at which another version of the original waveform is sampled by a sampling circuit.The characteristics of the surface acoustic wave transversal filter are chosen to be such that each elementary pulse in the original waveform is transformed into an oscillatory waveform, the zero crossings of the different oscillatory waveforms coinciding with one another and defining the sampling times.

Abstract: A driver circuit for use in testing either ECL (emitter-coupled logic) or TTL (transistor-transistor logic) devices. The circuit has a pair of variable reference voltages (V.sub.H,V.sub.L) for determining the logic levels 0 and 1. The circuit also has two termination networks (8,9) for ECL and TTL, which are selectively connected to the output of the driver circuit according to the value of one of the reference voltages (V.sub.L). Preferably the circuit is formed as a hybrid network in which transistors from the same semiconductor slice are mounted on the same ceramic substrate.

Abstract: A variable delay circuit consists of a chain of logic gates with a selection circuit for selecting the output of any chosen one of the gates. A variable voltage is connected to the emitter load resistors of the gates, and permits the overall delay to be adjusted.

Abstract: A cache store is provided in conjunction with a main store. Each location of the cache has a changed bit. A list is maintained of the addresses of those locations in the cache store which have been modified. When the list becomes full, the entry at the head of the list is read out and the corresponding data item is transferred from the cache to the main store. Thus, there are never more than a limited number of items in the cache awaiting transfer. To clear the cache of all modified items, each entry in the list is read out in turn and the corresponding items are transferred to the main store. The system reduces the amount of traffic between the cache and the main store and hence improves efficiency.

Abstract: A display device formed as a multilayer panel. The display is built up of d.c. electroluminescent display elements arranged in cells each containing an array of elements, e.g. for the display of a character. A display element is selected and caused to start luminescing by (a) a flash of light from a cell selector d.c. electroluminescent element which lowers the resistance of a group of associated photoconductors in series with the display elements, and (b) an energizing pulse applied, in the cell in question, to one of the display elements through its photoconductor. Once initiated, luminescence is maintained by an energizing voltage applied through a photoconductor radiatively coupled to the element. The information written in a cell is selectively erased as a whole by a further flash from the cell-selector element, which reduces the voltage applied to the lit elements of the cell to the point at which luminescence ceases.

Abstract: An electrical connection system for first and second electrical conductor members of the kind in which the first member has an open setting for receiving or releasing the second member and a closed setting for retaining the second in the engaged condition and in which an operating member is provided to open or close the first member, additionally includes an interlock arrangement which prevents operation of the operating member to close the first connector member is only partially engaged and which also stops removal of the second conductor member until the first member has been opened.

Abstract: An information storage arrangement comprising two random access memories. While one memory is being used for normal read/write access, the other is automatically cycled through so that each location can be reset. When a "reset" command is received, the roles of the two memories are interchanged, so that the one which has just been reset is now used for normal read/write access. This provides a very rapid reset facility. The invention is of particular use for storing validity marker bits for data items in a slave store.

Abstract: An electrical sealing device consisting of a brush-like element comprising a plurality of flexible filaments (1) the majority of which are electrically conductive and are distributed substantially uniformly among the insulating filaments. The device can be used, for example, for electrically sealing around the edge of a door (6) of an equipment enclosure (5) so as to prevent electromagnetic interference from leaking into or out of the enclosure, or can be used for electrically sealing an aperture (9) through which wires (10) may pass.

Abstract: A data processing system is disclosed consisting of a plurality of data processing elements and parity processing elements. The parity processing elements hold parity bits for checking the contents of the internal registers and internal stores of the data processing elements and perform substantially the same operations on the parity bits as the data processing elements perform on the data. However, some of these operations may invalidate the parity bits. In particular, the carry result from an addition operation is not always valid. A parity valid logic circuit is therefore provided to generate a signal which indicates whether the parity bits from all the parity processing elements are valid, and hence whether the parity check performed using these parity bits is valid.

Abstract: An edge connector assembly (1) for interconnecting two printed circuit boards (2) in such manner as to maintain a one-to-one correspondence with the opposite sides of the boards, the assembly (1) including a flexible substrate (10) carrying a conductor pattern (10A) which connects with contact areas (12) and the substrate (10). The substrate (10) is folded or flexed about two support strips (11) such that the parts of the substrate (10) wrapped around the strips (11) provide the edge connector (5) and other parts of the substrate (10) maintain the edge connections (5) in spaced relationship. The various contacts (12) are so positioned on the substrate (10) that they are located on opposite faces of the edge connectors (5). Plated through holes (27,28) are formed in the substrate to provide any required electrical connection through the substrate (10).

Abstract: The specification discloses a structure for locating integrated circuits on a substrate by etching V grooves in a silicon substrate arranged to co-operate with spheroidal connectors on the integrated circuit. Contact pads are located in the V grooves whereby connections are made to the integrated circuit through the spheroidal connectors.

Abstract: A method of forming connection networks for an integrated circuit device, by forming an orthogonal array of grooves in a substrate, with the grooves of one array deeper than those of the other array; and by providing conductive strips at the bottoms of the grooves and at selected regions of the groove side walls which strips serve to provide a desired pattern of interconnections.

Abstract: A large scale integrated circuit package including a base or substrate section and a lid structure of thermally conductive material to which the chip or die of the package is mounted. A frame defining a recess for the chip is provided on the lid and the frame carries conductive tracks which are coupled to the connector pads of the chip or die. The base has a recess which accommodate the chip and frame and which is closed by the lid structure. The base of the recess is provided with conductive tracks which co-operate with those on the frame. The electrical connections between the two sets of tracks is formed by thermo-compression techniques.

Abstract: An array processor consisting of integrated circuit chips connected in a rectangular array. The number of terminals on each chip necessary for these interconnections is reduced by arranging for certain terminals to be connected to branched paths, so that those terminals are shared between different connections. Special gating is provided to ensure that signals are routed correctly over these shared connections.