Abstract: An SiC Schottky diode die or a Si Schottky diode die is mounted with its epitaxial anode surface connected to the best heat sink surface in the device package. This produces a substantial increase in the surge current capability of the device.

Abstract: A superjunction device that includes a termination region having a transition region adjacent the active region thereof, the transition region including a plurality of spaced columns.

Abstract: A power semiconductor device that includes a passive component, e.g., a capacitor, mechanically and electrically coupled to at least one pole thereof.

Abstract: A power steering device capable of obtaining a high rotary speed in the medium low torque range of an electric motor without incurring a drastic increase in manufacturing cost. The power steering device generates an auxiliary steering power by oil pressure that is generated by a pump which is driven by an electric power motor. The electric motor is a triple-phase brushless motor, with its angle of rotation being detected by the Hall sensors. The field coils are provided with the electric current from a drive circuit which is driven by a drive signal from the motor drive control part. The motor drive control part controls the electric motor by PWM control in the low medium speed rotation range and controls the electric motor by phase advance angle control, with PWM duty at 100 percent, in the medium high speed range.

Abstract: An inverter power module for driving an electric motor comprising a plurality of motor drive power switches having at least one output for driving the motor, a driver integrated circuit for driving the plurality of motor drive power switches, the plurality of switches comprising at least two power switches arranged in a half bridge configuration adapted to be connected between rails of a supply bus, with a common connection between the switches serving as an output for driving the motor, the switches comprising a high side switch and a low side switch, the low side switch being connected to an external terminal of the module adapted to be connected through a sensing element to the lower potential supply bus rail, whereby a motor current can be monitored at the external connection.

Abstract: A semiconductor device is disclosed containing a semiconductor die having a trimetal electrode soldered to a substrate by a Sn—Sb solder.

Abstract: A chip scale package has a semiconductor MOSFET die which has a top electrode surface covered with a layer of a photosensitive liquid epoxy which is photolithographically patterned to expose portions of the electrode surface and to act as a passivation layer and as a solder mask. A solderable contact layer is then formed over the passivation layer. The individual die are mounted drain side down in a metal clip or can with the drain electrode disposed coplanar with a flange extending from the can bottom. The metal clip or drain clip has a plurality, a parallel spaced fins extending from its outwardly facing surface.

Abstract: A process for joining a steel terminal to a copper electrode comprises applying a thin silver-copper flash to the surface of a copper electrode and bringing a steel surface into contact with the flash during high frequency welding. The weldment is improved compared to conventional welds that do not incorporate the flash layer. For example, a silver—18 wt % copper alloy having a thickness of about 180 microns produced uniform, high quality welds between nickel steel terminals and 99.999% pure copper electrodes.

Abstract: A lateral conduction superjunction device has bidirectional conduction characteristics. In a first embodiment, spaced vertical trenches in a P substrate are lined with N diffusions. A central MOSgate structure is disposed centrally in the parallel trenches and source and drain electrodes are at the opposite respective ends of the trenches. In a second embodiment, flat layers of alternately opposite conductivity types have source and drain regions at their opposite ends. A trench MOSgate is disposed between the source region at one end of the layers to enable bidirectional currant flow through the stocked layers.

Abstract: An electrical arrangement provides power to a plurality of electrical systems, the electrical arrangement including a plurality of voltage buses; a plurality of voltage sources configured to supply respective electrical voltage potentials, the voltage sources being respectively assigned to the voltage buses, the voltage sources supplying the respective electrical voltage potentials to the respective voltage buses; at least one electrical system assigned to and electrically coupled to each of the voltage buses to receive electrical power; and a DC-DC converter arrangement electrically coupled to the voltage buses, the DC-DC converter being configured to convert at least one of the respective voltage potentials to another one of the respective voltage potentials, the DC-DC converter being mechanically and proximally coupled to at least one of the voltage sources.

Abstract: A circuit to suppress arc across contacts of a relay is provided, in which the relay is electrically coupled to a power supply and a load. The circuit includes an arc suppression circuit electrically coupled between the first and second contacts of the relay, and the arc suppression circuit includes a capacitor and a switch, both of which are electrically coupled to the first and second contacts of the relay, in which the switch is configured to turn on when the first and second contacts of the relay change state, thereby providing an alternate path for a current flow through the load.

Abstract: A driver circuit for driving a switching circuit driving a load, e.g., a gas discharge lamp, the drive circuit comprising an input trigger circuit receiving a pulsed input signal for controlling the generation of two drive signals, a first drive signal driving a high side switch of a half bridge switching circuit and a second drive signal driving a low side switch of the half bridge switching circuit, a circuit for providing a dead time between the first and second drive signals whereby both the first and second drive signals are substantially zero, the input trigger circuit generating a control signal for controlling the generation of the first and second drive signals based on a characteristic of the pulsed input signal and first and second drive circuits for providing the first and second drive signals.

Abstract: A P channel vertical conduction Rad Hard MOSFET has a plurality of closely spaced base strips which have respective sources to form invertible surface channels with the opposite sides of each of the stripes. A non-DMOS late gate oxide and overlying conductive polysilicon gate are formed after the source and base regions have been diffused. The base stripes are spaced by about 0.6 microns, and the polysilicon gate stripes are about 3.2 microns wide. A P type enhancement region is implanted through spaced narrow windows early in the process and are located in the JFET common conduction region which is later formed by and between the spaced base stripes. The device is a high voltage (greater than 25 volts) P channel device with very low gate capacitance and very low on resistance.

Abstract: A fabrication process for a Schottky barrier structure includes forming a nitride layer directly on a surface of an epitaxial (“epi”) layer and subsequently forming a plurality of trenches in the epi layer. The interior walls of the trenches are then deposited with a final oxide layer without forming a sacrificial oxide layer to avoid formation of a beak bird at the tops of the interior trench walls. A termination trench is etched in the same process step for forming the plurality of trenches in the active area.

Abstract: An active filter for reducing the common mode current in a pulse width modulated drive circuit driving a load, said drive circuit comprising an a-c source, a rectifier connected to said a-c source and producing a rectified output voltage connected to a positive d-c bus and a negative d-c bus, a PWM inverter having input terminals coupled to said positive d-c bus and negative d-c bus and having a controlled a-c output, a load driven by said a-c output of said PWM inverter, a ground wire extending from said load, and a current sensor for measuring the common mode current in said drive circuit in said ground wire, said current sensor producing an output current related to said common mode current, said active filter comprising a first and second MOSFET transistor, each having first and second main electrodes and a control electrode, and an amplifier driving a respective one of the transistors; said first electrode of said first and second transistor coupled to a common node, said second electrodes of said first

Abstract: A Rad Hard MOSFET has a plurality of closely spaced base strips which have respective source to form invertible surface channels with the opposite sides of each of the stripes. A non-DMOS late gate oxide and overlying conductive polysilicon gate are formed after the source and base regions have been diffused. The base strips are spaced by about 0.6 microns, and the polysilicon gate stripes are about 3.2 microns wide. An enhancement region is implanted through spaced narrow window early in the process and are located in the JFET common conduction region which is later formed by and between the spaced base stripes. The device is a high voltage (greater than 25 volts) device with very low gate capacitance and very low on resistance. An early and deep (1.6 micron) P channel implant and diffusion are formed before the main channel is formed to produce a graded body diode junction.

Abstract: A single mask process is described for making a trench type fast recovery process. The single mask defines slots in a photoresist for locally removing strips of nitride and oxide from atop silicon and for subsequently etching trenches in the silicon. A boron implant is carried out in the bottoms of the trenches to form local P/N junctions. The oxide beneath the nitride is then fully stripped in the active area and only partly stripped in the termination area in which the trenches are wider spaced than in the active area. Aluminum is then deposited atop the active area and in the trenches, but is blocked from contact with silicon in the active area by the remaining nitride layer.

Abstract: An IGBT has parallel spaced trenches lined with gate oxide and filled with conductive polysilicon gate bodies. The trenches extend through a P− base region which is about 7 microns deep. A deep narrow N+ emitter diffusion is at the top of the trench and a shallow P+ contact diffusion extends between adjacent emitter diffusions. The N+ emitter diffusions are arranged to define a minimum RB′. The trenches are sufficiently deep to define long channel regions which can withstand a substantial portion of the blocking voltage of the device. A second blanket emitter implant and diffusion defines a shallow high concentration emitter diffusion extension at the top of the die for improved contact to the emitter diffusions.

Abstract: The tops of the conductive polysilicon gates of a trench device have a layer of a silicide such as titanium silicide which is more conductive than the polysilicon gate, thereby reducing gate resistance.

Abstract: A fully protected H-bridge for a d-c motor consists of two high side MOSFETs and a control and logic IC on a first conductive heat sink all within a first package and two discrete low side MOSFETs. The entire bridge is controlled by the IC. Shoot thru protection is provided for each leg, and a PMW soft start sequence is provided through the control of the low side MOSFETs, programed by an external, chargeable RC circuit. Input signals to the high side MOSFETs select the operation modes. Protective circuits are provided for short circuit current and over current conditions. Sleep mode and braking/non braking control is also provided.