Abstract: A III-nitride heterojunction power semiconductor device that includes a passivation body with a gate well having a top mouth that is wider than the bottom mouth thereof, and a method of fabrication for the same.

Abstract: A voltage supply circuit for providing an output DC voltage from an input DC voltage bus that includes a III-nitride based power semiconductor device series connected between the input DC voltage bus and an output capacitor, which is switchable from an on state to an off state in order to charge up the output capacitor.

Abstract: According to one embodiment, a system for actively balancing power between several power units is disclosed. Each of the power units includes a corresponding group of cascoded energy cells. The system for actively balancing power comprises a group of buck/boost circuits used in each of the power units for maintaining an internal power balance among the corresponding group of cascoded energy cells, and an energy distribution circuit for responding to a respective energy need in each of the power units. The energy distribution circuit is configured to transfer energy between the power units to balance power among the power units according to their respective energy needs. In one embodiment, a method for actively balancing power between several power units comprises maintaining the internal power balance among the group of cascoded energy cells within each of the power units, and transferring energy between the power units as needed.

Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate for being driven by a driver IC. The stacked half-bridge package further includes a sync transistor having a sync drain for connection to the output terminal, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of a common conductive leadframe with the common conductive leadframe electrically and mechanically coupling the control source with the sync drain. The common conductive leadframe thereby serves as the output terminal.

Abstract: According to one embodiment, a flyback power converter comprises a primary circuit including a flyback driver, and an isolated output circuit responsive to the primary circuit. The isolated output circuit is used to power a load. The flyback driver is configured to identify a load current in the isolated output circuit from an input power to the primary circuit, and to regulate the load current according to the input power. In one embodiment, the flyback driver is configured to sense an input voltage to the flyback power converter, to identify an average current value corresponding to a current through a converter switch in the primary circuit, and to multiply the average current value and the input voltage to determine the input power to the primary circuit.

Abstract: A process to thin semiconductor wafers to less than 50 microns employs a dissolvable photoresist or polyimide or other glue material to hold a thick carrier plate such as a perforated glass to the top surface of a thick processed wafer and to grind or otherwise remove the bulk of the wafer from its rear surface, leaving only the preprocessed top surface, which may include semiconductor device diffusions and electrodes. A thick metal such as copper or a more brittle copper alloy is then conductively secured to the ground back surface and the glue is dissolved and the carrier plate is removed. The wafer is then cleaned and diced into plural devices such as MOSFETs; integrated circuits and the like.

Abstract: A digital audio driver having a floating PWM input and for controlling a stage of high voltage, high speed high- and low-side MOSFETs series connected at a node. The driver includes a floating input interface circuit having a protection circuit to provide secure protection sequence against over-current conditions; and high and low side circuits for driving the high- and low-side MOSFETs, each high and low side circuit including a bi-directional current sensing circuit which requires no external shunt resistors that enables capture of over-current conditions at either positive or negative load current direction. The RDS(ON) of the high- and low-side MOSFETs is used as current sensing resistors, once the RDS(ON) exceeds a pre-determined threshold, an over current output signal is fed to the protection block to shutdown the MOSFET to protect the devices.

Abstract: An integrated circuit resides on a circuit board. During operation, the digital controller integrated circuit produces control signals to control a power supply for delivery of power to a load. The integrated circuit can include multiple connectivity ports, on-board memory, and mode control logic. The multiple connectivity ports such as pins, pads, etc., of the integrated circuit can be configured to provide connections between internal circuitry residing in the integrated circuit and external circuitry residing on a circuit board to which the integrated circuit is attached. The mode control logic monitors a status of one or more connectivity ports of the integrated circuit to detect when a board handler places the digital controller in a power island mode in which the integrated circuit is powered so that the board handler can access (e.g., read/write) the memory in the digital controller integrated circuit while other portions of the board are unpowered.

Abstract: According to one embodiment, a system for actively managing energy banks during an energy transfer process comprises a plurality of energy banks configured for use as a group of energy banks and characterized by a desired state-of-charge (SOC), and a power management system coupled across each of the energy banks. The power management system is configured to selectively drive at least one of the energy banks to a modified SOC different from the desired SOC without interrupting the energy transfer process. In one embodiment, the power management system is further configured to return the energy bank or banks driven to the modified SOC to the desired SOC of the group of energy banks.

Abstract: There are disclosed herein various implementations of a semiconductor structure and method. The semiconductor structure comprises a substrate, a transition body over the substrate, and a group III-V intermediate body having a bottom surface over the transition body. The semiconductor structure also includes a group III-V device layer over a top surface of the group III-V intermediate body. The group III-V intermediate body has a continuously reduced impurity concentration wherein a higher impurity concentration at the bottom surface is continuously reduced to a lower impurity concentration at the top surface.

Abstract: Some exemplary embodiments of a III-nitride power device including a HEMT with multiple interconnect metal layers and a solderable front metal structure using solder bars for external circuit connections have been disclosed. The solderable front metal structure may comprise a tri-metal such as TiNiAg, and may be configured to expose source and drain contacts of the HEMT as alternating elongated digits or bars. Additionally, a single package may integrate multiple such HEMTs wherein the front metal structures expose alternating interdigitated source and drain contacts, which may be advantageous for DC-DC power conversion circuit designs using III-nitride devices. By using solder bars for external circuit connections, lateral conduction is enabled, thereby advantageously reducing device Rdson.

Abstract: A method that includes implantation of dopants while a III-nitride body is being grown on a substrate, and an apparatus for the practice of the method.

Abstract: A semiconductor package which includes a substrate formed from AlN and electrical terminals formed from tungsten on at least one surface of the substrate by bulk metallization to serve as electrical connection to a component within the package.

Abstract: An inverter for driving a motor includes one or more power stages for producing one or more power signals for energizing the motor, each power stage including first and second III-nitride based bi-directional switching devices connected in series between a DC voltage bus and ground.

Abstract: A semiconductor device that includes an electrode of one material and a conductive material of lower resistivity formed over the electrode and a process for fabricating the semiconductor device.

Abstract: According to an exemplary embodiment, a small-outline package includes a power transistor having a source and a drain, the power transistor situated on a paddle of a leadframe of the small-outline package. The source of the power transistor is electrically connected to a plurality of source leads. The drain of the power transistor is electrically and thermally connected to a top side of the paddle of the leadframe, the paddle of the leadframe being exposed from a bottom surface of the small-outline package, thereby providing a direct electrical contact to the drain from a bottom side of the paddle of the leadframe.

Abstract: According to one embodiment, a resonant gate driver comprises a resonant path configured to couple a gate of a power transistor to a supply capacitor, and a low impedance path configured to couple the gate of the power transistor to a voltage rail. The resonant gate driver selectively utilizes the resonant path during charging and discharging of the gate, and selectively utilizes the low impedance path to couple the gate to the voltage rail when the gate is neither charging nor discharging. A method for use by the resonant gate driver for driving the power transistor comprises charging and discharging the gate of the power transistor by selectively coupling the gate to a supply capacitor through a resonant path, and utilizing a low impedance path to selectively couple the gate to a voltage rail when the gate is neither charging nor discharging.

Abstract: An integrated circuit that includes a resistor module with improved linearity is disclosed. The resistor module includes a diffused resistor body of a first conductivity type; a first terminal and a second terminal, each making direct electrical contact with the diffused resistor body; a doped well of a second conductivity type substantially surrounding the diffused resistor body on all but one major surface of the diffused resistor body, the doped well having contact regions; a first amplifier connected to the first terminal and to one contact region of the doped well; and a second amplifier connected to the second terminal and to another contact region of the well, such that the first amplifier and the second amplifier are connected for power supply only to the first terminal and second terminal, respectively. The first and second amplifiers may be unity gain buffer amplifiers or inverting opamps.

Abstract: A PDP sustain driver circuit including at least one high voltage gate driver IC (HVIC) having a logic functional block. The PDP sustain driver circuit includes a signal buffer for receiving two input signals and providing the two signals to the logic functional block; and at least four switches including a charging switch, a discharging switch, a sustain switch and a grounding recovery switch, the HVIC providing a unique control signal from the logic functional block to the four switches to control said four switches.

Abstract: Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g.