Patents Assigned to Intersil
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Publication number: 20090169022Abstract: Systems and methods for implementing over-current protection in amplifiers are provided, including systems, methods and devices for specifying a clip level at which to clip an audio signal in response to an over-current condition being detected. In an embodiment, the clip level is reduced while the over-current condition is being detected. Once the over-current condition is no longer detected, the clip level is maintained for a specified period before allowing the clip level to be increased. In an embodiment, the specified period, for which the clip level is maintained before the clip level is allowed to be increased, starts when the over-current condition is no longer detected, and ends when each of N immediately preceding sample(s) of the audio signal are not clipped to the clip level, where N is an integer, and N?1.Type: ApplicationFiled: December 30, 2008Publication date: July 2, 2009Applicant: INTERSIL AMERICAS INC.Inventor: Michael A. Kost
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Patent number: 7550806Abstract: A sense resistor and integrated circuit package combination is disclosed. A package lead frame is provided having a plurality of landing zones associated therewith and a die mounting area for mounting of a die thereon. The die has a plurality of bond pads associated therewith, with a first bond wire connected between a first one of the landing zones and a second one of the landing zones. The first bond wire forms a sense resistor with a resistance of a known value. A second bond wire is connected between the first one of the landing zones and a first one of the bond pads.Type: GrantFiled: December 26, 2007Date of Patent: June 23, 2009Assignee: Intersil Americas Inc.Inventors: Daniel J. DeBeer, Lance L. Chandler
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Publication number: 20090153193Abstract: A bi-directional buffer is connected between a first node and a second node, wherein the first node is connected by a first pull-up resistor to a first voltage supply rail, and the second node is connected by a second pull-up resistor to a second voltage supply rail. In an embodiment, the bi-directional buffer is enabled when a voltage of the first node does not exceed a first threshold voltage, and/or a voltage of the second node does not exceed a second threshold voltage. However, when the voltage of the first node exceeds the first threshold voltage, and the voltage of the second node exceeds the second threshold voltage, the bi-directional buffer is disabled, which disconnects the first and second nodes. This allows the first node to be pulled up to the first voltage supply rail, and the second node to be pulled up to the second voltage supply rail.Type: ApplicationFiled: May 20, 2008Publication date: June 18, 2009Applicant: Intersil Americas Inc.Inventor: Anatoly Aranovsky
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Publication number: 20090153192Abstract: Provided herein are bi-directional buffers, and methods for providing bi-directional buffering. In an embodiment, a bi-directional buffer includes a differential input/differential output amplifier that includes a first input/output node and a second/input output node. The differential input/differential output amplifier is configurable in a first configuration and a second configuration. When in the first configuration, the second input/output node follows the first input/output node. When in the second configuration, the first input/output node follows the second input/output node.Type: ApplicationFiled: April 1, 2008Publication date: June 18, 2009Applicant: INTERSIL AMERICAS INC.Inventor: Anatoly Aranovsky
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Patent number: 7547592Abstract: In accordance with an embodiment of the invention, there is an integrated circuit device having a complementary integrated circuit structure comprising a first MOS device. The first MOS device comprises a source doped to a first conductivity type, a drain extension doped to the first conductivity type separated from the source by a gate, and an extension region doped to a second conductivity type underlying at least a portion of the drain extension adjacent to the gate. The integrated circuit structure also comprises a second complementary MOS device comprising a dual drain extension structure.Type: GrantFiled: February 24, 2006Date of Patent: June 16, 2009Assignee: Intersil Americas, Inc.Inventor: James Douglas Beasom
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Publication number: 20090146635Abstract: The DC/DC voltage converter comprises at least one switching transistor. An inductor is connected to the at least one switching transistor. A pulse width modulation circuit generates control signals to at least one switching transistor responsive to a current control signal. A current sensor connected in parallel with the inductor senses current passing through the inductor. The sensor comprises a resistor and an NTC capacitor connected in series with the resistor. Circuitry for monitoring the voltage across the NTC capacitor generates the current control signal responsive to the monitored voltage.Type: ApplicationFiled: December 5, 2008Publication date: June 11, 2009Applicant: INTERSIL AMERICAS INC.Inventors: WEIHONG QIU, CHRIS T. BURKET, GUSTAVO JAMES MEHAS
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Patent number: 7546397Abstract: Methods and systems for allowing multiple devices to share the same serial lines (e.g., SDIO, SEN and SCLK) are provided. Such devices can be located, e.g., on an optical pick-up unit. Each device includes a serial interface, a device enable number (DEN) that differs from the DEN of each other device, and a plurality of registers, with at least one register being designated a device select register (DSR). The DSRs of the plurality of devices share a common address. The plurality of serial interfaces are collectively enabled and collectively disabled (e.g., via the SEN line). However, only one of the plurality of serial interfaces can be selected at one time, with the remaining of the plurality of serial interfaces being deselected. The serial interface of a device is selected when the DEN of the device is the same as the content of the DSR of the device, and deselected when the DEN of the device is not the same as the content of the DSR of the device.Type: GrantFiled: January 19, 2007Date of Patent: June 9, 2009Assignee: Intersil Americas Inc.Inventors: Theodore D. Rees, D. Stuart Smith, Dong Zheng
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Publication number: 20090143884Abstract: Systems and methods are provided for converting input data streams having variable input sample rates to an output sample rate, which systems and methods are used in processing the data streams. In one embodiment, a system includes a clock source, a counter configured to count cycles for a corresponding data stream, and a data processor. The data processor is configured to read the number of cycles counted by the counter between received frame sync signals and to convert the first data stream to the predetermined output sample rate based on the corresponding number of cycles counted.Type: ApplicationFiled: December 23, 2008Publication date: June 4, 2009Applicant: INTERSIL AMERICAS INC.Inventors: Daniel L.W. Chieng, Jack B. Andersen, Larry E. Hand
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Publication number: 20090140711Abstract: A controller for a switching regulator is disclosed including a sense circuit, an error amplifier circuit, a filter and reference circuit, and a comparator circuit. The switching regulator includes a pulse switch circuit coupled to an output inductor for developing an output voltage. The sense circuit provides a sense signal indicative of current through the output inductor. The error amplifier circuit develops an error signal indicative of error of the output voltage. The filter and reference circuit high pass filters the sense signal to provide a filtered sense signal, and references the filtered sense signal and the error signal to a common DC level. The comparator circuit develops a pulse control signal used to control switching of the pulse switch circuit based on comparing the error signal with the filtered sense signal.Type: ApplicationFiled: November 26, 2008Publication date: June 4, 2009Applicant: Intersil Americas Inc.Inventors: Rhys S. A. Philbrick, Matthew B. Harris, Steven P. Laur
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Patent number: 7542342Abstract: A multiple time programmable (MTP) memory cell, in accordance with an embodiment, includes a floating gate PMOS transistor, a high voltage NMOS transistor, and an n-well capacitor. The floating gate PMOS transistor includes a source that forms a first terminal of the memory cell, a drain and a gate. The high voltage NMOS transistor includes a source connected to ground, an extended drain connected to the drain of the PMOS transistor, and a gate forming a second terminal of the memory cell. The n-well capacitor includes a first terminal connected to the gate of the PMOS transistor, and a second terminal forming a third terminal of the memory cell. The floating gate PMOS transistor can store a logic state. Combinations of voltages can be applied to the first, second and third terminals of the memory cell to program, inhibit program, read and erase the logic state.Type: GrantFiled: August 23, 2006Date of Patent: June 2, 2009Assignee: Intersil Americas Inc.Inventors: Alexander Kalnitsky, Michael Church
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Patent number: 7541797Abstract: A control circuit for a DC voltage supply is provided that includes a circuit, an error amplifier and modulator. The circuit is operable to measure a voltage difference between a negative voltage rail and a ground reference in the DC voltage supply. The circuit is further operative to create an offset voltage proportional with the measured voltage difference. The circuit is further yet operative to add the offset voltage to a reference voltage to create a modified reference voltage. The error amplifier has a first input coupled to receive the modified reference voltage and a second input coupled to a positive voltage rail in the DC voltage supply. The error amplifier further has an output. The modulator is coupled to the output of the error amplifier. The modulator is operative to maintain the positive rail at a select value corresponding to the modified reference voltage.Type: GrantFiled: March 3, 2008Date of Patent: June 2, 2009Assignee: Intersil Americas Inc.Inventors: Noel B. Dequina, Robert H. Isham
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Publication number: 20090128237Abstract: Systems and methods implemented in a switching amplifier for providing consistent, matching switching between top and bottom switching devices in a switching amplifier. One embodiment includes a half-bridge circuit output stage, a driver stage and a transformer. The driver stage, which drives the switches of the output stage, is very fast, has a low propagation delay, and has minimal input capacitance. The transformer drives the drive paths from the transformer inputs to the switches. The transformer avoids resonances within the audio band and at the amplifier switching frequencies, has low and spread free leakage inductance, has enough magnetizing inductance to keep transformer currents low in proportion to the total driver stage current drain, has low core losses at the switching frequency, has minimal inductance change and operates well below its saturation point. The amplifier stage provides a substantially constant amplitude drive signal to the output power switching devices.Type: ApplicationFiled: November 13, 2008Publication date: May 21, 2009Applicant: INTERSIL AMERICAS INC.Inventors: Brian E. Attwood, Wilson E. Taylor, Larry E. Hand
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Patent number: 7535211Abstract: A voltage regulator which includes a network for improved compensation for reference voltage changes includes an IC including an error amplifier and a pulse width modulator (PWM), wherein an input of the PWM is coupled to an output of the error amplifier. A low pass filter comprising an inductor is in series with a grounded capacitor coupled to an output of the PWM, wherein an output of the regulator (Vout) is at a node between the inductor and the capacitor. A first feedback network is disposed between Vout and an inverting input of the error amplifier and a second feedback network is disposed between an output of the error amplifier and the inverting input of the error amplifier. A current cancellation network is coupled to the inverting input of the error amplifier.Type: GrantFiled: September 27, 2006Date of Patent: May 19, 2009Assignee: Intersil Americas Inc.Inventor: Robert H. Isham
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Publication number: 20090121889Abstract: In an embodiment, a proximity sensor includes a driver, a photo-diode (PD) and an analog-to-digital converter (ADC). The proximity sensor can also include a controller to control the driver. The driver selectively drives a light source, e.g., an infrared (IR) light emitting diode (LED). The PD, which produces a current signal indicative of the intensity of light detected by the PD, is capable of detecting both ambient light and light produced by the light source that is reflected off an object. The ADC receives one or more portion of the current signal produced by the PD. The ADC produces one or more digital output that can be used to estimate the proximity of an object to the PD in a manner that compensates for ambient light detected by the PD and transient changes to the detected ambient light.Type: ApplicationFiled: April 10, 2008Publication date: May 14, 2009Applicant: INTERSIL AMERICAS INC.Inventors: Xijian Lin, Zhong Li, Wendy Ng, Phillip J. Benzel, Oleg Steciw
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Publication number: 20090121698Abstract: A bandgap voltage reference circuit includes a first circuit portion and a second circuit portion. The first circuit portion generates a voltage complimentary to absolute temperature (VCTAT). The second circuit portion generates a voltage proportional to absolute temperature (VPTAT) that is added to the VCTAT to produce a bandgap voltage reference output. The first circuit portion includes a plurality of delta base-emitter voltage (VBE) generators, connected as a plurality of stacks of delta VBE generators. Each delta VBE generator can include a pair of transistors that operate at different current densities and thereby generate a difference in base-emitter voltages (?VBE). The plurality of delta VBE generators within each stack are connected to one another, and the plurality of stacks of delta VBE generators are connected to one another, such that the ?VBEs generated by the plurality of delta VBE generators are arithmetically added to produce the VPTAT.Type: ApplicationFiled: January 2, 2008Publication date: May 14, 2009Applicant: INTERSIL AMERICAS INC.Inventor: Barry Harvey
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Patent number: 7528655Abstract: An embodiment of an amplifier includes an amplifier output node operable to provide an output signal, and an output stage. The output stage includes a drive buffer having an input node and an output node, a drive transistor, and a compensation capacitor. The drive transistor has a control node coupled to the output node of the drive buffer, a first drive node, and a second drive node coupled to the amplifier output node. And the compensation capacitor has a first node isolated from the control node of the drive transistor by the drive buffer, and has a second node coupled to the amplifier output node. By buffering the control node of the drive transistor, one may reduce the level of nonlinear current referred back to the amplifier input as a nonlinear offset voltage, and thus may reduce the level of nonlinear distortion that his nonlinear offset voltage generates at the amplifier output.Type: GrantFiled: August 3, 2006Date of Patent: May 5, 2009Assignee: Intersil Americas Inc.Inventors: Philip Golden, Peter Mole, Barry Harvey
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Patent number: 7528818Abstract: An apparatus and method for controlling the operation of a utility device, such as a cold cathode fluorescent lamp that is powered in accordance with a pulse width modulation (PWM) signal, includes an analog sensor which monitors the utility device to derive an output signal representative of the PWM signal. An integrating analog-to-digital converter (ADC), which is coupled to the sensor and has its operation synchronized with an integral multiple of the period of the PWM signal, produces an output representative of an average of the output of the utility device.Type: GrantFiled: September 28, 2005Date of Patent: May 5, 2009Assignee: Intersil Americas Inc.Inventors: Dong Zheng, Robert L. Lyle, Jr., Barry Harvey, Brian B. North
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Patent number: 7528634Abstract: A voltage comparator contains low voltage devices (e.g., bipolar or MOS transistors) and high voltage devices (e.g., DMOS transistors). The low voltage devices, which cannot sustain a voltage greater than a relatively small range of variation that is substantially less than the range of potential variation of the input voltage, are connected in a differential amplifier configuration to perform precision differential measurements on the input voltage. The high voltage devices are interconnected with the low voltage devices in a manner that enables operating levels of the low voltage devices to move up/down, or ‘slide’, with variations in the input voltage, so that the low voltage devices are effectively immune to high levels of the input voltage.Type: GrantFiled: June 28, 2006Date of Patent: May 5, 2009Assignee: Intersil Americas Inc.Inventor: Sumer Can
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Publication number: 20090108826Abstract: A modulator for use with a voltage regulator includes an input for receiving an input voltage, an output for providing a periodic triangular wave form and at least one input for receiving an indication that the voltage regulator is in a discontinuous current mode of operation. The circuitry within the modulator generates the periodic triangular wave form responsive to the input voltage and the indication that the voltage regulator is in the discontinuous current mode of operation. The circuitry further continuously increases a period of the periodic triangular wave form responsive to a decreased load in a discontinuous current mode of operation of the voltage regulator.Type: ApplicationFiled: July 15, 2008Publication date: April 30, 2009Applicant: INTERSIL AMERICAS INC.Inventors: Eric Magne Solie, Robert Leon Lyle, JR.
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Publication number: 20090102447Abstract: A constant-on-time power-supply controller includes an adder and a control circuit. The adder generates a sum of a sense voltage and a regulated output voltage generated by a filter inductor. The sense voltage is generated by a sense circuit that sources a current to the filter inductor while the inductor is uncoupled from an input voltage, and the sense voltage is related to the current. The control circuit couples the filter inductor to the input voltage for a predetermined time in response to the sum having a predetermined relationship to a reference voltage. Such a power-supply controller may yield a relatively tight regulation of the output voltage even with a power supply having with a low-ESR filter capacitor, and may do so with little or no additional compensation circuitry as compared to prior controllers and with no additional pin on the power-supply-controller chip.Type: ApplicationFiled: October 20, 2008Publication date: April 23, 2009Applicant: INTERSIL AMERICAS INC.Inventors: Da Feng Weng, Jinrong Qian