Abstract: An image intensifier tube having an electromagnetic interference protection arrangement. The protection is accomplished by shielding the tube and filtering the power supply. Shielding is performed by means of a conductive metallic coating which surrounds the image intensifier tube housing. Filtering is accomplished by using capacitors to short the interference to ground.

Abstract: A filter circuit is driven by two digital phase responsive output signals from the frequency/phase discriminator of a phase-locked loop (PLL) circuit. The controlled current paths of a first n-conducting transistor, a second n-conducting transistor, a second p-conducting transistor and a first p-conducting transistor are connected in that order between the plus and minus poles of a source of supply voltage. The common connection between the controlled current paths of the second n-conducting transistor and the second p-conducting transistor is connected to the output of the filter circuit.

Abstract: A discrete device in which a capacitive and inductive function has been integrated is comprised of at least two insulated amorphous ribbons which are spirally wound to form a cylindrical toroid. Each of the amorphous metal ribbons is insulated from each other ribbon by a dielectric layer and wound in a stacked configuration to provide the capacitive function. Two conductive windings are then wrapped around segments of the cylindrical toroid to provide inductive and/or transforming functions as desired. A magnetic circuit is formed through the windings by the amorphous metal ribbons. A dielectric insulating layer between the ribbons is offset from the longitudinal edge of the ribbon so that the longitudinal edge of each ribbon is exposed. One ribbon has its longitudinal edge exposed on one surface of the toroid while another ribbon has its longitudinal edge exposed on the opposing surface of the toroid.

Abstract: A CMOS/NMOS integrated circuit realizes individual logic circuits with a combination of CMOS and enhancement-mode NMOS devices. The parameters of the CMOS and NMOS devices are selected such that the supply voltage dependency of the CMOS devices is offset by the supply voltage dependency of the NMOS devices. Thus, the propagation delays in the CMOS and NMOS devices, individually a function of supply voltage, remain constant for variations in the supply voltage. The logic circuits include analog-to-digital converters, adders, multipliers, flip flops and ring oscillators. The ring oscillator includes two blocks of inverters. The first block comprises CMOS inverters connected in series; the second block comprises enhancement-mode NMOS inverters connected in series. The output of the first block is connected to the input of the second block, and the output of the second block is connected to the input of the first block, thus forming a "ring" of inverters.

Abstract: A connector for an IC memory card having a printed circuit member mounted within the housing of the card which extends into a slot opening at the edge of the card. The connector contains two rows of contacts which are engageable with conductive traces on the opposite sides of the printed circuit member when the card is inserted into the connector. The contacts in the connector are reversely bent to form inner arms joined to outer arms by nose portions. The inner arms of the contacts in the two rows are normally spaced apart a distance greater than the thickness of the printed circuit member so that when the card is initially inserted into the connector, the noses of the contacts will pass freely over the border of the printed circuit member. Thereafter, the sidewalls of the housing of the card cam the outer arms of the contacts inwardly, forcing the inner arms into engagement with the traces on the printed circuit member in the card.

Abstract: A composite buffer layer is formed with a layer of GaAs on a semi-insulating GaAs substrate. Next a short period superlattice is formed followed by another GaAs layer. A layer of GaAlAs is then provided such that the Ai content and no doping followed by an intrinsic GaAs layer. The intrinsic GaAs layer is the active layer which serves as a channel.

Abstract: A power drive system for opening and closing the sliding side door of a van type vehicle includes an inclination detector controlled control circuit for adjustably regulating the closing force applied to the door in approximate proportion to the inclination of the vehicle to provide sufficient power to close the door when the vehicle is parked on an uphill grade while providing a reduced amount of power to close the door when the vehicle is on level ground.

Abstract: A connector for connecting the confronting ends of tubing sections. The connector includes a connector body having an opening therein which extends therethrough along a longitudinal axis of the housing. The housing includes as first end for connection to the confronting end of a first tubing section. A first annular chamber is provided in the housing between the first end and the second end of the housing for receiving a generally annular seal therein which sealingly engages a second tubing section. A generally cylindrical retaining clip is provided in the housing between the seal and the second end of the housing. The clip includes a pair of diametrically opposed portions thereon which are radially deflectable relative to the axis of the housing.

Abstract: A fail-safe port apparatus includes a low loss liquid crystal optical switching device providing first and second light paths, the first path providing a failure, or default, mode path and the second path providing an operating mode.

Abstract: There is disclosed a high frequency communication system of the type employing a high frequency terminal which terminal can transmit a processed signal in a transmitting mode or process a received signal in a receiving mode which terminal includes a first subsystem for voice processing, including a processor responsive to voice signals to provide a linear predictive coded voice signal at a given data rate which signal is coupled to a data modem subsystem that digitally encrypts said voice signal which data modem subsystem is coupled to a modem processor subsystem capable of processing said encrypted signal for providing frequency hopping, feedback equalization, intersymbol interference cancellation, error correction and interleaving to provide a transmitted signal which is relatively immune to jamming during said transmitting mode which includes a convolutional encoder means included in said modem processor subsystem responsive to said encrypted signal to provide a convoluted signal at a higher data rate than

Abstract: A microchannel electron multiplier is formed by placing into a glass tube a plurality of bundles optical fibers, each having an etchable glass core and a glass cladding which is non-etchable when subjected to the conditions used for etching the core material. The fiber bundles located around the inside edge of the glass tube are replaced by support fibers having both a core and a cladding of a material which is non-etchable under the above-described conditions. The assembly of the tube, bundles and support fibers is heated to fuse the tube, bundles and support fibers together. The etchable core material is then removed and the assembly sliced into wafers. The inner surface of each of the claddings which bound the channel formed after removal of the core material is rendered electron emissive by reduction of the lead oxide by hydrogen gas. Metal films are deposited onto the opposed surfaces of each of the wafers to form contacts.

Abstract: A credit card type small thin rectangular IC Card has a battery and an IC comprising a CPU, a ROM and a RAM mounted on a flexible printed circuit and bonded within an insulative plastic material. The printed circuit of the card has a plurality of electrode terminals exposed in a parallel array along at least one edge of the card which are adapted to engage contacts of a mating socket. The printed circuit terminals are manufactured by coating copper, nickel and gold over polyamide resin and squeeze finishing the leading edge. The mating socket comprises a general U-shaped frame having a U-shaped channel adapted to receive the IC card and having internal recessed contacts adapted to engage the terminals of the IC card. The contacts extend from an exterior surface of the frame for interconnection with the circuits of a mating device. Downwardly projecting portions thereof are bent at least twice in the portion penetrating the bottom of the frame.

Abstract: A centrifugal pump has a floating casing ring which is deflectable in response to contact by an impeller of the pump.

Abstract: A pressure/differential pressure measuring device having a range plate with static and differential pressure sensors mounted therein. A high pressure isolation plate is mounted on one side of the range plate with a high pressure diaphragm mounted on the side of the high pressure isolation plate away from the range plate and sealed thereto forming a first fluid chamber between the inside of the high pressure diaphragm and the high pressure isolation plate side of the sensor assemblies. A low pressure isolation plate is mounted on the other side of the range plate with a low pressure diaphragm mounted on the side of the low pressure isolation plate away from the range plate and sealed thereto forming a second fluid chamber between the inside of said low pressure diaphragm and the low pressure isolation plate side of the sensor assemblies.

Abstract: A first plurality of spaced radar ground systems and a second plurality of radar ground systems positioned in between adjacent pairs of the first systems. The first systems, when employed in an early warning radar chain, preferably have antennas which are mechanically rotatable. The second systems are then provided with phased arrays to enable two-way communication without it being necessary to stop any scanning movement of a corresponding first system antenna.

Abstract: A modular socket insert assembly is described, which can fit into the male ends of two substantially identical connectors to connect them, wherein the socket insert assembly can be easily taken apart in the field for cleaning or replacement of a damaged socket. The socket insert assembly includes a pair of insulators having inner ends that substantially abut one another and having aligned holes for holding a group of separate socket modules. The hole in each insulator is wide at the inner end of the insulators where they abut one another, and is narrowed at the outer ends of the insulators, to trap a socket module in place.

Abstract: A semiconductor read only memory (ROM) serves to store digitized audio signals in a redundancy free form. The output of the memory is coupled to the input of a data expander in the playback circuit. The memory may also store an algorithm which serves to control operation of the data expander before the signals are further processed via a digital-to-analog converter and where the output of the digital/analog converter is then coupled to the input of an analog amplifier and then to a loud speaker arrangement. In this manner, digitized audio signals can be operated on by either error correcting modules or data expansion modules, both of which modules may include microprocessors where the algorithms for control of the microprocessors are also stored within the read only memory. In this manner, all mechanical movements between the storage medium and the pick up devices, which are typical of the prior art, is eliminated as the main storage medium consists of a read only memory or a plurality of such devices.

Abstract: A zero insertion force edge card connector is described, for connecting to cards with closely-spaced conductive pads, which is rugged and reliable. The connector includes numerous elongated contacts, each having a middle portion embedded in a dielectric frame element, a terminal end portion extending from the frame towards a card-receiving region, and a tail portion extending from the frame element to a base. The frame element is movably supported on the base by the flexible tail portions of the contacts, and can move towards and away from the card-receiving region by bending of the tail portions. The multiple contacts avoid uncontrolled rotation of the frame element. A spring urges a pair of frame elements together, and a cam controls movement of the frame elements.

Abstract: A television receiving section includes only a single A/D converter, and, thus, only a single interface between the analog portion and the digital portion. Preferably, the A/D converter is positioned after the intermediate-frequency stage of the television receiving section. The A/D converter is clocked at about 20 MHz. The digital portion of the television receiving section includes a video channel and an audio channel. The video channel includes at its input end a band-pass filter whose passband extends from 1 MHz to 6 MHz and whose output signals are fed directly and through a 90.degree. phase shifter to a first absolute-value stage, which delivers the digital composite color signal. The audio channel includes at its input end a quadrature mixer (operating from a locally generated clock having a frequency of 7 MHz to 7.5 MHz) whose two output signals are fed through a first decimator and a second decimator, respectively, to a second absolute-value stage and an angle-computing stage.

Abstract: A digital FIFO memory is disclosed which is formed by a memory cell array (zf) comprising of n signal channels (b1 . . . bn) each containing m memory cells (c..1, c..2, c..m-1, c..m) are first, second, and mth clock drivers (tt1, tt2, ttm-1, ttm), respectively, which are controlled by a basic clock signal (g1) and further signals. Thus FIFO memory makes it possible to pass an input data stream arriving at an input data rate (g2) through the FIFO memory in such a way that the output data stream appears at the output (da) at an output data rate (g3) momentarily different from the input data rate (g2). On a time average, however, the two data rates are equal, so that data can be written into and read from the FIFO memory simultaneously at different rates.