Abstract: Embodiments of the present invention provide methods and circuitry for protecting a circuit during hot-swap events. Hot swap protection circuitry includes as overcurrent detection circuit which decouples power from a load. Circuitry is provided to detect ground-fault conditions. Noise detection circuitry is provided to reduce noise in the power that is delivered to the load.

Abstract: A power device includes a semiconductor die having an upper surface and a lower surface. One or more terminals are coupled to the die. A first substrate is bonded to the upper surface of the die. The first substrate is configured to provide a first heat dissipation path. A second substrate is bonded to the lower surface of the die. The second substrate is configured to provide a second heat dissipation path.

Abstract: Embodiments of the present invention are directed to packaged power semiconductor devices and direct-bonded metal substrates thereof. In one embodiment, a method for manufacturing a power semiconductor device comprises inserting a substrate assembly into a furnace having a plurality of process zones. The substrate assembly includes a first aluminum layer and a second aluminum layer that are electrically isolated from each other by a dielectric layer. The method further comprises providing the substrate assembly successively into each of the plurality of process zones to bond the first and second aluminum layers to the dielectric layer and obtain a direct bonded aluminum (DAB) substrate, attaching a semiconductor die to the first aluminum layer of the DAB substrate, and forming an enclosure around the semiconductor die and the DAB substrate while exposing a substantial portion of the second aluminum layer for enhanced heat dissipation.

Abstract: A gate driver includes a control signal generator having a first input and configured to output a gate control signal to a power semiconductor switch. The gate control signal generator is provided proximate a high side of the gate driver. A first sub-circuit has a first signal path and a second signal path that are suitable for transmitting signals. The first and second signal paths are coupled to the first input of the gate control signal generator. The second signal path is configured to provide a signal to the first input with a reduced signal delay. A comparator is configured to receive signals from the high side. The comparator is provided proximate a low side of the gate driver.

Abstract: A method for operating an alternating-current (AC) controller system includes providing a first bi-directional switch coupled to a load and an AC power source. The first bi-directional switch is a solid-state device. The first switch is turned on in a first half-cycle of an AC cycle. The first switch is turned off in the first half-cycle of the AC cycle.

Abstract: An active power filter includes a feedback resistor and a shunt capacitor, an operational amplifier equivalent subcircuit, and a voltage drop source. The shunt capacitor connects the positive terminals of the low noise power supply and the noisy load to the positive terminal of the operational amplifier equivalent subcircuit. The feedback resistor connects the negative terminal of the noisy load and the output of the operational amplifier equivalent subcircuit to the negative terminal of the shunt capacitor. The voltage drop source connects the negative terminal of the low noise power supply to the negative terminal of the operational amplifier equivalent subcircuit. The operational equivalent subcircuit includes an operational amplifier, three resistors, three capacitors, and a transistor. The first resistor connects the positive terminal of the voltage drop source to the negative input terminal of the operational amplifier.

Abstract: Embodiments of the present invention provide methods and circuitry for protecting a circuit during hot-swap events. Hot swap protection circuitry includes as overcurrent detection circuit which decouples power from a load. Circuitry is provided to detect ground-fault conditions. Noise detection circuitry is provided to reduce noise in the power that is delivered to the load.

Abstract: A gate driver includes a gate control signal generator having a first input and configured to output a gate control signal to a power semiconductor switch and a first sub-circuit having a first signal path and a second signal path that are suitable for transmitting signals. The first and second signal paths are coupled to the first input of the gate control signal generator. The second signal path is configured to provide a signal to the first input with a reduced signal delay.

Abstract: A power semiconductor device includes a substrate having an upper surface and a lower surface. The substrate has a trench. First and second doped regions are provided proximate the upper surface of the substrate. A first source region is provided within the first doped region. A second source region is provided within the second doped region. A gate is provided between the first and second source regions. The gate includes a first portion extending downward into the trench. A depth of the trench is no more than a depth of the first doped region.

Abstract: A power device includes a semiconductor substrate of first conductivity having an upper surface and a lower surface. An isolation diffusion region of second conductivity is provided at a periphery of the substrate and extends from the upper surface to the lower surface of the substrate. The isolation diffusion region has a first surface corresponding to the upper surface of the substrate and a second surface corresponding to the lower surface. A peripheral junction region of second conductivity is formed at least partly within the isolation diffusion region and formed proximate the first surface of the isolation diffusion region. First and second terminals are provided.

Abstract: A power semiconductor device includes a substrate of first conductivity having a dopant concentration of a first level. The substrate is a group III-V compound material. A transitional layer of first conductivity is epitaxially grown over the substrate. The transitional layer has a dopant concentration of a second level and is a group III-V compound material. An epitaxial layer of first conductivity is grown over the transitional layer and has a dopant concentration of a third level. Electrical currents flow through the transitional and epitaxial layers when the device is operating.

Abstract: A radio frequency power device includes a substrate including a first conductive layer, a second dielectric layer, and a third conductive layer. The first conductive layer is bonded to the second dielectric layer, and the second dielectric layer is bonded to the third conductive layer. The first and third conductive layers are electrically isolated from each other. A semiconductor die is bonded to the first conductive layer of the substrate. A plastic package encloses and protects the semiconductor die. A plurality of leads extend outwardly from the plastic package. The leads have blade-like shapes.

Abstract: A power device compatible with an SOT 227 package standard. The device includes a substrate including a first conductive layer, a second dielectric layer, and a third conductive layer. The first conductive layer is bonded to the second dielectric layer, and the second dielectric layer is bonded to the third conductive layer. The first and third conductive layers are electrically isolated from each other. The first conductive layer has been patterned to provide at least first and second conductive blocks. A semiconductor die is bonded to the first block of the first conductive layer of the substrate. A terminal lead is coupled to the second block of the first conductive layer of the substrate.

Abstract: A power device includes a semiconductor substrate of first conductivity type. The semiconductor substrate includes a front-side surface, a backside surface, and a scribe region. The substrate has a first well of second conductivity type whereon an active cell is defined. The first well has a first impurity type of a first mobility. A continuous diffusion region of second conductivity type extends from the front-side surface to the backside surface. The continuous diffusion region includes a second impurity type of a second mobility that has been diffused vertically into the substrate from a selected location of the backside surface. The second mobility is higher than the first mobility. A lower portion of the continuous diffusion region corresponds to the selected location of the continuous diffusion region.

Abstract: A method for forming a high voltage insulated gate bipolar transistor (“IGBT”) includes providing a semiconductor substrate of first conductivity type. The semiconductor substrate includes a front-side surface, a backside surface, and a scribe region. The substrate further includes a plurality of active cells on the front-side surface. A drain region of second conductivity type is formed using a first impurity proximate the backside surface of the substrate. A continuous conductive region of second conductivity type is formed using a second impurity that has been provided into the substrate from the backside surface of the substrate. The continuous conductive region extends from the front-side surface to the backside surface. The second impurity has a higher mobility than the first impurity.

Abstract: An active area of a power device comprises active cells having designs that vary depending on where they are located in the active area. Design variations include structural variations and variations in the material used to produce the cells.

Abstract: A packaged power semiconductor device (24) with voltage isolation between a metal backside (34) and the terminals (38) of the device. A direct-bonded copper (“DBC”) substrate (28) is used to provide electrical isolation and good thermal transfer from the device to a heatsink. A power semiconductor die (26) is soldered or otherwise mounted to a first metal layer (30) of the DBC substrate. The first metal layer spreads heat generated by the semiconductor die. The leads and die may be soldered to the DBC substrate in a single operation. In one embodiment, over 3,000 Volts of isolation is achieved. In another embodiment, the packaged power semiconductor device conforms to a TO-247 outline.

Abstract: A power semiconductor device includes a substrate having an upper surface and a lower surface. A source region of first conductivity is formed within a well region of second conductivity. The source region is provided proximate to the upper surface of the substrate. The well region has a non-polygon design. A gate electrode overlies the upper surface of the substrate. A drain electrode is provided proximate to the lower surface of the substrate.

Abstract: Embodiments of the present invention are directed to packaged power semiconductor devices and direct-bonded metal substrates thereof. In one embodiment, a method for manufacturing a power semiconductor device comprises inserting a substrate assembly into a furnace having a plurality of process zones. The substrate assembly includes a first aluminum layer and a second aluminum layer that are electrically isolated from each other by a dielectric layer. The method further comprises providing the substrate assembly successively into each of the plurality of process zones to bond the first and second aluminum layers to the dielectric layer and obtain a direct bonded aluminum (DAB) substrate, attaching a semiconductor die to the first aluminum layer of the DAB substrate, and forming an enclosure around the semiconductor die and the DAB substrate while exposing a substantial portion of the second aluminum layer for enhanced heat dissipation.

Abstract: Embodiments of the present invention are directed to packaged power semiconductor devices and direct-bonded metal substrates thereof. In one embodiment, a method for manufacturing a power semiconductor device comprises inserting a substrate assembly into a furnace having a plurality of process zones. The substrate assembly includes a first aluminum layer and a second aluminum layer that are electrically isolated from each other by a dielectric layer. The method further comprises providing the substrate assembly successively into each of the plurality of process zones to bond the first and second aluminum layers to the dielectric layer and obtain a direct bonded aluminum (DAB) substrate, attaching a semiconductor die to the first aluminum layer of the DAB substrate, and forming an enclosure around the semiconductor die and the DAB substrate while exposing a substantial portion of the second aluminum layer for enhanced heat dissipation.