Abstract: A power device includes a semiconductor die having an upper surface and a lower surface. One or more terminals are coupled to the die. A first substrate is bonded to the upper surface of the die. The first substrate is configured to provide a first heat dissipation path. A second substrate is bonded to the lower surface of the die. The second substrate is configured to provide a second heat dissipation path.

Abstract: A power supply circuit, comprising a first reverse blocking transistor coupled to an AC power line; a second reverse blocking transistor coupled to the AC power line; a first inductor provided between the first reverse blocking transistor and the AC power line and configured to store energy; a first diode having a first terminal that is coupled to one end of the first inductor; a first capacitor having a terminal that is coupled to a second terminal of the first diode; and a first output terminal provided between the first diode and the first capacitor. The first and second transistors are arranged in an anti-parallel configuration and together define an AC switch.

Abstract: Embodiments of the present invention provide methods and circuitry for protecting a circuit during hot-swap events. Hot swap protection circuitry includes as overcurrent detection circuit which decouples power from a load. Circuitry is provided to detect ground-fault conditions. Noise detection circuitry is provided to reduce noise in the power that is delivered to the load.

Abstract: A heatsink for a power device comprises an upper conductive plate providing a first surface; a lower conductive plate providing a second surface; a middle conductive plate provided between the upper and lower plates, the middle plate having a hollow portion and a solid portion, the hollow portion defining an area to receive coolant, wherein the power device is provided on the first or second surface, so that heat generated by the power device can be transferred to the coolant. The heatsink further comprises an input port coupled to the hollow portion of the middle plate to provide the coolant into the hollow portion; and an output port coupled to the hollow portion of the middle plate to remove the coolant from the hollow portion.

Abstract: A radio frequency (RF) generator comprises a first half bridge including first and second power transistors; a second half bridge including first and second power transistors; an output node coupling the first and second half bridges and RF signals to a load; positive and negative rails coupled to a power source; a first blocking capacitor provided between the positive rail and the load; a second blocking capacitor provided between the negative rail and the load; and an offline rectification circuit configured receive an alternating current (AC) from an AC power source and output a direct current (DC) to the first and second bridges, wherein the first and second blocking capacitors are configured to isolate the load from the AC power source.

Abstract: A radio frequency (RF) generator comprises a first half bridge including first and second power transistors; a second half bridge including first and second power transistors; an RF output node coupling output nodes of the first and second half bridges, the output node outputting RF signals to a load; positive and negative rails coupled to a power source; and a first commutation inductor provided to store energy to commutate at least one of the half bridges.

Abstract: A radio frequency (RF) generator includes a first half bridge including first and second power transistors; a second half bridge including first and second power transistors; an output node coupling the first and second half bridges and RF signals to a load; positive and negative rails coupled to an AC power source via a rectifier; a first blocking capacitor provided between the positive rail and the load; a second blocking capacitor provided between the negative rail and the load; and a voltage regulator configured to output a given voltage to the first and second bridges, wherein the first and second blocking capacitors are configured to isolate the load from the AC power source.

Abstract: A radio frequency (RF) generator comprises a first half bridge including first and second power transistors; a second half bridge including first and second power transistors; an output node coupling the first and second half bridges and RF signals to a load; positive and negative rails coupled to an AC power source via rectifier; a first blocking capacitor provided between the positive rail and the load; and a second blocking capacitor provided between the negative rail and the load. The first and second blocking capacitors are configured to isolate the load from the AC power source.

Abstract: A method for forming a high voltage semiconductor power device comprises providing a first dopant source of first conductivity on an upper surface of a substrate of second conductivity. A second dopant source of first conductivity is provided on a lower surface of the substrate. The substrate is annealed for a first given time to drive the dopants from the first and second dopants sources into the substrate. The first and second dopant sources are removed from the upper and lower surfaces of the substrate. The substrate is annealed for a second given time to homogenize dopant concentration within the substrate after the first and second dopant sources have been removed, where the annealing the substrate for the second given time results in out-diffusion of dopants proximate the upper and lower surfaces of the substrate.

Abstract: A vertical power semiconductor device comprises a substrate including a first layer that is a first conductivity type. A first conductive region is provided proximate an upper surface of the substrate, the first conductive region being a second conductivity type that is different from the first conductivity type. A first electrode is provided proximate the upper surface of the substrate and coupled to the first conductive region. A second electrode is provided proximate a lower surface of the substrate. A passivation structure including first and second dielectric layers provided over the upper surface of the substrate. One or more field plates of first type are provided between the first and second dielectric layers.

Abstract: A fast switching diode includes an n? layer having an upper surface and a lower surface and a first edge and a second edge, the second edge provided on an opposing side of the first edge. A converted region is provided proximate the upper surface of the n? layer. The converted region includes platinum and has a first depth. The converted region has a platinum concentration that is substantially greater than an n-type dopant concentration in the converted region. First and second n+ regions are provided proximate the first and second edges of the n? layer, respectively, and extend from the upper surface of the n? layer to second and third depths, respectively. Each of the second and third depths is greater than the first depth to reduce leakage current. A first electrode is provided proximate the upper surface of the n? layer. A second electrode is provided proximate the lower surface of the n? layer.

Abstract: A power device includes a gate electrode, a source electrode, and a drain electrode provided within an active region of a semiconductor substrate of first conductivity type. A vertical diffusion region of second conductivity is provided at a periphery the active region. The vertical diffusion region extends continuously from a top surface of the substrate to a bottom surface of the substrate. The vertical diffusion region includes an upper portion having a first depth and a lower portion having a second depth that is substantially greater than the first depth.

Abstract: Embodiments of the present invention provide methods and circuitry for protecting a circuit during hot-swap events. Hot swap protection circuitry includes as overcurrent detection circuit which decouples power from a load. Circuitry is provided to detect ground-fault conditions. Noise detection circuitry is provided to reduce noise in the power that is delivered to the load.

Abstract: A power module includes a power semiconductor device having a first terminal, a second terminal, and a third terminal. The second terminal is a control terminal to regulate flow of electricity between the first and third terminals. A gate driver has an output node coupled to the second terminal of the power device. The gate driver includes an upper transistor and a lower transistor provided in a half-bridge configuration. The output node of the gate driver is provided between the upper and lower transistors. A first delay circuit is coupled to a control terminal of the upper transistor to provide a first delay period for a first gate drive signal being applied to the control terminal of the upper transistor. A second delay circuit is coupled to a control terminal of the lower transistor to provide a second delay period for a second gate drive signal being applied to the control terminal the lower transistor. The first delay period is different from the second delay period.

Abstract: A photovoltaic (PV) cell device comprises a first semiconductor substrate; a second semiconductor substrate bonded to the first semiconductor substrate; an insulating layer provided between the first and second substrates to electrically isolate the first substrate from the second substrate; a plurality of PV cells defined on the first substrate, each PV cell including a n-type region and a p-type region; a plurality of vertical trenches provided in the first substrate to separated the PV cells, the vertical trenches terminating at the insulating layer; a plurality of isolation structures provided within the vertical trenches, each isolation structure including a first isolation layer including oxide and a second isolation layer including polysilicon; and an interconnect layer patterned to connect the PV cells to provide X number of PV cells in series and Y number of PV cells in parallel.

Abstract: A photovoltaic (PV) device comprising a silicon-on-insulator (SOI) substrate including a first substrate, a second substrate, and an insulating layer provided between the first and second substrates; a plurality of tubs defined using the first substrate, each tub being isolated from an adjacent tub using the insulation layer and an isolation structure; a first PV array including a plurality of PV cells to generate a first voltage when light is shined on the first PV array; a second PV array including a plurality of PV cells to generate a second voltage when the light is shined on the second PV array; a transistor defined on one of the tubs and coupled to the first and second PV arrays, wherein the first PV array is configured to provide a given voltage to the transistor when the second PV array is generating the second voltage.

Abstract: A gate driver includes a control signal generator having a first input and configured to output a gate control signal to a power semiconductor switch. The gate control signal generator is provided proximate a high side of the gate driver. A first sub-circuit has a first signal path and a second signal path that are suitable for transmitting signals. The first and second signal paths are coupled to the first input of the gate control signal generator. The second signal path is configured to provide a signal to the first input with a reduced signal delay. A comparator is configured to receive signals from the high side. The comparator is provided proximate a low side of the gate driver.

Abstract: A solar cell device includes a solar cell section configured to output a first voltage upon receiving light. A charge pump circuit includes a first charge pump. The first charge pump includes a first terminal and a second terminal. The first terminal is configured to receive the first voltage from the solar cell section, and the second terminal is configured to output a second voltage that is higher than the first voltage. An output section is configured to receive an output voltage output by the charge pump circuit. The charge pump circuit is formed on a single semiconductor substrate.

Abstract: A power module includes a power semiconductor device having a first terminal, a second terminal, and a third terminal. The second terminal is a control terminal to regulate flow of electricity between the first and third terminals. A gate driver has an output node coupled to the second terminal of the power device. The gate driver is configured to output a first conductive state, a second conductive state, and a third conductive state. A pull-down resistor has a first end and a second end. The first end of the pull-down resistor is coupled to the output of the gate driver.

Abstract: An active area of a power device comprises active cells having designs that vary depending on where they are located in the active area. Design variations include structural variations and variations in the material used to produce the cells.