Patents Assigned to KLA Corporation
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Patent number: 12105431Abstract: Metrology is performed on a semiconductor wafer using a system with an apodizer. A spot is formed on the semiconductor wafer with a diameter from 2 nm to 5 nm. The associated beam of light has a wavelength from 400 nm to 800 nm. Small target measurement can be performed at a range of optical wavelengths.Type: GrantFiled: January 25, 2022Date of Patent: October 1, 2024Assignee: KLA CorporationInventors: Itay Gdor, Yuval Lubashevsky, Alon Alexander Volfman, Daria Negri, Yevgeniy Men, Elad Farchi
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Patent number: 12100132Abstract: A location of grid lines in an image of a laser-annealed semiconductor wafer is determined. An area covered by the grid lines can be filled using a new gray value. The new gray value can be based on a second gray scale value of a neighborhood around the area. The neighborhood is outside of the area covered by the grid lines.Type: GrantFiled: October 18, 2021Date of Patent: September 24, 2024Assignee: KLA CORPORATIONInventors: Jan Lauber, Jason Kirkwood
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Patent number: 12100574Abstract: An overlay target includes a grating-over-grating structure with a bottom grating structure disposed on a specimen and a top grating structure disposed on the bottom grating structure. The overlay target further includes a calibration scan location including the bottom grating structure but not the top grating structure and an overlay scan location including the top grating structure and the bottom grating structure.Type: GrantFiled: July 1, 2020Date of Patent: September 24, 2024Assignee: KLA CorporationInventors: Nadav Gutman, Oliver Ache, Carey Phelps
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Publication number: 20240313032Abstract: Back-illuminated DUV/VUV/EUV radiation or charged particle image sensors are fabricated using a method that utilizes a plasma atomic layer deposition (plasma ALD) process to generate a thin pinhole-free pure boron layer over active sensor areas. Circuit elements are formed on a semiconductor membrane's frontside surface, and then an optional preliminary hydrogen plasma cleaning process is performed on the membrane's backside surface. The plasma ALD process includes performing multiple plasma ALD cycles, with each cycle including forming an adsorbed boron precursor layer during a first cycle phase, and then generating a hydrogen plasma to convert the precursor layer into an associated boron nanolayer during a second cycle phase. Gasses are purged from the plasma ALD process chamber after each cycle phase. The plasma ALD cycles are repeated until the resulting stack of boron nanolayers has a cumulative stack height (thickness) that is equal to a selected target thickness.Type: ApplicationFiled: May 22, 2024Publication date: September 19, 2024Applicant: KLA CorporationInventors: Sisir Yalamanchili, John Fielden, Francisco Kole, Yung-Ho Alex Chuang
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Patent number: 12092814Abstract: An optical system with aberration correction is disclosed. The optical system may include an illumination source. The optical system may include a detector. The optical system may include one or more collection optics configured to image a sample onto the detector based on illumination from the illumination source. The optical system may include two or more aberration correction plates located in one or more pupil planes of the one or more collection optics. The two or more aberration correction plates may provide at least partial correction of two or more linearly-independent aberration terms. Any particular one of the two or more aberration correction plates may have a spatially-varying thickness profile providing a selected amount of correction for a single particular aberration term of the two or more linearly-independent aberration terms.Type: GrantFiled: January 12, 2022Date of Patent: September 17, 2024Assignee: KLA CorporationInventors: Haifeng Huang, Rui-Fang Shi, Joseph Walsh, Mitchell Lindsay, Eric Vella
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Patent number: 12092966Abstract: A system and method are disclosed for generating metrology measurements with second sub-system such as an optical sub-system. The method may include performing a training and a run-time operation. The training may include receiving first metrology data for device features from the first metrology sub-system (e.g., optical); generating first metrology measurements (e.g., critical dimensions, etc.); binning the device features into two or more device bins based on the first metrology measurements; and identifying representative metrology targets for the two or more device bins based on distributions of the first metrology measurements. The run-time operation may include receiving run-time metrology data (e.g., optical) of the representative metrology targets; and generating run-time metrology measurements based on the run-time metrology data.Type: GrantFiled: November 3, 2023Date of Patent: September 17, 2024Assignee: KLA CorporationInventors: Amnon Manassen, Nadav Gutman, Frank Laske, Andrei V. Shchegrov
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Patent number: 12094100Abstract: A method of semiconductor metrology includes patterning a film layer on a semiconductor substrate to define a first field on the semiconductor substrate with a first pattern comprising at least a first target feature within a first margin along a first edge of the first field and to define a second field, which abuts the first field, with a second pattern comprising at least a second target feature within a second margin along a second edge of the second field, such that the second edge of the second field adjoins the first edge of the first field. The first target feature in the first margin is adjacent to the second target feature in the second margin without overlapping the second target feature. An image is captured of at least the first and second target features and is processed to detect a misalignment between the first and second fields.Type: GrantFiled: March 3, 2022Date of Patent: September 17, 2024Assignee: KLA CorporationInventors: Mark Ghinovker, Yoel Feler
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Patent number: 12092183Abstract: An apparatus includes an upper member, a lower member disposed beneath the upper member, and a spring disposed between the upper member and the lower member. The upper member has a pin extending downward therefrom. The lower member has a seat configured to receive a free end of the pin. The spring surrounds the pin, and has a free length that is less than the length of the pin. In an unloaded state, the free end of the pin contacts the seat and the spring applies a compressive force to prevent relative lateral movement between the upper member and the lower member. When the lower member carries a load in a loaded state, the load applies a tensile force to the spring that forms a gap between the free end of the pin and the seat, which allows relative lateral movement between the upper member and the lower member.Type: GrantFiled: July 29, 2022Date of Patent: September 17, 2024Assignee: KLA CorporationInventors: Meier Brender, Joseph Walsh
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Patent number: 12085385Abstract: A metrology system may receive design data including a layout of fabricated instances of a structure on a sample. The system may further receive detection signals from the metrology tool associated within a field of view including multiple of the fabricated instances of the structure. The system may further generate design-assisted composite data for the structure by combining detection signals from one or more common features of the structure associated with the fabricated instances of the structure within the field of view using the design data. The system may further generate one or more metrology measurements of the structure based on the design-assisted composite data.Type: GrantFiled: November 11, 2021Date of Patent: September 10, 2024Assignee: KLA CorporationInventors: Stefan Eyring, Frank Laske
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Patent number: 12085515Abstract: Methods and systems for selecting measurement locations on a wafer for subsequent detailed measurements employed to characterize the entire wafer are described herein. High throughput measurements are performed at a relatively large number of measurement sites on a wafer. The measurement signals are transformed to a new mathematical basis and reduced to a significantly smaller dimension in the new basis. A set of representative measurement sites is selected based on analyzing variation of the high throughput measurement signals. In some embodiments, the spectra are subdivided into a set of different groups. The spectra are grouped together to minimize variance within each group. Furthermore, a die location is selected that is representative of the variance exhibited by the die in each group. A spectrum of a measurement site and corresponding wafer location is selected to correspond most closely to the center point of each cluster.Type: GrantFiled: October 20, 2021Date of Patent: September 10, 2024Assignee: KLA CorporationInventors: Brian C. Lin, Jiqiang Li, Song Wu, Tianrong Zhan, Andrew Lagodzinski
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Patent number: 12078601Abstract: A metrology system may arrange metrology measurements for a plurality of metrology targets distributed in a plurality of fields on one or samples into a signal vector, where the metrology measurements associated with the metrology targets in each of the plurality of fields are grouped within the signal vector. The system may further decompose the signal vector into reconstruction vectors associated with different spectral components of the signal vector. The system may further classify a subset of the reconstruction vectors as components of a metrology model, where a sum of the components corresponds to a metrology model describing the metrology measurements on the one or more samples. The system may further generate control signals to control one or more processing tools based on the metrology model.Type: GrantFiled: September 28, 2022Date of Patent: September 3, 2024Assignee: KLA CorporationInventors: Nireekshan K. Reddy, Vladimir Levinski, Amnon Manassen
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Patent number: 12080610Abstract: A wavelet-analysis system and method for use in fabricating semiconductor device wafers, the system including a misregistration metrology tool operative to measure at least one measurement site on a wafer, thereby generating an output signal, and a wavelet-based analysis engine operative to generate at least one wavelet-transformed signal by applying at least one wavelet transformation to the output signal and generate a quality metric by analyzing the wavelet-transformed signal.Type: GrantFiled: September 4, 2020Date of Patent: September 3, 2024Assignee: KLA CorporationInventors: Lilach Saltoun, Daria Negri
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Publication number: 20240290643Abstract: An oscillating secondary stage in a metrology system. The metrology system includes a primary stage configured for long movement to transport a wafer from a one location to another. A secondary stage coupled to the primary stage holds the wafer is configured to oscillate between the first direction and a second direction. The oscillation of the second stage allows for capturing an image frame of the wafer at a target location while the primary stage is moving.Type: ApplicationFiled: February 28, 2023Publication date: August 29, 2024Applicant: KLA CorporationInventors: Izhar Agam, Andrew Hill, Yoram Uziel, Amnon Manassen, Daria Negri
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Patent number: 12072606Abstract: An amorphous layer is used as a protective coating for hygroscopic nonlinear optical crystals. The amorphous layer consists of one or more alkali metal borates and/or alkali earth metal borates. The amorphous layer slows or prevents water and/or oxygen from diffusing into the hygroscopic nonlinear optical crystal, thus simplifying handling, storage and operating environmental requirements. One or multiple additional coating layers may be placed on top of the amorphous layer, with the additional coating layers including conventional optical materials. The thicknesses of the amorphous layer and/or additional layers may be chosen to reduce reflectance of the optical component at one or more specific wavelengths. The coated nonlinear optical crystal is used in an illumination source utilized in a semiconductor inspection system, a metrology system, or a lithography system.Type: GrantFiled: July 11, 2022Date of Patent: August 27, 2024Assignee: KLA CorporationInventors: John Fielden, Yung-Ho Alex Chuang
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Patent number: 12066763Abstract: A characterization system for inspecting or performing metrology on a layer within a semiconductor stack is disclosed. The system includes an imaging sub-system configured to acquire image data from a semiconductor stack including one or more layers. The semiconductor stack includes a metal layer having a thickness between 0.5 and 10 nm deposited on a layer of the semiconductor stack to form a reflective surface on the layer. The system includes a controller. The controller is configured to receive image data of the reflective surface on the layer of the substrate stack and identify one or more defects or one or more structures within the layer based on illumination reflected from the reflective surface.Type: GrantFiled: February 4, 2021Date of Patent: August 20, 2024Assignee: KLA CorporationInventors: Kaushik Sah, Andrew James Cross, Sandip Halder, Sayantan Das
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Patent number: 12066322Abstract: An overlay metrology system may include an objective lens, illumination optics to illuminate an overlay target including a first grating with a first pitch on a first sample layer and a second grating with a second pitch on a second sample layer, where the first and second sample layers are separated by a layer separation distance greater than a depth of field of the objective lens. The system may further include collection optics with a radially-varying defocus distribution to compensate for the layer separation distance such that the first and second gratings are simultaneously in focus on the detector.Type: GrantFiled: November 14, 2022Date of Patent: August 20, 2024Assignee: KLA CorporationInventors: Amnon Manassen, Andrew V. Hill, Yonatan Vaknin, Avner Safrani
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Patent number: 12067745Abstract: A system may include a controller for receiving one or more images of a metrology target including periodic features with one or more known pitches, pre-processing the one or more images using a decomposition technique to generate one or more pre-processed images, and generating one or more metrology measurements for the metrology target based on the one or more pre-processed images. Pre-processing a particular image of the one or more images may include constructing one or more trajectory matrices from the particular image, generating reconstruction components associated with the particular image from the one or more trajectory matrices using the decomposition technique, and generating a particular one of the one or more pre-processed images by based on a subset of the reconstruction components including signals with at least one of the one or more known pitches.Type: GrantFiled: September 22, 2023Date of Patent: August 20, 2024Assignee: KLA CorporationInventors: Nireekshan K. Reddy, Vladimir Levinski
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Patent number: 12068129Abstract: A system and method of a tilt-column electron beam imaging system is disclosed. The system may include an imaging sub-system. The imaging sub-system may include a plurality of electron beam sources configured to generate a plurality of beamlets. The imaging sub-system may further include a plurality of tilt-illumination columns, where a respective tilt-illumination column is configured to receive a respective beamlet from a respective electron beam source. For the system and method, a first tilt axis of a first tilt-illumination column may be orientated along a first angle and at least one additional tilt axis of at least one additional tilt-illumination column may be orientated along at least one additional angle different from the first angle, where each of the plurality of beamlets pass through a first common crossover volume.Type: GrantFiled: November 4, 2022Date of Patent: August 20, 2024Assignee: KLA CorporationInventors: Xinrong Jiang, Youfei Jiang, Ralph Nyffenegger, Michael Steigerwald
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Patent number: 12062165Abstract: A system is disclosed, in accordance with one or more embodiment of the present disclosure. The system may include a controller including one or more processors configured to execute a set of program instructions. The set of program instructions may be configured to cause the processors to: receive images of a sample from a characterization sub-system; identify target clips from patch clips; prepare processed clips based on the target clips; generate encoded images by transforming the processed clips; sort the encoded images into a set of clusters; display sorted images from the set of clusters; receive labels for the displayed sorted images; determine whether the received labels are sufficient to train a deep learning classifier; and upon determining the received labels are sufficient to train the deep learning classifier, train the deep learning classifier via the displayed sorted images and the received labels.Type: GrantFiled: February 18, 2022Date of Patent: August 13, 2024Assignee: KLA CorporationInventors: Bradley Ries, Tommaso Torelli, Muthukrishnan Sankar, Vineethanand Hariharan
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Patent number: 12056867Abstract: Wafer-to-wafer and within-wafer image contrast variations can be identified and mitigated by extracting an image frame during recipe setup and then during runtime at the same location. Image contrast is determined for the two image frames. A ratio of the contrast for the two image frames can be used to determine contrast variations and focus variation.Type: GrantFiled: September 2, 2021Date of Patent: August 6, 2024Assignee: KLA CorporationInventors: Bjorn Brauer, Sangbong Park, Hucheng Lee