Patents Assigned to Lam Research
  • Patent number: 12331396
    Abstract: A showerhead includes a plurality of plenums and a plurality of through holes positioned in the plurality of plenums. The plenums are stacked in a sequential order in an axial direction perpendicular to a semiconductor substrate. The plenums extend radially fully across the semiconductor substrate. The plenums are disjoint from each other and are configured to respectively supply a first metal precursor, a second metal precursor, and a reactant via the respective plenums without intermixing the first metal precursor, the second metal precursor, and the reactant in the plenums. The through holes of the respective plenums are arranged in a radial direction, which is perpendicular to the axial direction, in the same sequential order as the sequential order of the plenums. The through holes of the plenums open along a flat surface at a bottom of the showerhead. The flat surface extends radially fully across the bottom of the showerhead.
    Type: Grant
    Filed: November 27, 2023
    Date of Patent: June 17, 2025
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Ilanit Fisher, Raashina Humayun, Michal Danek, Patrick Van Cleemput, Shruti Thombare
  • Patent number: 12327762
    Abstract: Embodiments of methods of filling features with molybdenum (Mo) include depositing a first layer of Mo in a feature including an opening and an interior and non-conformally treating the first layer such that regions near the opening preferentially treated over regions in the interior. In some embodiments, a second Mo layer is deposited on the treated first layer. Embodiments of methods of filling features with Mo include controlling Mo precursor flux to transition between conformal and non-conformal fill.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: June 10, 2025
    Assignee: Lam Research Corporation
    Inventors: Lawrence Schloss, Shruti Vivek Thombare, Zhongbo Yan, Patrick A. Van Cleemput, Joshua Collins
  • Patent number: 12322572
    Abstract: Systems and methods for tuning a megahertz radio frequency (RF) generator within a cycle of operation of a kilohertz (kHz) RF generator are described. In one of the methods, a predetermined periodic waveform is provided to a processor. The processor uses a computer-based model to determine plurality of frequency parameters for the predetermined periodic waveform. The frequency parameters are applied to the megahertz RF generator to generate an RF signal having the frequency parameters during one or more cycles of operation of the kilohertz RF generator.
    Type: Grant
    Filed: February 13, 2024
    Date of Patent: June 3, 2025
    Assignee: Lam Research Corporation
    Inventors: Arthur M. Howald, John C. Valcore, Jr.
  • Patent number: 12322571
    Abstract: A method for performing an etch process on a substrate in a plasma processing system, including: applying source RF power and bias RF power to an electrode; wherein the source RF power and the bias RF power are pulsed signals that together define a plurality of multi-state pulsed RF cycles, each cycle having a first state, second state, and third state; wherein the first state is defined by the source RF power having a first source RF power level and the bias RF power having a first bias RF power level; wherein the second state is defined by the source RF power and the bias RF power having substantially zero power levels; wherein the third state is defined by the source RF power having a second source RF power level less than the first source RF power level, and the bias RF power having a substantially zero power level.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: June 3, 2025
    Assignee: Lam Research Corporation
    Inventors: Nikhil Dole, Vikhram Vilasur Swaminathan, Beibei Jiang, Merrett Wong
  • Patent number: 12322579
    Abstract: A substrate processing system includes a processing chamber including a substrate support to support a substrate. A coil includes at least one terminal. An RF source configured to supply RF power to the coil. A dielectric window is arranged on one surface of the processing chamber adjacent to the coil. A contamination reducer includes a first plate that is arranged between the at least one terminal of the coil and the dielectric window.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: June 3, 2025
    Assignee: Lam Research Corporation
    Inventors: Maolin Long, Neema Rastgar, Alexander Miller Paterson
  • Patent number: 12315727
    Abstract: Methods and apparatuses for performing cycles of aspect ratio dependent deposition and aspect ratio independent etching on lithographically patterned substrates are described herein. Methods are suitable for reducing variation of feature depths and/or aspect ratios between features formed and partially formed by lithography, some partially formed features being partially formed due to stochastic effects. Methods and apparatuses are suitable for processing a substrate having a photoresist after extreme ultraviolet lithography. Some methods involve cycles of deposition by plasma enhanced chemical vapor deposition and directional etching by atomic layer etching.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: May 27, 2025
    Assignee: Lam Research Corporation
    Inventors: Nader Shamma, Richard Wise, Jengyi Yu, Samantha S.H. Tan
  • Publication number: 20250167025
    Abstract: A wafer chuck assembly is disclosed, in accordance with at least one embodiment. In at least one embodiment, wafer chuck assembly comprises a wafer chuck comprising a substantially circular surface having a first area. In least one embodiment, plurality of mesas is distributed over the wafer chuck surface. In at least one embodiment, individual ones of the plurality of mesas extend a height above the wafer chuck surface. In at least one embodiment, plurality of mesas has a contact surface having a second area that is at least 3% of the first area.
    Type: Application
    Filed: February 24, 2023
    Publication date: May 22, 2025
    Applicant: Lam Research Corporation
    Inventors: Sairam Sundaram, Ramesh Chandrasekharan, Christopher Gage
  • Publication number: 20250154652
    Abstract: Disclosed herein is a process tool, comprising a wafer chuck and a showerhead. In at least one implementation, wafer chuck is coupled to a motor that is operable to vertically displace wafer chuck relative to showerhead. In at least one implementation, a carrier ring is between wafer chuck and showerhead. In at least one implementation, carrier ring comprises an overhang extending over an edge of a wafer on the wafer chuck. In at least one implementation, carrier ring is mechanically coupled to a spindle operable to vertically displace carrier ring relative to wafer chuck.
    Type: Application
    Filed: February 28, 2023
    Publication date: May 15, 2025
    Applicant: Lam Research Corporation
    Inventors: Krishna BIRRU, Leonard KHO, Jasmine Yuen-Sen LIN, Raul VYAS, Anand CHANDRASHEKAR, Jeff CLEVENGER
  • Patent number: 12300463
    Abstract: A two-dimensional frequency search grid is defined by a first coordinate axis representing an operating frequency setpoint of an RF signal generator in a first operational state and a second coordinate axis representing an operating frequency setpoint of the RF signal generator in a second operational state. The RF signal generator has a first output power level in the first operational state and a second output power level in the second operational state. The RF signal generator operates in an multi-level RF power pulsing mode by cyclically alternating between the first operational state and the second operational state. An automated search process is performed within the two-dimensional frequency search grid to simultaneously determine an optimum value for the operating frequency setpoint of the RF signal generator in the first operational state and an optimum value for the operating frequency setpoint of the RF signal generator in the second operational state.
    Type: Grant
    Filed: May 9, 2020
    Date of Patent: May 13, 2025
    Assignee: Lam Research Corporation
    Inventors: Mathew Evans, Ying Wu, Alexander Paterson
  • Patent number: 12291777
    Abstract: Processing methods and apparatus for increasing a reaction chamber batch size. Such a method of processing deposition substrates (e.g., wafers), involves conducting a deposition on a first portion of a batch of deposition wafers in a reaction chamber, conducting an interval conditioning reaction chamber purge to remove defects generated by the wafer processing from the reaction chamber; and following the interval conditioning mid-batch reaction chamber purge, conducting the deposition on another portion of the batch of wafers in the reaction chamber. The interval conditioning reaction chamber purge is conducted prior to exceeding a baseline for acceptable defect (e.g., particle) generation in the chamber and is performed while no wafers are positioned in the reaction chamber.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: May 6, 2025
    Assignee: Lam Research Corporation
    Inventors: Chun-Hao Chen, Jeremy David Fields, Frank Loren Pasquale
  • Patent number: 12293943
    Abstract: Systems and methods are provided for method for etch assisted gold (Au) through silicon mask plating (EAG-TSM). An example method comprises providing a seed layer on a substrate and providing a silicon mask on at least a portion of the seed layer on the substrate. The silicon mask includes one or more via to be filled with Au. The masked substrate is subjected to at least one processing cycle, each processing cycle including an Au plating sub-step and an etch treatment sub-step. The cycles are repeated until a selected via fill thickness is achieved.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: May 6, 2025
    Assignee: Lam Research Corporation
    Inventors: Lee Peng Chua, Defu Liang, Jacob Kurtis Blickensderfer, Thomas A Ponnuswamy, Bryan L. Buckalew, Steven T. Mayer
  • Patent number: 12293919
    Abstract: Tin oxide films are used as spacers and hardmasks in semiconductor device manufacturing. In one method, tin oxide layer (e.g., spacer footing) needs to be selectively etched in a presence of an exposed silicon-containing layer, such as SiOC, SiON, SiONC, amorphous silicon, SiC, or SiN. In order to reduce damage to the silicon-containing layer the process involves passivating the silicon-containing layer towards a tin oxide etch chemistry, etching the tin oxide, and repeating passivation and etch in an alternating fashion. For example, passivation and etch can be each performed between 2-50 times. In one implementation, passivation is performed by treating the substrate with an oxygen-containing reactant, activated in a plasma, and the tin oxide etching is performed by a chlorine-based chemistry, such as using a mixture of Cl2 and BCl3.
    Type: Grant
    Filed: November 8, 2023
    Date of Patent: May 6, 2025
    Assignee: Lam Research Corporation
    Inventors: Seongjun Heo, Jengyi Yu, Chen-Wei Liang, Alan J. Jensen, Samantha S. H. Tan
  • Patent number: 12288702
    Abstract: A semiconductor wafer mass metrology apparatus comprising: a measurement chamber for measuring the weight and/or the mass of a semiconductor wafer; a first temperature changing part for changing a temperature of the semiconductor wafer before the semiconductor wafer is transported into the measurement chamber; and a first temperature sensor for sensing a first temperature, wherein the first temperature is: a temperature of the first temperature changing part; or a temperature of the semiconductor wafer when the semiconductor wafer is on the first temperature changing part, or when the semiconductor wafer leaves the first temperature changing part.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: April 29, 2025
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Gregor Elliott, Eric Tonnis
  • Patent number: 12288685
    Abstract: Methods and apparatuses for modifying a wafer surface using an organosilicon precursor are provided herein. The wafer surface is dosed with the organosilicon precursor following deposition of a dielectric material by an atomic layer deposition (ALD) process. In some implementations, the dielectric layer is made of silicon oxide. Dosing the wafer surface with the organosilicon precursor may occur in the same chamber as the ALD process. The organosilicon precursor may modify the wafer surface to increase its hydrophobicity so that photoresist adhesion is improved on the wafer surface. In some implementations, the wafer surface may be exposed to an inert gas RF plasma after dosing the wafer surface with the organosilicon precursor.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: April 29, 2025
    Assignee: Lam Research Corporation
    Inventors: Jeremy D. Fields, Awnish Gupta, Douglas W. Agnew, Joseph R. Abel, Purushottam Kumar
  • Patent number: 12283463
    Abstract: Systems and methods for multi-level pulsing are described. The systems and methods include generating four or more states. During each of the four or more states, a radio frequency (RF) generator generates an RF signal. The RF signal has four or more power levels, and each of the four or more power levels corresponds to the four or more states. The multi-level pulsing facilitates a finer control in processing a substrate.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: April 22, 2025
    Assignee: Lam Research Corporation
    Inventors: Ying Wu, Maolin Long, John Drewery, Vikram Singh
  • Patent number: 12283451
    Abstract: A method includes: receiving a first signal from a first sensor at a first filter and preventing passage of a first portion of the first signal via the first filter. The first portion of the first signal is at a first RF. A second portion of the first signal is indicative of a first temperature of a first electrode in a plasma chamber. The method further includes: outputting a second signal from the first filter; receiving the second signal at a second filter; and preventing passage of a portion of the second signal via the second filter. The portion of the second signal is at a second RF. The second RF is less than the first RF. The first filter and the second filter are implemented on a printed circuit board. The method further includes adjusting a temperature of the first electrode based on an output of the second filter.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: April 22, 2025
    Assignee: Lam Research Corporation
    Inventors: Vince Burkhart, Christopher Ramsayer, Mohan Thilagaraj
  • Patent number: 12283461
    Abstract: Systems and methods for increasing peak ion energy with a low angular spread of ions are described. In one of the systems, multiple radio frequency (RF) generators that are coupled to an upper electrode associated with a plasma chamber are operated in two different states, such as two different frequency levels, for pulsing of the RF generators. The pulsing of the RF generators facilitates a transfer of ion energy during one of the states to another one of the states for increasing ion energy during the other state to further increase a rate of processing a substrate.
    Type: Grant
    Filed: January 23, 2024
    Date of Patent: April 22, 2025
    Assignee: Lam Research Corporation
    Inventors: Juline Shoeb, Ying Wu, Alex Paterson
  • Patent number: 12280091
    Abstract: Apparatuses and methods are provided. Some methods may include providing a substrate to a processing chamber, the substrate having a first material adjacent to and covering a surface of a second material, modifying a layer of the first material by flowing a first process gas onto the substrate and thereby creating a modified layer of the first material, removing the modified layer of the first material by flowing a second process gas onto the substrate, and converting, when the surface of the second material is uncovered via removal of the modified layer, the surface to a converted layer of the second material by flowing a third process gas onto the substrate, in which the first and second process gases are less reactive with the converted layer than with the first material and the second material.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: April 22, 2025
    Assignee: Lam Research Corporation
    Inventors: Andreas Fischer, Thorsten Bernd Lill
  • Patent number: 12281402
    Abstract: A cell to process a substrate includes at least one chamber wall, a membrane frame, and a membrane. The at least one chamber wall is arranged to form a cavity below a holder of the substrate. The membrane frame is disposed on the at least one chamber wall and across the cavity. The membrane is supported by the membrane frame and separating a first electrolyte from a second electrolyte. The membrane includes a surface extending from a center of the cavity radially outward at an angle relative to a reference plane, and wherein the angle is greater than or equal to 0° and less than or equal to 3°.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: April 22, 2025
    Assignee: Lam Research Corporation
    Inventors: Frederick Dean Wilmot, Robert Rash, Nirmal Shankar Sigamani, Gabriel Graham
  • Patent number: D1073758
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: May 6, 2025
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Karthik Adappa Sathish, Cody Barnett, Mitali Mrigendra Basargi, Ravi Kumar