Abstract: Methods for selective inhibition control in semiconductor manufacturing are provided. An example method includes providing a substrate including a feature having one or more feature openings and a feature interior. A nucleation layer is formed on a surface of the feature interior. Based on a differential inhibition profile, a nonconformal bulk layer is selectively formed on a surface of the nucleation layer to leave a region of the nucleation layer covered, and a region of the nucleation layer uncovered by the nonconformal bulk layer. An inhibition layer is selectively formed on the covered and uncovered regions of the nucleation layer. Tungsten is deposited in the feature in accordance with the differential inhibition profile.

Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.

Abstract: Described herein is a pedestal assembly comprising a platen and a sensor support plate below the platen. In at least one implementation, sensor support plate comprises a sensor compartment and a waveguide temperature sensor within the sensor compartment. In at least one implementation, waveguide temperature sensor comprises a temperature sensor comprising a first reflector structure and a second reflector structure. In at least one implementation, first reflector structure and second reflector structure are separated by a gauge length.

Abstract: A method is provided. A substrate situated in a chamber is exposed to a halogen-containing gas comprising an element selected from the group consisting of silicon, germanium, carbon, titanium, and tin, and igniting a plasma to modify a surface of the substrate and form a modified surface. The substrate is exposed to an activated activation gas to etch at least part of the modified surface.

Abstract: Non-elastomeric, non-polymeric, non-metallic membrane valves for use in high-vacuum applications are disclosed. Such valves are functional even when the fluid-control side of the valve is exposed to a sub-atmospheric pressure field which may generally act to collapse/seal traditional elastomeric membrane valves.

Abstract: Methods for filling gaps with dielectric material involve deposition using an atomic layer deposition (ALD) technique to fill a gap followed by deposition of a cap layer on the filled gap by a chemical vapor deposition (CVD) technique. The ALD deposition may be a plasma-enhanced ALD (PEALD) or thermal ALD (tALD) deposition. The CVD deposition may be plasma-enhanced CVD (PECVD) or thermal CVD (tCVD) deposition. In some embodiments, the CVD deposition is performed in the same chamber as the ALD deposition without intervening process operations. This in-situ deposition of the cap layer results in a high throughput process with high uniformity. After the process, the wafer is ready for chemical-mechanical planarization (CMP) in some embodiments.

Abstract: A method for applying RF power in a plasma process chamber is provided, including: generating a first RF signal; generating a second RF signal; generating a third RF signal; wherein the first, second, and third RF signals are generated at different frequencies; combining the first, second and third RF signals to generate a combined RF signal, wherein a wave shape of the combined RF signal is configured to approximate a sloped square wave shape; applying the combined RF signal to a chuck in the plasma process chamber.

Abstract: Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional iteration of (b), the deposited amorphous carbon liner on the sidewalls of the feature is replenished.

Abstract: Sequential electrodeposition of metals into through-mask features on a semiconductor substrate is conducted such as to reduce the deleterious consequences of lipseal's pressure onto the mask material. In a first electroplating step, a first metal (e.g., nickel) is electrodeposited using a lipseal that has an innermost point of contact with the semiconductor substrate at a first distance from the edge of the substrate. In a second electroplating step, a second metal (e.g., tin) is electrodeposited using a lipseal that has an innermost point of contact with the semiconductor substrate at a greater distance from the edge of the substrate than the first distance. This allows to at least partially shift the lipseal pressure from a point that could have been damaged during the first electrodeposition step and to shield from electrolyte any cracks that might have formed in the mask material during the first electroplating step.

Abstract: A component of a plasma processing chamber having at least one plasma facing surface of the component comprises single crystal metal oxide material. The component can be machined from a single crystal metal oxide ingot. Suitable single crystal metal oxides include spinel, yttrium oxide, and yttrium aluminum garnet (YAG). A single crystal metal oxide can be machined to form a gas injector of a plasma processing chamber.

Abstract: In some examples, a method of processing a substrate comprises applying a photoresist (PR) onto a surface of the substrate, pre-exposing the PR to ultra violet (UV) light before depositing or etching a metal oxide (MO) layer onto the PR, and depositing or etching a MO layer onto the PR subsequent to pre-exposing the PR to UV light.

Abstract: A method for etching at least a portion of a layer based on a III-N material includes exposing a least one portion of an upper face of the III-N layer to a plasma treatment with bias voltage pulsing based on chlorine, wherein the plasma treatment is configured to present a duty cycle comprised between 20% and 80%. A first non-zero polarization bias is applied to the substrate during Ton, and a second polarization bias lesser than the first non-zero polarization bias or no polarization bias is applied, during Toff, so as to etch the portion of the III-N layer. The duration of the etching is significantly reduced to obtain a satisfying quality of the III-N layer for the operation of a microelectronic device, such as a transistor or a diode.

Abstract: Undesired deposition of metals on a lipseal (lipseal plate-out) during electrodeposition of metals on semiconductor substrates is minimized or eliminated by minimizing or eliminating ionic current directed at a lipseal. For example, electrodeposition can be conducted such as to avoid contact of a lipseal with a cathodically biased conductive material on the semiconductor substrate during the course of electroplating. This can be accomplished by shielding a small selected zone proximate the lipseal to suppress electrodeposition of metal proximate the lipseal, and to avoid contact of metal with a lipseal. In some embodiments shielding is accomplished by sequentially using lipseals of different inner diameters during electroplating of metals into through-resist features, where a lipseal having a smaller diameter is used during a first electroplating step and serves as a shield blocking electrodeposition in a selected zone. In a second electroplating step, a lipseal of a larger inner diameter is used.

Abstract: A method for calibrating a gas flow metrology system for a substrate processing system includes a) measuring temperature using a first temperature sensor and a reference temperature sensor over a predetermined temperature range and determining a first transfer function; b) measuring pressure using a first pressure sensor and a reference pressure sensor over a predetermined pressure range using a first calibration gas and determining a second transfer function; c) performing a first plurality of flow rate measurements in a predetermined flow rate range with a first metrology system and a reference metrology system, wherein the first metrology system and the reference metrology system use a first orifice size and the first calibration gas; and d) scaling temperature and pressure using the first transfer function and the second transfer function, respectively, and determining a corresponding transfer function for the first calibration gas based on the first plurality of flow rate measurements.

Abstract: A thermal choke rod connecting a radio frequency source to a substrate support of a plasma processing system includes a tubular member having a first connector for connecting to an RF rod coupled to the substrate support and a second connector for connecting to an RF strap that couples to the RF source. A tubular segment extends between the first and second connectors. The first connector has a conically-shaped end region that tapers away from the inner surface thereof to an outer surface in a direction toward the tubular segment, and slits that extend for a prescribed distance from a terminal end of the first connector. The outer surface of the tubular segment has a threaded region for threaded engagement with an annular cap that fits over the first connector and reduces an inner diameter of the first connector upon contact with the conically-shaped end region of the first connector.

Abstract: Metal films, such as molybdenum films are deposited on a semiconductor substrate having one or more recessed features in a deposition process modulated by addition of a halogen-containing compound (e.g., an alkyl halide). In some implementations, a pre-treatment of a substrate with a halogen-containing compound is performed prior to contacting the substrate with a metal-containing precursor and a reducing agent. In some embodiments, the pre-treatment is performed such that the halogen-containing compound modifies the surface of the substrate to a greater degree in a field region of the substrate and near the opening of the recessed feature, as compared to the bottom portion of the recessed feature, where the modification of the substrate inhibits deposition of the metal. As a result, deposition of metals with improved step coverage can be achieved. In some implementations, modulation of deposition by halogen-containing compounds is used to achieve bottom-up metal growth in recessed features.

Abstract: A bottom ring is configured to support a moveable edge ring. The edge ring is configured to be raised and lowered relative to a substrate support. The bottom ring includes an upper surface that is stepped, an annular inner diameter, an annular outer diameter, a lower surface, and a plurality of vertical guide channels provided through the bottom ring from the lower surface to the upper surface of the bottom ring. Each of the guide channels includes a first region having a smaller diameter than the guide channel, and the guide channels are configured to receive respective lift pins for raising and lowering the edge ring.

Abstract: Methods of patterning vias and trenches using a polymerization protective liner after forming a lower patterned mask layer used for etching trenches on a semiconductor substrate prior to forming an upper patterned mask layer used for etching vias are provided. Methods involve forming a polymerization protective liner either nonconformally or conformally using silicon tetrachloride and methane polymerization. Polymerization protective liners may be sacrificial.

Abstract: A method for adjusting a height of an edge ring arranged around an outer portion of a substrate support includes receiving at least one input indicative of one or more erosion rates of the edge ring. The at least one input includes a plurality of erosion rates for respective usage periods of a substrate processing system. The method further includes determining at least one erosion rate of the edge ring using the plurality of erosion rates for the respective usage periods, monitoring an overall usage of the edge ring and storing the overall usage of the edge ring in a memory, calculating an amount of erosion of the edge ring based on the determined at least one erosion rate and the overall usage of the edge ring, and adjusting the height of the edge ring based on the calculated amount of erosion to compensate for the calculated amount of erosion.

Abstract: In some examples, a magnetic shield for a plasma source is provided. An example magnetic shield comprises a back-shell. The back-shell includes a cage defined, at least in part, by an arrangement of bars of ferro-magnetic material. The cage is sized and configured to at least extend over a top side of an RF source coil for the plasma source.