Abstract: A semiconductor device including a semiconductor substrate; a conductive film covering a front face of the semiconductor substrate, a front face of the conductive film having plural straight-line shaped concave portions disposed in parallel to each other; and a protecting film covering the front face of the conductive film, the protecting film having an opening that has an edge forming an angle with the plural concave portions of greater than 0° and less than 90°, and that partially exposes the conductive film.

Abstract: A semiconductor device includes: a boosting section configured to output a second voltage boosted from a first voltage; a voltage lowering section configured to output a lowered voltage that has been lowered from the second voltage by a predetermined voltage; a first buffer amp including a non-inverting input terminal connected to an output of the voltage lowering section; a second buffer amp including a non-inverting input terminal that is input with the first voltage; and a difference output section configured to output a voltage corresponding to a difference between output of the first buffer amp and output of the second buffer amp.

Abstract: An IC tag in which precision reduction is suppressed and which is compact and manufactured easily, and a manufacturing method of IC tag are provided. The IC tag has: antennas disposed on one surface of a substrate; a capacitor which includes a dielectric and first and second electrodes disposed on one surface of the substrate, and in which an electrostatic capacitance changes irreversibly corresponding to changes in ambient environment; and an IC chip which detects the electrostatic capacitance of the capacitor via a pair of external terminals to which the first and second electrodes are respectively connected, and wirelessly transmits information based on a detection result via the antennas.

Abstract: An electrostatic protection element includes a substrate of a first conductivity type, an epitaxial layer formed on the substrate, the epitaxial layer being of a second conductivity type; a well formed on the epitaxial layer, the well being of the first conductivity type; a transistor formed inside of the well, the transistor including a drain region, a source region formed to face the drain region across a channel region, and a gate formed above the channel region so as to be insulated; and a well contact region of the first conductivity type disposed so as to form an opposing region where the drain region and the well contact region face each other while being separated by a prescribed distance in a direction parallel to at least an extension direction of the gate.

Abstract: A memory controller includes: a memory access part which writes, to memory, an encrypted data acquired by encrypting information data, a first code for error detection based on the information data, and a second code for error detection based on the encrypted data and which reads the encrypted data, the first and second codes from the memory during a monitoring process being executed with a monitoring part; a decryption part for acquiring readout data by decrypting the encrypted data; and an error detection part which acquires a first error detection result by performing an error detection process on the readout data and the first code and a second error detection result by performing an error detection process on the encrypted data and the second code. The monitoring part stops the decryption part during the monitoring process and determines a deterioration level of memory based on the second error detection result.

Abstract: A semiconductor device including an input unit to which an acceleration signal representing acceleration is input from an acceleration detecting unit installed in a portable terminal device, and a detection unit which detects that a tap operation is performed on the portable terminal device, in a case in which the acceleration signal input to the input unit reaches both of a first threshold value set on the positive side and a second threshold value set on the negative side and a period until the acceleration signal exceeds any one of the first threshold value and the second threshold value and then exceeds the other threshold value is equal to or more than a predetermined first period and is equal to or less than a second period larger than the first period.

Abstract: A semiconductor device including a first buffer amplifier into which a voltage of a high potential side of one battery cell selected from plural battery cells that are connected in series is input; a second buffer amplifier into which a voltage of a low potential side of the one battery cell other than a lowermost stage battery cell is input; an analog level shifter into which a voltage output from the first buffer amplifier and a voltage output from the buffer amplifier are input; a first switch that switches a voltage input to the analog level shifter from the voltage output from the second buffer amplifier to a reference voltage; and a second switch that switches a voltage input to the first buffer amplifier from the voltage of the high potential side of the one battery cell to the reference voltage.

Abstract: An image processing device includes a data capture unit configured to capture image data obtained around a vehicle, and an image processor configured to apply image processing to a display image based on the image data. The display image is constituted of an n×m number of pixels arranged in a matrix on a display screen having first to n-th horizontal lines (n is an integer of 3 or more) extending in a horizontal direction and first to m-th perpendicular lines (m is an integer of 3 or more) extending in a perpendicular direction. The display image includes a first image area constituted of the pixels in the first to (k?1)th horizontal lines (k is an integer satisfying 2?k<n), and a second image area constituted of the pixels in the k-th to n-th horizontal lines. The image processor applies image compression processing to the second image area.

Abstract: A display driving device comprising: a high supply voltage operation unit that generates an operating current under application of a high supply voltage so as to supply driving voltages to a display panel; a low supply voltage operation unit that operates under the application of a low supply voltage lower than the high supply voltage and controls the high supply voltage operation unit; and a reuse circuit that receives the operating current from the high supply voltage operation unit and supplies the operating current to a ground side via the low supply voltage operation unit so as to apply the low supply voltage to the low supply voltage operation unit.

Abstract: A semiconductor device including: a semiconductor substrate; at least one circuit block provided on a main surface of the semiconductor substrate and having a predetermined function; a wiring layer including plural metal layers that connect the circuit block; and plural capacitors including a first capacitor connected to the circuit block and that uses the plurality of metal layers, and a second capacitor that uses an active area disposed within the main surface of the semiconductor substrate, wherein at least one of the first capacitor and at least one of the second capacitor are stacked in a stacking direction of layers of the semiconductor.

Abstract: A display device and data driver are provided. The display device includes a plurality of data drivers provided for a predetermined number of data lines in a plurality of data lines. The plurality of data drivers receive the serialized video data signal from the display controller, generate a modulated data timing signal whose period changes within the one frame period, and supply a gradation voltage signal to each of the predetermined number of data lines for each of data periods based on a data timing of the modulated data timing signal, each of data periods corresponding to the data timing of the modulated data timing signal.

Abstract: A display driver includes a gamma correction data transmission unit that transmits a plurality of gamma correction data pieces one by one in each predetermined period. A brightness level indicated by a video signal is converted into a gradation voltage with a gamma characteristic based on the gamma correction data piece transmitted from the gamma correction data transmission unit.

Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type having a first surface on one side thereof and a second surface on an opposite side thereof, and having an element therein, a second semiconductor layer of a second conductivity type having a circuit element formed therein, the second semiconductor layer being formed at the one side of the first surface of the first semiconductor layer, an insulating layer disposed on the first surface of the first semiconductor layer, and a charge-attracting layer configured to attract electrical charges generated in the insulating layer when a predetermined voltage is supplied to the charge-attracting layer.

Abstract: A display apparatus includes: a display panel; a gate driver that provides, to a plurality of scanning lines, scanning pulse signals for controlling pixel switches to be ON in a selection period corresponding to a pulse width thereof; a data driver that provides gradation voltage signals to a plurality of data lines; and a display controller that provides a modulated clock signal having a frequency that changes at a predetermined rate in one frame period. The gate driver sequentially provides the scanning pulse signals each having a pulse width reflecting to a clock cycle of the modulated clock signal in a predetermined order corresponding to distances from the data driver to the plurality of scanning lines. The data driver provides the gradation voltage signals in the order of providing the scanning pulse signals for every data period corresponding to the clock cycle of the modulated clock signal.

Abstract: A differential amplifier circuit includes a differential input stage, a first current mirror, a second current mirror, a first current source circuit, and a second current source circuit. The first current source circuit has a first transistor of a first conductivity type with a control terminal supplied with a first bias voltage, and a second transistor of a second conductivity type with a control terminal supplied with a second bias voltage. An output amplifier circuit includes a third transistor of the first conductivity type and a fourth transistor of the second conductivity type. A control circuit has a fifth transistor of the first conductivity type with a first terminal connected to a connection point between the other end of the second current source circuit and the control terminal of the fourth transistor in the output amplifier circuit, with a second terminal connected to an output node of the second current mirror, and with a control terminal receiving the first bias voltage.

Abstract: Provided is an output amplifier including a differential unit which sends a current corresponding to a voltage difference between a gradation voltage and an amplified gradation voltage to a first current line; a current mirror unit which sends an amount of current corresponding to the current flowing through the first current line, to a second current line; and an output unit including a first and a second drive line, an output line through which the amplified gradation voltage is output, a first output transistor which sends a current based on a voltage of the first drive line, and a second output transistor which sends a current based on a voltage of the second drive line. The output unit includes a voltage regulation circuit which controls the voltage of the first drive line being higher than the voltage of the second drive line.

Abstract: A power transmission device includes a communication module for transmitting and receiving a power transmission packet, which is an information packet related to the settings of the power transmission, and a general packet, which is an information packet other than the power transmission packet, to and from the power reception device; and a power transmission module for performing the power transmission after transmission and reception of the power transmission packet. The communication module receives address information indicating an address configuration of the memory from the power reception device; provides the general packet with address designation indicating a first memory area, and provides the power transmission packet with address designation indicating a second memory area, on the basis of the address information; and transmits the general packet and the power transmission packet having the address designation to the power reception device.

Abstract: A semiconductor device includes: a pair of input terminals or receiving a first input signal and a second input signal each of which changes between potentials in a predetermined range via a pair of transmission paths which include a first transmission path and a second transmission path; a first reception circuit which compares in potential the first input signal with the second input signal, and generates a first output signal based on a comparison result therebetween; a second reception circuit which generates a second output signal based on a comparison result of comparing in potential at least one of the first input signal and the second input signal with a reference potential.

Abstract: A semiconductor apparatus including a driver capable of favorably suppressing image deterioration accompanying a voltage fluctuation even if the voltage fluctuation is generated in a display device is provided.

Abstract: The disclosure provides a wireless power receiving device, a wireless power supply device, and a wireless power transmission system. The wireless power receiving device includes: a conversion unit that converts an alternative magnetic field into a reception voltage that has a voltage value corresponding to an amplitude of the alternative magnetic field; a power receiving circuit that generates a stabilized voltage with a fixed voltage value based on the reception voltage, and outputs an output voltage corresponding to the stabilized voltage via an output line; and a communication circuit that receives the stabilized voltage as a power-supply voltage to perform the data communication; the power receiving circuit includes a protection circuit that restricts an upper limit of the reception voltage to a first voltage value in the communication mode, and restricts the upper limit to a second voltage value higher than the first voltage value in the power supply mode.