Abstract: The present invention comprises a user-programmable control circuit for use in a power converter to automatically transition the converter into BURST mode when load current demand is low. The control circuit senses load current demand by monitoring the output current of the converter, and generating a signal representative of the monitored output current. The control circuit may automatically transition the converter into BURST mode when the signal indicative of the average monitored output current decreases below a user-programmable threshold. BURST mode may increase overall converter efficiency by turning OFF a plurality of electronic components, and maintaining the converter's output voltage at a regulated level by energy stored in an output capacitor.
Abstract: A high voltage MOS transistor is provided that is compatible with low-voltage, sub-micron CMOS and BiCMOS processes. The high voltage transistor of the present invention has dopants that are implanted into the substrate prior to formation of the epitaxial layer. The implanted dopants diffuse into the epitaxial layer from the substrate during the formation of the epitaxial layer and subsequent heating steps. The implanted dopants increase the doping concentration in a lower portion of the epitaxial layer. The implanted dopants may diffuse father into the epitaxial layer than dopants in the buried layer forming an up-retro well that prevents vertical punch-through at high operating voltages for thin epitaxial layers. In addition, the doping concentration below the gate may be light so that the threshold voltage of the transistor is low.
Abstract: Feedback circuits capable of preventing output voltage overshoot in closed-loop DC regulated power supplies are presented. The circuits employ hysteresis at the input of an operational amplifier to improve the response time of the feedback circuits to a rising output voltage reaching a threshold. The feedback circuits substantially reduce, if not prevent, output voltage overshoot during start-up and hard and soft output shorts.
Abstract: The present invention provides methods and circuits for protecting power converters from over-current conditions that, in one embodiment, (1) reduce average inductor current to a steady-state threshold during a transient phase and regulate average inductor current in steady-state regulation approximately at the steady-state threshold; and (2) reduce instantaneous inductor current after the instantaneous inductor current exceeds a maximum instantaneous threshold during the transient phase.
Abstract: Methods for synchronizing non-constant frequency switching regulators with a phase locked loop are disclosed. The methods enable non-constant frequency switching regulators to be synchronized with a phase locked loop to achieve constant frequency operation in steady state while retaining the advantages of non-frequency operation to improve transient response and operate over a wider range of duty cycles. In addition, the methods enable multiple non-constant frequency regulators to be synchronized and operated in parallel to deliver higher power levels to the output than a single switching regulator.
Type:
Grant
Filed:
July 2, 2004
Date of Patent:
March 28, 2006
Assignee:
Linear Technology Corporation
Inventors:
Christopher B. Umminger, Randy G. Flatness
Abstract: A high voltage MOS transistor is provided that is compatible with low-voltage, sub-micron CMOS and BiCMOS processes. The high voltage transistor of the present invention has dopants that are implanted into the substrate prior to formation of the epitaxial layer. The implanted dopants diffuse into the epitaxial layer from the substrate during the formation of the epitaxial layer and subsequent heating steps. The implanted dopants increase the doping concentration in a lower portion of the epitaxial layer. The implanted dopants may diffuse father into the epitaxial layer than dopants in the buried layer forming an up-retro well that prevents vertical punch-through at high operating voltages for thin epitaxial layers. Particularly, a P-type dopant may diffuse farther up into an epitaxial layer than an N-type dopant to form an up-retro well.
Abstract: Control circuits that employ time-based current control methods for switching voltage regulators are provided. The control circuit includes a current estimation circuit and optionally, a transfer function circuit. The current estimation circuit generates estimates of regulator output current as function of switch period for use as a threshold indicative of peak current limit. This arrangement eliminates the need for error amplifiers to provide effective current mode control. The absence of error amplifiers allows fabrication of switching regulators on smaller die areas and provides switching regulators with reduced power consumption.
Abstract: Circuits and methods for a low voltage pre-distortion circuits that provide a temperature and logarithmically compensated voltage such that a gain change of a variable gain amplifier is linear in dB and has a reduced temperature dependency. A temperature compensation circuit multiplies the transfer function of gain of the amplifier versus gain control voltage by absolute temperature. A logarithmic compensation circuit removes the non-logarithmic factor of a “1” in the denominator of the transfer function.
Abstract: Circuits and methods for automatically controlling lightwave emitters are provided. A control system is provided that includes a variable gain circuit for automatically adjusting the gain of a control signal with respect to a feedback signal, a modulation signal, and a reference signal. This allows the optical output of the lightwave emitter to remain substantially constant despite changes in transfer ratio due to aging or temperature variations. Furthermore, in some embodiments, a user may select the overall gain of the system to optimize response time, bandwidth, or steady-state accuracy.
Abstract: Circuits and methods for providing a variable gain while powered from a low-voltage supply. In a specific embodiment, an input signal is converted to a current by an emitter-degenerated pair. A portion of the input current is discarded, while the remainder is variably steered between a shunt stage or an AC ground such as VCC. The output of the shunt stage is buffered by a high speed output, the bandwidth of which is increased by feed-forward capacitors. This arrangement may be optionally repeated for additional gain.
Abstract: Electronic devices, and methods, for transmitting, transferring and/or conveying a multi-bit digital signal as a voltage signal via a single pin. Devices and methods according to the invention substantially reduce the pin count of a device because inputting of a multi-bit digital signal preferably does not use more than one input pin. In addition, the speed of transmission is improved because the multi-bit digital signal is transmitted as a voltage signal substantially at one time as opposed to serially.
Abstract: A non-volatile memory element is operated, in part, in two phases. During the first phase, a voltage is applied to a first node coupled to the nonvolatile memory element to generate an initial voltage. During the second phase, a voltage is coupled through at least one capacitor to charge pump the initial voltage to a level sufficient for programming or erasing the non-volatile memory element.
Abstract: A low voltage pull-down circuit for maintaining a node at a logic LOW voltage is provided. When a logic LOW is desired, the circuit provides a low-impedance path from the node to ground. The node may be easily pulled-up to a logic HIGH voltage, for example, by simply removing the low-impedance path and allowing a voltage source to reach the node through a resistor or transistor.
Type:
Grant
Filed:
December 2, 2003
Date of Patent:
September 27, 2005
Assignee:
Linear Technology Corporation
Inventors:
Robert P. Jurgilewicz, Victor F. Fleury, Roger Zemke
Abstract: Circuitry and methods for improved amplifiers with large bandwidth and constant gain are provided. The combination of a synthetic inductive drain load and a bridged-T matching network provide amplifiers that can drive a substantial capacitive load with the above mentioned improvements over prior amplifiers. Additionally, circuits presented allow for improved rise time and insensitivity to temperature variations.
Abstract: A non-volatile memory element is operated, in part, in two phases. During the first phase, a voltage is applied to a first node coupled to the nonvolatile memory element to generate an initial voltage. During the second phase, a voltage is coupled through at least one capacitor to charge pump the initial voltage to a level sufficient for programming or erasing the non-volatile memory element.
Abstract: Circuitry and methods for obtaining accurate measurements of current supplied by an integrated circuit are provided. Current calculations are performed using information from a precision termination resistor and from the ratio relationship of two on-chip resistors. The invention provides a way to obtain accurate current measurements without the use of component trimming.
Abstract: Circuits and methods to correct the load sharing in multiphase switching regulators are provided. Using these systems and methods, the input capacitor voltage signal can be sampled and used for current sensing of the regulator's stages. Differences in the amount of output current for a converter stage can then be determined. Corrections needed to equalize the output current of the converter stages can then be determined and carried out.
Abstract: Digital to analog converter circuits and methods are provided for producing an analog output voltage indicative of a digital input signal with at least partial insensitivity to error gradients. Described are split-core resistive elements, which include a plurality of one-dimensional or multi-dimensional resistive strings, that may be used to reduce or substantially eliminate the effects that error gradients have on the linearity of the analog output voltages of a resistive string or interpolating amplifier DACs. The resistor strings that make up the split-core resistive elements are configured in such a manner that combining respective output voltages from each of the resistor strings results in an analog output voltage that is at least partially insensitive to the effects of error gradients.
Type:
Grant
Filed:
May 15, 2003
Date of Patent:
August 30, 2005
Assignee:
Linear Technology Corporation
Inventors:
William C. Rempfer, Hassan Malik, James L. Brubaker
Abstract: The invention provides methods and apparatus for improving the direct current (DC) offset performance of an oversampling analog-to-digital (A/D) converter, including A/D converters that include an oversampling quantizer such as a single or multi-bit ?-? modulator, successive approximation quantizer, flash quantizer, pipelined quantizer or other suitable oversampling quantizer. A customized buffer/amplifier may be inserted between an analog chopper and a signal processing chain. The customized buffer/amplifier is optimized for input noise and the signal chain compensates for poor DC performance. The result is a buffered analog-to-digital converter with both low input noise and very good DC accuracy.
Abstract: An integrated circuit for use in implementing a switching voltage regulator, the integrated circuit including a power switching transistor, driver circuitry and control circuitry, which is operable in a normal feedback mode or an isolated flyback mode. The integrated circuit includes shutdown circuitry for placing the regulator in a micro-power sleep mode, and can be packaged in a five-pin conventional power transistor package. The terminals of the integrated circuit regulator perform multiple functions. A compensation terminal is used for frequency compensation, current limiting, soft-start operation and shutdown. A feedback terminal is used as a feedback input when the integrated circuit is in feedback mode, and as a logic pin to program the regulator for isolated flyback operation. The feedback terminal is also used to trim the flyback reference voltage.