Patents Assigned to Linear Technology
  • Patent number: 4731719
    Abstract: A switching voltage regulator circuit is provided which regulates an input voltage to an output voltage of lesser magnitude, and which supplies an output current greater than the current through the switch employed in the circuit. The circuit includes a transformer which causes output current to be provided both when the switch is open and when it is closed.
    Type: Grant
    Filed: November 19, 1986
    Date of Patent: March 15, 1988
    Assignee: Linear Technology Corporation
    Inventor: Carl T. Nelson
  • Patent number: 4719430
    Abstract: A class B push-pull integrated circuit suitable for low voltage operation, having two symmetrical halves. Each half circuit has first and second opposite conductivity type transistors having their collectors connected together to the base of a class B driver transistor, the collector of which drives the base of an output transistor. An AC input signal is divided into in-phase and anti-phase components one of which is applied to the base of each first transistor. An AC feedback loop extends from the collector of the fourth transistor through a voltage divider and level shifter to the base of the second transistor. A DC feedback loop extends from the base of the fourth transistor through a fifth transistor to the base of the second transistor. Decoupling capacitors extend from the bases of the fifth transistors and through a diode to ground. The arrangement allows use of small decoupling capacitors, and a current forced through the diode eliminates turn-on delay.
    Type: Grant
    Filed: June 25, 1986
    Date of Patent: January 12, 1988
    Assignee: Linear Technology Inc.
    Inventor: William A. Cole
  • Patent number: 4633166
    Abstract: An integrated circuit unity gain buffer amplifier suitable for low voltage operation, in which the input signal is applied to the base of a common emitter NPN transistor first stage. The collector of the first stage is connected to the base of an emitter follower NPN transistor second stage. The emitter of the second stage is connected to the base of an emitter follower PNP transistor third stage. The collector of the first stage is loaded by a constant current source and its emitter is connected through a resistance to ground. The collector and emitter of the second and third stages respectively are connected together through a resistor to the supply voltage. The emitter of the second stage is connected through a resistance to ground. The collector of the third stage is connected both to the output terminal and to the emitter of the first stage. This allows the circuit to operate at a very low supply voltage without any transistor operating in practical saturation.
    Type: Grant
    Filed: October 7, 1985
    Date of Patent: December 30, 1986
    Assignee: Linear Technology Inc.
    Inventor: William A. Cole
  • Patent number: 4624006
    Abstract: A bidirectional shift register includes a plurality of serially connected cells with each cell having a first circuit portion and a second circuit portion. Each circuit portion includes at least two parallel inverters connected in opposite directions. The relative transconductance of the oppositely connected inverters in each circuit portion of a cell can be varied thereby determining the direction of data flow through the circuit portion and through the bidirectional shift register.
    Type: Grant
    Filed: May 10, 1985
    Date of Patent: November 18, 1986
    Assignee: Linear Technology Corporation
    Inventors: William C. Rempfer, Thomas P. Redfern
  • Patent number: 4622521
    Abstract: Offsets in a chopper stabilized CMOS operational amplifier are nulled by adjusting the transconductance of the load transistors in the CMOS transistor pairs. This is accomplished by providing a small N channel transistor in parallel with each N channel load transistor of the CMOS pairs. A bias voltage is applied to the gate of one of the transistors and a voltage applied to the gate of the other N channel transistor. The voltage is developed by shorting the inputs to the operational amplifier and closing a feedback path around the input stage to null its offset. The nulling voltage taken at the gate of the other N channel transistor is capacitively stored and used during the subsequent sampling cycle.
    Type: Grant
    Filed: December 23, 1985
    Date of Patent: November 11, 1986
    Assignee: Linear Technology Corporation
    Inventor: Thomas P. Redfern
  • Patent number: 4622692
    Abstract: Electronic circuitry as described which enhances the intelligibility of a speech signal corrupted by low-frequency noise while tending to retain frequency components of the signal characteristic of natural-sounding speech. The circuitry includes a broad band channel which passes the speech signal with little spectral distortion. A high-pass channel produces a high-pass signal corresponding to high-frequency components of the speech signal, components which in themselves provide the human ear with considerable information for discernment of different sounds. An operational amplifier in a summing configuration combines the broadband and high-pass signals to produce a processed speech signal with enhanced intelligibility.
    Type: Grant
    Filed: October 10, 1984
    Date of Patent: November 11, 1986
    Assignee: Linear Technology Inc.
    Inventor: William A. Cole
  • Patent number: 4603291
    Abstract: A curvature correction circuit for generating an output current of the general form T ln T. When applied as a curvature correction circuit to bandgap references, the circuit precisely offsets the inherent parabolic non-linearity of such circuits.
    Type: Grant
    Filed: June 26, 1984
    Date of Patent: July 29, 1986
    Assignee: Linear Technology Corporation
    Inventor: Carl T. Nelson
  • Patent number: 4588454
    Abstract: A process for doping a semiconductor material is performed during a deposition phase in a plurality of steps, first at a relatively low temperature to form a high concentration glass formation layer of the dopant on a semiconductor wafer at a high rate, and then raising the temperature slowly to provide an initial drive-in of the dopant. After etch removal of excess glass formation, the wafers are subjected to a base diffusion at an elevated temperature in an oxidizing atmosphere.
    Type: Grant
    Filed: December 21, 1984
    Date of Patent: May 13, 1986
    Assignee: Linear Technology Corporation
    Inventors: Wadie N. Khadder, Jia-Tarng Wang
  • Patent number: 4575685
    Abstract: An arrangement for cancelling the input bias current, at picoampere levels, in linear integrated circuits such as operational amplifiers, comparators, and the like is disclosed herein. This arrangement utilizes circuitry including a tracking transistor which is virtually independent of the presence or absence of leakage current in the overall integrated circuit, even at relatively high temperatures, for example 125.degree. C., where leakage current can be most significant.
    Type: Grant
    Filed: August 3, 1984
    Date of Patent: March 11, 1986
    Assignee: Linear Technology Corporation
    Inventors: Robert C. Dobkin, George Erdi, Carl T. Nelson
  • Patent number: 4506169
    Abstract: An electronic device for generating a signal indicative of the peak magnitude of an alternating voltage signal is described. The device includes a voltage-to-current converter that generates a current signal comprising a quiescent current and an alternating current signal which varies directly with the alternating voltage signal. A current sink absorbs the current signal up to a controllable maximum current level. A charge current is generated when the current signal exceeds the maximum current level, and is delivered to a capacitor. Feedback circuitry varies the maximum current level of the current sink directly with the resulting capacitor voltage. The capacitor voltage is consequently indicative of the peak magnitude of the alternating voltage signal. A discharge current is applied to the capacitor so that the capacitor voltage can decrease in response to a decrease in the peak magnitude of the alternating voltage signal.
    Type: Grant
    Filed: February 23, 1982
    Date of Patent: March 19, 1985
    Assignee: Linear Technology Inc.
    Inventor: William A. Cole
  • Patent number: 4085382
    Abstract: A low level, low power, direct coupled integrated class B amplifier having a dual channel three stage preamplifier and a pair of output transistors, one for each channel. In each channel, a DC negative feedback loop connects the collector of the last stage preamplifier transistor to the base of the first stage preamplifier transistor to regulate the DC levels, and a resistive AC negative feedback loop connects the output transistor collector to the first preamplifier transistor collector to reduce the gain dependence of the channel on the current through the output transistor, thus enabling very low idle currents for the output transistors and also providing low distortion output. The resistor in each AC feedback loop is a floating tub resistor to enable it to be taken more than 0.6 volts above the battery voltage. Common mode rejection is provided for at least two of the three preamplifier transistors of each channel.
    Type: Grant
    Filed: November 22, 1976
    Date of Patent: April 18, 1978
    Assignee: Linear Technology Inc.
    Inventors: Herbert Douglas Barber, Gary Curtis Salter
  • Patent number: 4034306
    Abstract: An integrated circuit direct coupled amplifier capable of operating from a single battery cell, has: a differential amplifier input stage having an input transistor and a second transistor; an intermediate gain stage; and an output stage. Signal is fed back from the output stage to the base of the second transistor of the differential amplifier, through a negative feedback circuit. Current sources are connected as loads in the collector circuits of the input transistor of the differential amplifier and the transistor of the intermediate gain stage. The current sources are biased by separate bias sources, to improve stability. The bias source for the intermediate gain stage current source also biases a current source for the feedback circuit. A starting circuit is connected to the bias source for the intermediate gain stage and provides self starting for the current sources.
    Type: Grant
    Filed: April 16, 1976
    Date of Patent: July 5, 1977
    Assignee: Linear Technology Inc.
    Inventors: Herbert Douglas Barber, Gary Curtis Salter