Patents Assigned to Linear Technology
  • Patent number: 4953007
    Abstract: A plastic encapsulated integrated circuit package in which a chip is secured to the upper surface of a base and is connected to leads which have their lower surfaces in a plane above that of the bottom of the base. An electrostatic shield is electrically connected to the bottom of the base and underlies the leads without touching them, to reduce crosstalk. The support for the base is integrally connected by a conductive strip to the lead for the ground pin of the chip, to ground the shield. The whole is plastic encapsulated. To permit encapsulation, the shield extends towards but stops short of the dam bars for the leads.
    Type: Grant
    Filed: October 21, 1988
    Date of Patent: August 28, 1990
    Assignee: Linear Technology Inc.
    Inventor: George Erdos
  • Patent number: 4933642
    Abstract: A CMOS chopper-stabilized operational amplifier including a nulling amplifier and a main amplifier has a pair of two input differential amplifiers in the input stage of each of the nulling amplifier and the main amplifier. In the nulling amplifier, one two-input differential amplifier switchably receives the input signals to the chopper stabilized operational amplifier, while the other two input differential amplifier functions in a feedback loop for developing a nulling voltage for the DC offset of the first two input differential amplifier. The operational amplifier has a three-phase clock and samples through a nulling time period, a setting time period, and a sampling time period.
    Type: Grant
    Filed: February 17, 1989
    Date of Patent: June 12, 1990
    Assignee: Linear Technology Corporation
    Inventor: Minru Lee
  • Patent number: 4920016
    Abstract: A composition of liposomes which contain an entrapped pharmaceutical agent and are characterized by (a) liposome sizes predominantly between about 0.07 and 0.5 microns; (b) at least about 50 mole percent of a membrane-rigidifying lipid, such as sphingomyelin or neutral phospholipids with predominantly saturated acyl chains; and (c) between about 5-20 mole percent of a glycolipid selected from the group consisting of ganglioside GM.sub.1, saturated phosphatidylinositol, and monogalactosyl stearate. The liposomes show high blood/RES tissue distribution ratios, and are effective for drug administration to tumors via intravenous drug delivery.
    Type: Grant
    Filed: December 18, 1987
    Date of Patent: April 24, 1990
    Assignee: Linear Technology, Inc.
    Inventors: Theresa M. Allen, Alberto Gabizon
  • Patent number: 4888634
    Abstract: A high thermal resistance bonding material for semiconductor chips includes a binder such as epoxy or polyimide and high thermal resistance material dispersed therein such as glass micropheres, glass beads, ceramic microspheres and ceramic beads. The particles of high thermal resistance material are sieved to obtain particles of generally uniform size. In plastic-encapsulated semiconductor chips, each chip is enveloped by the bonding material.
    Type: Grant
    Filed: February 3, 1989
    Date of Patent: December 19, 1989
    Assignee: Linear Technology Corporation
    Inventors: Chong K. Lai, Robert C. Dobkin
  • Patent number: 4857860
    Abstract: A switched capacitor filter having DC gain accuracy and low DC offset includes an operational amplifier with a resistor (or switched capacitor) connecting one input of the operational amplifier to a signal input terminal. A first capacitor provides a first feedback loop between the output and an input of the operational amplifier, and an active network is serially connected with another resistor (or switched capacitor) as a filtered feedback loop.
    Type: Grant
    Filed: June 6, 1988
    Date of Patent: August 15, 1989
    Assignee: Linear Technology Corporation
    Inventor: Nello G. Sevastopoulos
  • Patent number: 4851953
    Abstract: A current limit circuit is provided which may be used to limit the current conducted by a pass transistor in a low dropout voltage regulator circuit having no ground terminal. The output current of the regulator is sensed by a low value resistor in the collector of the transistor. The voltage developed across the resistor is proportional to the output current of the regulator, and is used to vary a current ratio which sets the current limit value. The gain of the current limit loop is increased by providing positive feedback during current limiting. A foldback network is provided which reduces the current limit value at higher input/output voltage differentials. The feedback provided by the foldback network has a breakpoint which is sensitive to the operating temperature of the regulator circuit.
    Type: Grant
    Filed: October 28, 1987
    Date of Patent: July 25, 1989
    Assignee: Linear Technology Corporation
    Inventors: Dennis P. O'Neill, Carl T. Nelson
  • Patent number: 4847520
    Abstract: A circuit is provided for reducing the turn-off transition time of a switching PNP transistor by providing a reverse drive current to the base of the PNP transistor after the drive current has been removed from the base. The reverse drive current is generated by an NPN transistor, the emitter of which is connected to the base of the PNP transistor. A capacitor coupled to the base of the NPN transistor is charged and during the conducting period of the PNP transistor and discharged after the drive current is removed from the base of the PNP transistor to enable the base of the NPN transistor to be driven above the supply voltage connected to the emitter of the PNP transistor.
    Type: Grant
    Filed: August 31, 1987
    Date of Patent: July 11, 1989
    Assignee: Linear Technology Corporation
    Inventors: Dennis P. O'Neill, Carl T. Nelson
  • Patent number: 4847566
    Abstract: The stability of an amplifier output stage in driving a capacitive load and sinking increasing currents is enhanced by compensating for a reduction in V.sub.BE of a first emitter follower bipolar transistor connected to the amplifier output. This is accomplished by using a second emitter follower transistor with the two emitter follower transistors driving a differential amplifier with the output of the differential amplifier controlling the conductance of a sink MOS transistor connected to the amplifier output. Another MOS transistor is serially connected with the second emitter follower transistor with the gate terminal connected to the differential amplifier output whereby an increasing sinking current causes an increase in current through the second emitter follower transistor and an increase of V.sub.BE of the transistor, thereby increasing V.sub.BE of the first emitter follower transistor.
    Type: Grant
    Filed: February 9, 1988
    Date of Patent: July 11, 1989
    Assignee: Linear Technology Corporation
    Inventor: Min-Ru Lee
  • Patent number: 4843302
    Abstract: A non-linear temperature correction circuit is provided which utilizes, in one embodiment, a pair of semiconductor elements such as a pair of transistors electrically connected to a common biasing current having a negative temperature coefficient and a negative temperature coefficient voltage is applied between the bases of the transistors. The output of one of the transistors is a non-linear output current which is non-linear with respect to temperature and where the output current has an inflection point.
    Type: Grant
    Filed: May 2, 1988
    Date of Patent: June 27, 1989
    Assignee: Linear Technology
    Inventors: Robert C. Dobkin, Carl T. Nelson
  • Patent number: 4837496
    Abstract: A start-up circuit/current source includes a first current path including serially connected first field effect transistor, first resistor, first bipolar transistor, and second resistor. A second current path includes a second field effect transistor, a second bipolar transistor, and a third resistor. The base electrodes of the first and second bipolar transistors are interconnected, and the base and collector of the second bipolar transistor are shorted together. A first current source includes a bipolar transistor serially connected through the third resistor, the base of the third bipolar transistor connected to the first current path. A second current source can be provided including a fourth bipolar transistor serially connected with a fourth resistor and with the base of the fourth transistor connected to a common terminal of the first resistor and first bipolar transistor.
    Type: Grant
    Filed: March 28, 1988
    Date of Patent: June 6, 1989
    Assignee: Linear Technology Corporation
    Inventor: George Erdi
  • Patent number: 4827156
    Abstract: A push-pull circuit in which an output terminal is alternately connected to first and second voltage potentials through first and second bipolar transistors, first biasing circuitry is provided for controlling the conductance of the first transistor with the first biasing circuitry being responsive to the base/emitter voltage of the second transistor whereby the first transistor cannot be biased on while the second transistor is conductive, and biasing circuitry is provided for the second transistor with the second bias circuitry being responsive to base/emitter voltage of the first transistor whereby the second transistor cannot be biased on while the first transistor is conductive.
    Type: Grant
    Filed: December 1, 1987
    Date of Patent: May 2, 1989
    Assignee: Linear Technology Inc.
    Inventor: Dennis P. O'Neill
  • Patent number: 4823070
    Abstract: An integrated circuit for use in implementing a switching voltage regulator, the integrated circuit including a power switching transistor, driver circuitry and control circuitry, which is operable in a normal feedback mode or an isolated flyback mode. The integrated circuit includes shutdown circuitry for placing the regulator in a micro-power sleep mode, and can be packaged in a five-pin conventional power transistor package. The terminals of the integrated circuit regulator perform multiple functions. A compensation terminal is used for frequency compensation, current limiting, soft-start operation and shutdown. A feedback terminal is used as a feedback input when the integrated circuit is in feedback mode, and as a logic pin to program the regulator for isolated flyback operation. The feedback terminal is also used to trim the flyback reference voltage.
    Type: Grant
    Filed: August 3, 1987
    Date of Patent: April 18, 1989
    Assignee: Linear Technology Corporation
    Inventor: Carl T. Nelson
  • Patent number: 4812961
    Abstract: A charge pump circuit is integrated form utilizes a dual emitter transistor switch having low saturation voltage. The low saturation voltage for the transistor is provided by deriving a base bias voltage from the doubled voltage (2V.sub.cc) and a collector voltage from the voltage supply (V.sub.cc). Current-limiting for the transistor is provided by connecting one emitter to the base bias circuitry whereby the second emitter acts as a collector when the transistor saturates, thereby limiting the base drive and causing current-limiting.
    Type: Grant
    Filed: May 15, 1987
    Date of Patent: March 14, 1989
    Assignee: Linear Technology, Inc.
    Inventors: Robert Essaff, Robert C. Dobkin
  • Patent number: 4792745
    Abstract: A circuit is provided for distributing load current among multiple power transistors in an output stage, each power transistor being adapted to conduct current over a different range of collector-emitter voltages. The circuit includes a first power transistor having a large ballast resistance for conducting current between the input and output of the circuit when the input/output voltage differential is high, and a second power transistor having a small ballast resistance for conducting current between the input and output of the circuit when the input/output voltage differential is low. Both transistors respond to a single control signal, and buffering is provided to prevent either transistor from overloading the common control point. Individual current limit protection circuitry is provided for each transistor, including a foldback network which reduces the current limit value of the current limit circuitry when the input/output voltage differential reaches a threshold value.
    Type: Grant
    Filed: October 28, 1987
    Date of Patent: December 20, 1988
    Assignee: Linear Technology Corporation
    Inventor: Robert C. Dobkin
  • Patent number: 4789819
    Abstract: A voltage reference circuit including a Brokaw Cell band-gap reference circuit is provided with breakpoint compensation to adjust the temperature coefficient of the reference voltage provided by the Brokaw Cell as a function of temperature. The voltage reference circuit also includes a thermal limit transistor which is biased by a voltage having a positive temperature coefficient. The thermal limit transistor draws a rapidly increasing current when the operating temperature reaches a predetermined value.
    Type: Grant
    Filed: November 18, 1986
    Date of Patent: December 6, 1988
    Assignee: Linear Technology Corporation
    Inventor: Carl T. Nelson
  • Patent number: 4786855
    Abstract: A bias control loop forms a voltage regulator for providing the bias voltage to the collectors of bipolar current source transistors in a linear circuit. The bias loop functions by maintaining equal or related base/emitter voltages on the several transistors. By properly sizing the emitter areas of the transistors, interrelated voltages and transistor biases are provided in the loop. The bias loop works down to less than 1 volt and is stable without a compensation capacitor.
    Type: Grant
    Filed: February 4, 1988
    Date of Patent: November 22, 1988
    Assignee: Linear Technology Inc.
    Inventors: Dennis P. O'Neill, Carl T. Nelson
  • Patent number: 4783635
    Abstract: A low pass filter circuit for filtering out high frequency AC components from an electric signal including a DC component and possibly low frequency AC components is disclosed herein. This circuit includes a first order, low pass RC filter network, free of any active elements, for receiving a signal at an input and passing the entire DC component and any low frequency AC components present in the signal to an output. The circuit also includes circuitry utilizing at least some active components and a predetermined transfer function for filtering out high frequency components in the signal over a predetermined, relatively narrow roll-off frequency band. This latter circuitry cooperates with the RC network so that the operation of its active elements does not act on the DC component of the signal and therefore does not affect the amplitude of the DC component as it appears at the output.
    Type: Grant
    Filed: September 22, 1986
    Date of Patent: November 8, 1988
    Assignee: Linear Technology Corporation
    Inventor: Nello Sevastopoulos
  • Patent number: 4775884
    Abstract: An integrated circuit resistor adjustment network with resistors (R1, R2, R3, R4) which may be paralleled by trimming resistors (R5, R7, R6, R8, respectively) upon electrical "zapping" of Zener diodes (Z1, Z2, Z3, Z4, respectively) connected in series with the trimming resistors. The Zener diodes (Z1, Z4 or Z2, Z3) are connected in inverse series via inverse paralleled diodes (D1, D2 or D3, D4 respectively) which are non-conductive during normal operation, but conduct during higher voltage zapping operation to permit the currents for zapping the Zener diodes to bypass the resistors.
    Type: Grant
    Filed: April 14, 1987
    Date of Patent: October 4, 1988
    Assignee: Linear Technology Corporation
    Inventor: George Erdi
  • Patent number: 4771227
    Abstract: A circuit is provided for reducing the output impedance of an emitter-follower transistor in which a positive feedback voltage proportional to the collector current of the emitter-follower transistor is provided to the base of the emitter-follower transistor when the emitter-follower transistor supplies current to a load. The circuit includes a resistor-ratioed current source which provides collector current to the emitter-follower transistor and which forces a current through a resistor connected to the base of the output transistor in proportion to the collector current.
    Type: Grant
    Filed: November 19, 1986
    Date of Patent: September 13, 1988
    Assignee: Linear Technology Corporation
    Inventor: Carl T. Nelson
  • Patent number: 4755741
    Abstract: An adaptive transistor drive circuit including a multiple-emitter transistor, at least one emitter of which is connected to the drive circuit. When the drive current causes the transistor to saturate, the emitter connected to the drive circuit conducts a portion of the drive current to limit saturation of the transistor. A current source provides drive current which varies as a function of the current conducted by the collector of the transistor so as to maintain the transistor in saturation as the collector current and operating temperature vary.
    Type: Grant
    Filed: November 18, 1986
    Date of Patent: July 5, 1988
    Assignee: Linear Technology Corporation
    Inventor: Carl T. Nelson